The SDP-S’s peripherals are a subset of the SDP-B's peripherals. This document aims to outline these peripherals and their implementation on the SDP board.
The TWI / I2C bus is fully compatible with the widely used I2C bus standard as defined by Philips I2C Bus Specification version 2.1.
Pull up Resistors are required on both the SDA and SCL lines, so the lines will idle high at all times.
Data Rates :up to 100K bits/second (Standard Mode)and up to 400K bits/second (Fast Mode)data rates
For more details on TWI/I2C, click here!
The SPI interface on the SDP-S is a full duplex, synchronous serial interface. The SDP-S is the Master for all SPI transfers. When an SPI transfer occurs, data is simultaneously transmitted as new data is received. The SPI_CLK signal synchronises the shifting of data out and the sampling of data in on the two serial data pins (MOSI and MISO).
For more details on SPI, click here!