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resources:eval:sdp:sdp-b:hardware_description [05 Aug 2011 12:27]
Jean McAdam Approved
resources:eval:sdp:sdp-b:hardware_description [26 May 2016 18:58] (current)
Eamonn Walsh [Mechanical Specifications]
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 This describes the hardware design of the EVAL-SDP-CB1Z board. This describes the hardware design of the EVAL-SDP-CB1Z board.
  
 +This board is full of niubility! By using it, you can create a colorful world! After you entering this vivid world,you will feel of rebirth,and then you will shout "Hello World!"​.
 ===== LEDs ===== ===== LEDs =====
  
 There are two LEDs located on the SDP-B board. Refer to Figure HWD1. There are two LEDs located on the SDP-B board. Refer to Figure HWD1.
  
-{{:​eval:​sdp:​fig2-1.jpg|}}+ 
 +{{:resources:eval:sdp:sdp-b:leds.jpg?​nolink&​300|}}
  
 Figure HWD1: SDP-B Board LEDs Figure HWD1: SDP-B Board LEDs
 +
  
 ==== LED 1 ==== ==== LED 1 ====
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 For further details on the peripheral interfaces, including timing diagrams, see the [[adi>​en/​embedded-processing-dsp/​blackfin/​processors/​manuals/​resources/​index.html|ADSP-BF52x Blackfin Processor Hardware Reference]] For further details on the peripheral interfaces, including timing diagrams, see the [[adi>​en/​embedded-processing-dsp/​blackfin/​processors/​manuals/​resources/​index.html|ADSP-BF52x Blackfin Processor Hardware Reference]]
  
 +Connector C exposes the entire Blackfin memory space but is not used as part of the SDP platform. ​
 ===== Connector Pin Assignments ===== ===== Connector Pin Assignments =====
  
-The connector pin assignments have been defined independently of the any internal pin sharing, which occurs on the Blackfin processor. The table lists the connector pins and identifies the functionality assigned to each connector +The connector pin assignments ​for Connector A and Connector B have been defined independently of the any internal pin sharing ​that occurs on the Blackfin processor. The below table lists the connector pins and identifies the functionality assigned to each connector pin for Connector A and Connector B on the SDP-B board.
-pin on the SDP-B board.+
  
 ==== 120 Pin Connector Pin Assignments ==== ==== 120 Pin Connector Pin Assignments ====
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 |    5  | USB_VBUS ​   | Connected directly to the USB +5v Supply. ​ | |    5  | USB_VBUS ​   | Connected directly to the USB +5v Supply. ​ |
 |    6  | GND         | Connect to ground plane of board. ​ | |    6  | GND         | Connect to ground plane of board. ​ |
-|    7  | PAR_D23 ​    | Parallel Data Bus Bit 23.((Functionality not implemented on the EVAL-SDP-CB1Z)) ​(No connect.) ​ +|    7  | PAR_D23 ​    | Parallel Data Bus Bit 23.(No connect.) ​<​sup>​1</​sup> ​
-|    8  | PAR_D21 ​    | Parallel Data Bus Bit 21.((Functionality not implemented on the EVAL-SDP-CB1Z)) ​(No connect.) ​ +|    8  | PAR_D21 ​    | Parallel Data Bus Bit 21.(No connect.) ​<​sup>​1</​sup> ​
-|    9  | PAR_D19 ​    | Parallel Data Bus Bit 19.((Functionality not implemented on the EVAL-SDP-CB1Z)) ​(No connect.) ​ +|    9  | PAR_D19 ​    | Parallel Data Bus Bit 19.(No connect.) ​<​sup>​1</​sup> ​
-|   ​10 ​ | PAR_D17 ​    | Parallel Data Bus Bit 17.((Functionality not implemented on the EVAL-SDP-CB1Z)) ​(No connect.) ​ |+|   ​10 ​ | PAR_D17 ​    | Parallel Data Bus Bit 17.(No connect.) ​<​sup>​1</​sup> ​|
 |   ​11 ​ | GND         | Connect to ground plane of board. ​ | |   ​11 ​ | GND         | Connect to ground plane of board. ​ |
 |   ​12 ​ | PAR_D14 ​    | Parallel Data Bus Bit 14.  | |   ​12 ​ | PAR_D14 ​    | Parallel Data Bus Bit 14.  |
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 |   ​19 ​ | PAR_D3 ​     | Parallel Data Bus Bit 3.  | |   ​19 ​ | PAR_D3 ​     | Parallel Data Bus Bit 3.  |
 |   ​20 ​ | PAR_D1 ​     | Parallel Data Bus Bit 1.  | |   ​20 ​ | PAR_D1 ​     | Parallel Data Bus Bit 1.  |
-|   ​21 ​ | PAR_RD ​     | Asynchronous Parallel Read Strobe. ​ |  +|   ​21 ​ | PAR_RD ​     | Low Enable. ​Asynchronous Parallel Read Strobe. ​ |  
-|   ​22 ​ | PAR_CS ​     | Asynchronous Parallel Chip Select. ​ |+|   ​22 ​ | PAR_CS ​     | Low Enable. ​Asynchronous Parallel Chip Select. ​ |
 |   ​23 ​ | GND         | Connect to ground plane of board. ​ | |   ​23 ​ | GND         | Connect to ground plane of board. ​ |
 |   ​24 ​ | PAR_A3 ​     | Parallel Address Bus Bit 3.  | |   ​24 ​ | PAR_A3 ​     | Parallel Address Bus Bit 3.  |
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 |   ​27 ​ | PAR_FS1 ​    | Synchronous (PPI) Parallel Frame Sync 1.  | |   ​27 ​ | PAR_FS1 ​    | Synchronous (PPI) Parallel Frame Sync 1.  |
 |   ​28 ​ | GND         | Connect to ground plane of board. ​ | |   ​28 ​ | GND         | Connect to ground plane of board. ​ |
-|   ​29 ​ | SPORT_DR3 ​  SPORT Data Receive 3.((Functionality not implemented on the EVAL-SDP-CB1Z)) ​(No connect.) ​ +|   ​29 ​ | SPORT_TDV0  ​SPI Data Receive 3. (No connect.) ​<​sup>​1</​sup> ​
-|   ​30 ​ | SPORT_DR2 ​  SPORT Data Receive 2.((Functionality not implemented on the EVAL-SDP-CB1Z)) ​(No connect.) ​ |+|   ​30 ​ | SPORT_TDV1  ​SPI Data Receive 2. (No connect.) ​<​sup>​1</​sup> ​|
 |   ​31 ​ | SPORT_DR1 ​  | SPORT Data Receive 1. Secondary SPORT Data into processor. ​ | |   ​31 ​ | SPORT_DR1 ​  | SPORT Data Receive 1. Secondary SPORT Data into processor. ​ |
 |   ​32 ​ | SPORT_DT1 ​  | SPORT Data Transmit 1. Secondary SPORT Data from processor. ​ | |   ​32 ​ | SPORT_DT1 ​  | SPORT Data Transmit 1. Secondary SPORT Data from processor. ​ |
-|   ​33 ​ | SPORT_DT2 ​  | SPORT Data Transmit 2.((Functionality not implemented on the EVAL-SDP-CB1Z)) ​(No connect.) ​ +|   ​33 ​ | SPI_D2 ​     ​| SPORT Data Transmit 2.(No connect.) ​<​sup>​1</​sup> ​
-|   ​34 ​ | SPORT_DT3 ​  | SPORT Data Transmit 3.((Functionality not implemented on the EVAL-SDP-CB1Z)) ​(No connect.) ​ +|   ​34 ​ | SPI_D3 ​     ​| SPORT Data Transmit 3.(No connect.) ​<​sup>​1</​sup> ​
-|   ​35 ​ | SPORT_INT ​  | SPORT Interrupt. Used to trigger a non-periodic SPORT event. ​ |+|   ​35 ​ | SERIAL_INT ​  | Serial ​Interrupt. Used to trigger a non-periodic SPORT event. ​ |
 |   ​36 ​ | GND         | Connect to ground plane of board. ​ | |   ​36 ​ | GND         | Connect to ground plane of board. ​ |
-|   ​37 ​ | SPI_SEL_B ​  | SPI Chip Select B. Use this to control a second device on the SPI bus.  | +|   ​37 ​ | SPI_SEL_B ​  ​| ​Low enable. ​SPI Chip Select B. Use this to control a second device on the SPI bus.  | 
-|   ​38 ​ | SPI_SEL_C ​  | SPI Chip Select C. Use this for a third device on the SPI bus.  | +|   ​38 ​ | SPI_SEL_C ​  ​| ​Low enable. ​SPI Chip Select C. Use this for a third device on the SPI bus.  | 
-|   ​39 ​ | SPI_SEL1/ SPI_SS | SPI Chip Select 1.((Shared across both connectors)) (See Pin Sharing.) ​Used to connect to SPI Boot Flash if required. Also used as Chip Select when Blackfin processor is operating as SPI Slave. ​ |+|   ​39 ​ | SPI_SEL1/ SPI_SS | SPI Chip Select 1. <​sup>​2</​sup> ​Used to connect to SPI Boot Flash if required. Also used as Chip Select when Blackfin processor is operating as SPI Slave. ​ |
 |   ​40 ​ | GND         | Connect to ground plane of board. ​ | |   ​40 ​ | GND         | Connect to ground plane of board. ​ |
-|   ​41 ​ | SDA_1       | I2C Data 1.((Shared across both connectors)) (See Pin Sharing.)  ​+|   ​41 ​ | SDA_1       | I2C Data 1.<​sup>​2</​sup> ​
-|   ​42 ​ | SCL_1       | I2C Data 1.((Shared across both connectors)) (See Pin Sharing.)  ​|+|   ​42 ​ | SCL_1       | I2C Data 1.<​sup>​2</​sup> ​|
 |   ​43 ​ | GPIO0       | General Purpose Input/​Output. ​ | |   ​43 ​ | GPIO0       | General Purpose Input/​Output. ​ |
 |   ​44 ​ | GPIO2       | General Purpose Input/​Output. ​ | |   ​44 ​ | GPIO2       | General Purpose Input/​Output. ​ |
 |   ​45 ​ | GPIO4       | General Purpose Input/​Output. ​ | |   ​45 ​ | GPIO4       | General Purpose Input/​Output. ​ |
 |   ​46 ​ | GND         | Connect to ground plane of board. ​ | |   ​46 ​ | GND         | Connect to ground plane of board. ​ |
-|   ​47 ​ | GPIO6       | General Purpose Input/​Output.((Shared across both connectors)) (See Pin Sharing.)  ​|+|   ​47 ​ | GPIO6       | General Purpose Input/​Output.<​sup>​2</​sup> ​|
 |   ​48 ​ | TMR_A       | Timer A flag pin. Use as first Timer if required. ​ | |   ​48 ​ | TMR_A       | Timer A flag pin. Use as first Timer if required. ​ |
-|   ​49 ​ | TMR_C       | Timer C flag pin.((Functionality not implemented on the EVAL-SDP-CB1Z)) ​(No connect.) ​ |+|   ​49 ​ | TMR_C       | Timer C flag pin.<​sup>​1</​sup> ​(No connect.) ​ |
 |   ​50 ​ | NC          | No Connect. Leave this pin unconnected. Do not ground. ​ | |   ​50 ​ | NC          | No Connect. Leave this pin unconnected. Do not ground. ​ |
 |   ​51 ​ | NC          | No Connect. Leave this pin unconnected. Do not ground. ​ | |   ​51 ​ | NC          | No Connect. Leave this pin unconnected. Do not ground. ​ |
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 |   ​55 ​ | NC          | No Connect. Leave this pin unconnected. Do not ground. ​ | |   ​55 ​ | NC          | No Connect. Leave this pin unconnected. Do not ground. ​ |
 |   ​56 ​ | EEPROM_A0 ​  | EEPROM A0. Connect to A0 Address line of the EEPROM ​ | |   ​56 ​ | EEPROM_A0 ​  | EEPROM A0. Connect to A0 Address line of the EEPROM ​ |
-|   ​57 ​ | NC          ​No Connect. Leave this pin unconnected. Do not ground |+|   ​57 ​ | RESET_OUT ​  Active low pin to reset controller board.|
 |   ​58 ​ | GND         | Connect to ground plane of board. ​ | |   ​58 ​ | GND         | Connect to ground plane of board. ​ |
-|   ​59 ​ | UART_RX ​    | UART Receive Data.((Shared across both connectors)) (See Pin Sharing.) ​ | +|   ​59 ​ | UART_RX ​    | UART Receive Data.<​sup>​2</​sup> ​ | 
-|   ​60 ​ | RESET_IN ​   | Active low pin to reset EVAL-SDP-CB1Z ​board. ​ |+|   ​60 ​ | RESET_IN ​   | Active low pin to reset controller ​board. ​ |
 |   ​61 ​ | BMODE1 ​     | Boot Mode 1. Pull up with 10kΩ resistor to set SDP-B to boot from SPI Flash. Enabled on Connector A only.  | |   ​61 ​ | BMODE1 ​     | Boot Mode 1. Pull up with 10kΩ resistor to set SDP-B to boot from SPI Flash. Enabled on Connector A only.  |
-|   ​62 ​ | UART_TX ​    | UART Receive Data.((Shared across both connectors)) (See Pin Sharing.)  ​|+|   ​62 ​ | UART_TX ​    | UART Receive Data.<​sup>​2</​sup> ​|
 |   ​63 ​ | GND         | Connect to ground plane of board. ​ | |   ​63 ​ | GND         | Connect to ground plane of board. ​ |
-|   ​64 ​ | NC          ​No ConnectLeave this pin unconnected. Do not ground.  ​+|   ​64 ​ | SLEEP       Active low sleep from processor board. | 
-|   ​65 ​ | NC          ​No ConnectLeave this pin unconnected. Do not ground.  ​|+|   ​65 ​ | WAKE        ​External wake up to processor board. |
 |   ​66 ​ | NC          | No Connect. Leave this pin unconnected. Do not ground. ​ | |   ​66 ​ | NC          | No Connect. Leave this pin unconnected. Do not ground. ​ |
 |   ​67 ​ | NC          | No Connect. Leave this pin unconnected. Do not ground. ​ | |   ​67 ​ | NC          | No Connect. Leave this pin unconnected. Do not ground. ​ |
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 |   ​69 ​ | GND         | Connect to ground plane of board. ​ | |   ​69 ​ | GND         | Connect to ground plane of board. ​ |
 |   ​70 ​ | NC          | No Connect. Leave this pin unconnected. Do not ground. ​ | |   ​70 ​ | NC          | No Connect. Leave this pin unconnected. Do not ground. ​ |
-|   ​71 ​ | NC          ​No ConnectLeave this pin unconnected. Do not ground.  ​+|   ​71 ​ | CLKOUT ​     ​CLKOUT from processor. | 
-|   ​72 ​ | TMR_D       | Timer D flag pin.((Shared across both connectors)) (See Pin Sharing.)  ​|+|   ​72 ​ | TMR_D       | Timer D flag pin.<​sup>​2</​sup> ​|
 |   ​73 ​ | TMR_B       | Timer B flag pin. Use as second Timer if required. ​ | |   ​73 ​ | TMR_B       | Timer B flag pin. Use as second Timer if required. ​ |
-|   ​74 ​ | GPIO7       | General Purpose Input/​Output.((Shared across both connectors)) (See Pin Sharing.)  ​|+|   ​74 ​ | GPIO7       | General Purpose Input/​Output.|
 |   ​75 ​ | GND         | Connect to ground plane of board. ​ | |   ​75 ​ | GND         | Connect to ground plane of board. ​ |
 |   ​76 ​ | GPIO5       | General Purpose Input/​Output. ​ | |   ​76 ​ | GPIO5       | General Purpose Input/​Output. ​ |
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 |  109  | GND         | Connect to ground plane of board. ​ | |  109  | GND         | Connect to ground plane of board. ​ |
 |  110  | PAR_D15 ​    | Parallel Data Bus Bit 15.  | |  110  | PAR_D15 ​    | Parallel Data Bus Bit 15.  |
-|  111  | PAR_D16 ​    | Parallel Data Bus Bit 16.((Functionality not implemented on the EVAL-SDP-CB1Z)) ​(No connect.) ​ +|  111  | PAR_D16 ​    | Parallel Data Bus Bit 16. (No connect.) ​<​sup>​1</​sup> ​
-|  112  | PAR_D18 ​    | Parallel Data Bus Bit 18.((Functionality not implemented on the EVAL-SDP-CB1Z)) ​(No connect.) ​ +|  112  | PAR_D18 ​    | Parallel Data Bus Bit 18. (No connect.) ​<​sup>​1</​sup> ​
-|  113  | PAR_D20 ​    | Parallel Data Bus Bit 20.((Functionality not implemented on the EVAL-SDP-CB1Z)) ​(No connect.) ​ +|  113  | PAR_D20 ​    | Parallel Data Bus Bit 20. (No connect.) ​<​sup>​1</​sup> ​
-|  114  | PAR_D22 ​    | Parallel Data Bus Bit 22.((Functionality not implemented on the EVAL-SDP-CB1Z)) ​(No connect.) ​ |+|  114  | PAR_D22 ​    | Parallel Data Bus Bit 22. (No connect.) ​<​sup>​1</​sup> ​|
 |  115  | GND         | Connect to ground plane of board. ​ | |  115  | GND         | Connect to ground plane of board. ​ |
 |  116  | VIO(+3.3V) ​ | +3.3V Output. 20mA max current available to power IO voltage on daughter board. ​ | |  116  | VIO(+3.3V) ​ | +3.3V Output. 20mA max current available to power IO voltage on daughter board. ​ |
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 |  119  | NC          | No Connect. Leave this pin unconnected. Do not ground. ​ | |  119  | NC          | No Connect. Leave this pin unconnected. Do not ground. ​ |
 |  120  | NC          | No Connect. Leave this pin unconnected. Do not ground. ​ | |  120  | NC          | No Connect. Leave this pin unconnected. Do not ground. ​ |
 +
 +<​sup>​1</​sup>​ Functionality not implemented on the SDP board
 +<​sup>​2</​sup>​ Shared across both connectors.
  
 Each interface provided by the SDP-B is available on unique pins of the SDP-B’s 120 pin connector. The connector pin numbering scheme is out-line in Figure HWD2. Each interface provided by the SDP-B is available on unique pins of the SDP-B’s 120 pin connector. The connector pin numbering scheme is out-line in Figure HWD2.
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   * UART, pins 59 and 62   * UART, pins 59 and 62
  
 +
 +
 +SB!SB!SB!SB!
 ==== Power ==== ==== Power ====
 The SDP-B board requires that any daughter board connected to the SDP-B board provides the SDP-B board with 5V @ 200mA. This supply should be made available on Pin 1 (VIN) of the 120 pin connector. This supply is required to power the Blackfin processor, the memory, and the other components on the SDP-B Board. The SDP-B board also provides 3.3V @ 20mA on Pin 116 (VIO_3.3) to connected daughter boards as the VIO voltage for the daughter board. Pin 5 (USB_VBUS) is connected to the +5V lineof the USB connector, providing 5V+/- 10% as an output of the SDP-B board. The SDP-B board requires that any daughter board connected to the SDP-B board provides the SDP-B board with 5V @ 200mA. This supply should be made available on Pin 1 (VIN) of the 120 pin connector. This supply is required to power the Blackfin processor, the memory, and the other components on the SDP-B Board. The SDP-B board also provides 3.3V @ 20mA on Pin 116 (VIO_3.3) to connected daughter boards as the VIO voltage for the daughter board. Pin 5 (USB_VBUS) is connected to the +5V lineof the USB connector, providing 5V+/- 10% as an output of the SDP-B board.
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 ==== Mechanical Specifications ==== ==== Mechanical Specifications ====
-The mechanical specifications of the SDP-B board are 2.75" x 2.25" (69.85mm x 27.15mm). The height of the 120 pin connectors from the bottom of the board is approximately 0.152" (3.86 mm). The tallest component on the top is approximately 0.125" (3.175 mm), and the tallest components on the bottoms are the connectors at approximately 0.152" (3.86 mm). Refer to Figure ​2-5.+The mechanical specifications of the SDP-B board are 2.75" x 2.25" (69.85mm x 57.15mm). The height of the 120 pin connectors from the bottom of the board is approximately 0.152" (3.86 mm). The tallest component on the top is approximately 0.125" (3.175 mm), and the tallest components on the bottoms are the connectors at approximately 0.152" (3.86 mm). Refer to Figure ​HWD5. 
 + 
 +{{:​resources:​eval:​sdp:​sdp-b:hwd5.jpg?​nolink&​500|}}
  
 +\\ the below image is a detailed view of the underneath of the board
 +\\ {{:​resources:​eval:​sdp:​sdp-b:​sdp-ei3connector_specification_cpd.jpg?​nolink&​600|}}
 +\\ Figure HWD5: SDP-B Board Mechanical Specifications (above measurements are in mm)
resources/eval/sdp/sdp-b/hardware_description.1312540057.txt.gz · Last modified: 05 Aug 2011 12:27 (external edit)