The ADuM7442S data sheet provides a significant amount of information to aid in understanding of the device and can assist in the evaluation process. The data sheet along with this user guide and supporting linked files found in the Helpful Documents and ADuM7442S Evaluation Board Files sections below should be consulted when using the evaluation board.
The EVAL-ADuM7442S (shown in Figure 1 below) supports the ADuM7442S 25MBPS Space Grade Quad Channel Digital Isolator. The evaluation board provides access to all 4 channels, support for signal fanout and loopback as well as optimal bypass capacitance. Signals can be brought onto the board by the edge-mounted SMA connectors or wired directly by utilizing unpopulated header positions. Decoupled terminal blocks are provided for power connections along with support for edge-mounted SMA connectors. Compatibility with Tektronix active probes is provided by the inclusion of 200 mil header positions.
The board follows best printed circuit board (PCB) design practices for 4-layer boards, including a full power and ground plane on each side of the isolation barrier. While the PCB does implement a distributed capacitive bypass (consisting of closely spaced power and ground planes on the inner layers) to minimize noise and EMI transmission, no other mitigation design features are included. In cases of high speed operation or when ultralow emissions are required, please refer to the AN-1109 Application Note for additional board layout techniques.
Figure 1. EVAL-ADuM7442S
The PCB provides support for three types of interconnections:
With these three options, both temporary and permanent connections to the board can easily be made.
SMA connectors are provided for each Data I/O Channel with positions available for VDD1 and VDD2 power supplies. The Data I/O Channel SMA connectors are low profile, provide an excellent mechanical connection and support 50Ω coaxial cabling. Depending on cabling used for the I/O, a SMA to BNC adapter may be required for connecting to standard lab equipment.
P1 and P2 terminal blocks are provided for power connection although power can be wired directly to the PCB via the P9 and P10 through-hole connectors. Each through-hole pair provides a power ground pair with power on the Pin 1 hole. The pin spacing of each through-hole connector is 200 mils between centers. This matches the pin spacing required for Tektronix active scope probes. If a scope probe connection is desired, the header (Samtec Part # MTSW-202-12-G-S-730) shown in Figure 2 below can be soldered into the through-hole positions. Note that the signal pin must be trimmed to match the height requirement of the probe.
Figure 2. Tektronix Scope Probe Header
Each side of the ADuM7442S iCoupler isolator requires an off-board power source. The power supplies for each side of the isolator can be common or independent, depending on the requirements of the application. Refer to the ADuM7442S data sheet for proper voltage ranges and combinations.
When common-mode voltages are not present, a single supply and ground can be shared for both sides of the part (across the isolation barrier). This is particularly useful for functional testing of the device. If common-mode voltages are to be applied across the isolation barrier, independent power supplies must be provided for each side of the isolator.
A ground plane and a power plane are present on Layer 2 and Layer 3 of the PCB on each side of the isolation barrier. Power connects to VDD1A and VDD1B for Side 1 and to VDD2A and VDD2B for Side 2. The A and B power pins on each side cannot be powered separately.
Each data channel has a variety of structures to help configure, load and monitor both the input and output. Figure 3 below shows one of the data paths from an external connection to the DUT pin. Each channel has similar connections.
Starting at the external connection, the signal path is
Figure 3. Configuration and Monitoring Structures (Showing a Datapath from an External Connection to the DUT Pin)
Note : The numbered components in this Figure correspond to the descriptions in the Data I/O Structures Section above.
Several positions and structures are provided that result in optimum bypass of the evaluation board. 10uF 0805 capacitors are installed at the power connectors (with options for through-hole capacitors if desired) to compensate for long cables to the power supply. For isolator decoupling, .1uF 0603 capacitors are installed on the top side of the PCB at each VDDXX pin.
A distributed capacitive bypass (consisting of tightly coupled power and ground planes on the inner layers) is implemented on the PCB to supplement the standard bypass capacitors. This helps to minimize noise and EMI transmission without using complex design features.