This user guide describes the AD9246S evaluation board which provides all of the support circuitry required to operate this product in its various modes and configurations. The application software used to interface with the devices is also described. The evaluation board has Tyco connectors that mate to the HSC-ADC-EVALCZ data capture board.
The AD9246S and AD9246 data sheets provide additional information and should be consulted when using the evaluation board. All documents and software tools are available at www.analog.com/hsadcevalboard. For additional information or questions, send an email to aero@analog.com.
Figure 1. AD9246S Evaluation Board Connection (6V DC Wall Power)—EVAL-AD9246S
The evaluation board layout, BOM, and schematic files for the EVAL-AD9246S board can be downloaded from the links below.
DISCLAIMER: The footprint used for layout on the evaluation board is provided for general reference only. The exact footprint required for mounting this device onto a printed circuit board will depend on the device lead forming and may differ from what is provided herein. It is recommended to generate specific footprint information from the users lead forming specifications when placing this device on the application printed circuit board.
The canvas files required to run the EVAL-AD9246S board need to be downloaded, unzipped, and saved to an accessible location.
The canvas files can be downloaded from here:
ad9246s_va_canvases.zip
The FPGa file can be download from here:
ad9265_cmos.zip
This section provides quick start procedures for using the EVAL-AD9246S board. Both the default and optional settings are described.
Before using the software for testing, configure the evaluation board as follows:
The evaluation board provides the support circuitry required to operate the AD9246S in its various modes and configurations. Figure 1 shows the typical bench characterization setup used to evaluate AC performance. It is critical that the signal sources used for the analog input and clock have very low phase noise (<1 ps rms jitter) to realize the optimum performance of the signal chain. Proper filtering of the analog input signal to remove harmonics and lower the integrated or broadband noise at the input is necessary to achieve the specified noise performance.
See the evaluation board page linked from the AD9246S product page for the complete schematics and bill of materials (BOM). The evaluation board layout is available upon request. The layout diagrams demonstrate the routing and grounding techniques that should be applied at the system level when designing application boards using this converter.
This evaluation board comes with a wall-mountable switching power supply that provides a 6 V, 2 A maximum output. Connect the supply to a 100 V ac to 240 V ac, 47 Hz to 63 Hz wall outlet. The output from the supply is provided through a 2.1 mm inner diameter jack that connects to the printed circuit board (PCB) at P200. The 6 V supply is fused and conditioned on the PCB before connecting to the low dropout linear regulators that supply the proper bias to each of the various sections on the board.
The evaluation board can be powered in a nondefault condition using external bench power supplies. To do this, remove the all the jumpers listed above (and in Table 1) to disconnect the outputs from the on-board LDOs. This enables the user to bias each section of the board individually. Use P202 and P201 to connect a different supply for each section. A 1.8 V, 0.5 A supply is needed for 1.8 V_AVDD, a 2.5 V, 0.5 A supply is needed for DRVDD, a 2.5 V 0.5 A supply is needed for V-DIG, and a 3.3 V, 0.5 A supply is needed for 3P3V.
When connecting the ADC clock and analog source, use clean signal generators with low phase noise, such as the Rohde & Schwarz SMA signal generator or an equivalent. Use a 1 m shielded, RG-58, 50 Ω coaxial cable for connecting to the evaluation board. Enter the desired frequency and amplitude (see the Specifications section in the AD9246S data sheet). When connecting the analog input source, use of a multipole, narrow-band band-pass filter with 50 Ω terminations is recommended. Analog Devices uses band-pass filters from TTE and K&L Microwave, Inc. Connect the filters directly to the evaluation board.
If an external clock source is used, it should also be supplied with a clean signal generator as previously specified. Analog Devices evaluation boards typically can accept ~2.8 V p-p or 13 dBm sine wave input for the clock.
The AD9246S evaluation board uses the Analog Devices high speed converter evaluation platform (HSC-ADC-EVALCZ) for data capture. The AD9246S digital outputs from the ADC are routed to through buffer U500 and on to Connector P600 using 50 Ω traces. For more information on the data capture board and its optional settings, visit www.analog.com/hsadcevalboard.
Set the jumper settings/link options on the evaluation board for the required operating modes before powering on the board. The functions of the jumpers for the board are described in Table 1. Figures 2 shows the default jumper settings.
Jumper | Description |
---|---|
P204 | This jumper sets up the 1.8 V power supply voltage for the AD9246S AVDD supply input. |
P205 | This jumper sets up the 2.5 V power supply voltage for the AD9246S DRVDD supply input. |
P203 | This jumper sets up the 3.3 V power supply voltage for the OTR circuitry. |
P206 | This jumper sets up the 2.5 V power supply voltage for the digital output buffer and SPI buffer for the AD9246S digital outputs and serial SPI control. |
P500 | By defaults jumpers connect pins 1-2, 4-5, and 8-9 to allow the FPGA on the HSC-ADC-EVALCZ data capture board to drive the AD9246S SPI interface. |
Figure 2. Default Jumper Connections for EVAL-AD9246S Evaluation Board
Plug the switching power supply into a wall outlet rated at 100 V ac to 240 V ac, 47 Hz to 63 Hz. Connect the DC output connector to P200 on the evaluation board.
The analog input on the evaluation board is set up for a double balun-coupled analog input with a 50 Ω impedance. The default analog input configuration supports analog input frequencies of up to ~300 MHz. For additional information on recommended input networks, see the AD9246S data sheet.
The default clock input circuit connects to the Nyquist clock input of the AD9246S. The clock is derived from a simple transformer-coupled circuit using a high bandwidth 1:1 impedance ratio transformer (T400) that adds a low amount of jitter to the clock path. The clock input is 50 Ω terminated and ac-coupled to handle single-ended sine wave types of inputs. The transformer converts the single-ended input to a differential signal before entering the ADC clock inputs. The clock input for the clock is the CLK+ SMA connector J400.
After configuring the board, set up the ADC data capture using the following steps:
Figure 3a. VisualAnalog, Existing Canvas Window
Figure 3b. VisualAnalog, Programming the FPGA for the AD9246S
Figure 4. VisualAnalog Window Toolbar, Collapsed Display
Figure 5. VisualAnalog, Main Window, Expanded Display
After the ADC data capture board setup is complete, set up the SPI controller software using the following procedure:
Figure 6. SPI Controller, CHIP ID(1) Box
Figure 8. SPI Controller, ADCBase0
The next step is to adjust the amplitude of the input signal for each channel as follows:
If the FFT plot appears abnormal, do the following:
If the FFT appears normal but the performance is poor, check the following:
If the FFT window remains blank after Run in VisualAnalog (see Figure 9) is clicked, do the following:
If VisualAnalog indicates that the FIFO Capture timed out, do the following: