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Evaluation board for the AD7944/AD7985/AD7986, 14-/16-/18-Bit PulSAR® ADCs


  • Full-featured evaluation board for the AD7944/AD7985/AD7986
  • PC Control in conjunction with the converter and evalaution development board EVAL-CED1Z
  • PC software for control and data analysis of time and frequency domain
  • Versatile analog signal conditioning circuitry
  • On-board reference, clock oscillator, and buffers
  • Standalone capability

System Requirements

  • Windows XP SP2
  • Windows Vista
  • Windows 7
  • USB 2.0 Port

Software needed

  • Enclosed CD or available via Website download

Evaluation Kit Contents

  • Evaluation board (as ordered EVAL-AD7944EDZ, EVAL-AD7985EDZ, or EVAL-AD7986EDZ)
  • Software CD

Documents required

Equipment required

  • Precision source
    • DC source (low noise for checking different input ranges)
    • AC source (low distortion).
  • Band-pass filter suitable for 16-bit or 18-bit testing (value based on signal frequency).
  • SMB cable
  • Evaluation converter evaluation and development board, EVAL-CED1Z.
  • World-compatible 7 V dc supply (enclosed with EVAL-CED1Z)

General Description

The EVAL-AD79XXEDZ is an evaluation board for the 20-lead AD7944 (14-bit), AD7985 (16-bit), and AD7986(18-bit) PulSAR® analog-to-digital converters (ADCs). On-board components include a high precision, buffered band gap 5.0 V reference (ADR435), reference buffers (AD8032), a signal conditioning circuit with two op-amps (AD8021), and an FPGA for deserializing the serial conversion results. The evaluation board interfaces to the CED capture board by using a 96-pin DIN connector. In addition, SMB connectors, J1 and J2, are provided for the low noise analog signal source.


  1. Install the software from the enclosed CD or by downloading from the Analog Devices, Inc., Website, at
    1. Ensure the evaluation board is disconnected from the USB port of the PC while installing the software.
    2. A PC restart may be required after installation.
  2. Connect the EVAL-CED1Z board to the evaluation board as shown in Figure 2.
  3. Connect the power supply adapter included in the kit to Connecter J4 on the EVAL-CED1Z board.
  4. Connect the EVAL-CED1Z board to the PC via the USB cable.
    1. Choose to automatically search for the drivers for the EVAL-CED1Z board if prompted by the operating system.
    2. For Windows XP you may need to search for the EVAL-CED1Z drivers.
  5. Launch the EVAL-AD7944/AD7985/AD7986EDZ software from the Analog Devices subfolder in the Programs menu.
  6. Select the appropriate device from the drop down menu AD7944, AD7985, or AD7986.
  7. Apply a signal source to the AIN+/AIN− SMB inputs on the evaluation board.
  8. Configure the signal source for the appropriate signal applied to the input of the device.
  9. Capture data by initiating a single capture (F3) or a continuous capture (F4).
  10. See details on configuring the software in the Running the ADC Analysis Software section.

Note that the measurements made by Analog Devices use the Audio Precision SYS-2522.

Evaluation Board Hardware

The low power, AD7944/AD7985/AD7986 ADCs offer very high performance of up to 2.0 MSPS (AD7986) and 2.5 MSPS (AD7944and AD7985) throughput rates using a flexible parallel interface on the 96-pin interface to the EVAL-CED1Z board. The evaluation board is designed to demonstrate the performance of the ADC and to provide an easy-to-understand interface for a variety of system applications. The evaluation board is ideal for use with the Analog Devices Converter and Evaluation Development EVAL-CED1Z (CED). The design offers the flexibility of applying external control signals and is capable of generating conversion results on parallel 16-bit wide buffered outputs. The figure above shows the EVAL-AD7944/AD7985/AD7986EBZ evaluation board. The on-board FPGA, U3, provides the necessary control signals for conversion and deserializes the serial data as the EVAL-CED1Z board uses a parallel interface. The evaluation board is a flexible design that enables the user to choose among many different board configurations, analog signal conditioning, reference, and different modes of conversion data. This evaluation board is a 6-layer board carefully laid out and tested to demonstrate the specific high accuracy performance of the AD7944, AD7985, and AD7986. Figure 23 to Figure 28 show the schematics of the evaluation board.

Device Description

The AD7944 is a 14-bit, 2.5 MSPS successive approximation analog-to-digital converter (SAR ADC), whereas the AD7985 is a 16-bit version of the SAR ADC. The AD7986is an 18-bit 2 MSPS SAR ADC. These ADCs are low power and high speed and include an internal conversion clock, an internal reference (and buffer), error correction circuits, and a versatile serial interface port. On the rising edge of CNV, the ADC samples an analog input, IN+, between 0 V and REF with respect to the ground sense, IN−. The ADCs feature a very high sampling rate turbo mode (TURBO is high) and a reduced power normal mode (TURBO is low) for low power applications where the power is scaled with the throughput. A full description of these products is available in their respective data sheets and should be consulted when using this evaluation board.

Power Supplies

Power is supplied to the board through P3 when used with the EVAL-CED1Z. Each supply is decoupled at the point where it enters the board and again at each device. A single ground plane on this board minimizes the effect of high frequency noise interference. Standalone Operation The evaluation board can be used in standalone mode without the CED controller board. In this case, power supplies need to be applied to the board at P4 or at the relevant test points. At a minimum, the board requires ±5 V, +12 V, +7 V, or + 2.5 V. See Figure 23 for details regarding power supply connections.


The evaluation board ground plane is separated into two sections: a plane for the digital interface circuitry and an analog plane for the analog input and external reference circuitry. To attain high resolution performance, the board was designed to ensure that all digital ground return paths do not cross the analog ground return paths by connecting the planes together directly under the converter.

Conversion Control

The on-board FPGA performs a number of digital functions, one of them being the deserialization of the serial conversion results as the CED data capture boards uses a 16-bit parallel interface. If desired, the deserialized data can be monitored on the 96-pin edge connecter, P1, BD[15:0]. The CED uses a buffered busy signal, BBUSY, as the general interrupt for data.

Analog Inputs

The analog inputs to the evaluation board are J1, J2, and SMB (push on). These inputs are buffered with dedicated amplifier circuitry (A2, A3, and discretes) to allow configuration changes such as positive or negative gain, input range scaling, filtering, addition of a dc component, and use of different op-amps and supplies. The analog input amplifiers are set as unity-gain buffers at the factory. The supplies are selectable with solder pads and are set for the +7 V to −5 V ranges. The default configuration sets both A2 and A3 at midscale generated from either a buffered reference voltage divider or the internal reference of the ADC. The evaluation board is factory configured for providing either a single-ended path or a fully differential path. Because the AD7986 is differential, both inputs and amplifier circuits are used to buffer the IN+ and IN- inputs of the ADCs. For the AD7944 and AD7985 evaluation boards, only the J2, A3, and associated circuitry is used in the path. For dynamic performance, an FFT test can be executed by applying a very low distortion ac source. For low frequency testing, an audio precision source can be used directly because the outputs on these are isolated. Set the audio precision outputs for balanced and floating. Although different sources can be used, most are single ended and use a fixed output resistance. Because the evaluation board uses the amplifiers in unity gain, the noninverting input has a common-mode input with a 590 Ω series resistor, which needs to be taken into account when directly connecting a source (voltage divider).

Serial Interface

The 3-wire serial interface SDI, SCK, and SDO together with CNV are present on the digital interface test points, and FPGA buffered versions are on the 96-pin connector, P1. The on-board Altera FPGA can be reprogrammed to the user’s configuration as the serial device and U1 is in-circuit programmable.

Jumpers, Solder Pads and test points

A number of 3-pin jumpers, solder pads, and test points are provided on the evaluation board and are detailed in Table 1, Table 2, and Table 7. Most of the 3-pin jumpers are used for the reference selection of the ADCs (see the Reference Options section for details and settings).

Table 1. 3-Pin Jumper Descriptions

Jumper Default Position Function
P2 REF to middle ADC REF/REFIN select
P9 REFS to VREF On-board reference/external reference selection
P10 BUF to middle Selection of either Amplifier U2 or bypassing.
P11 REFIN to GND Selection of either the internal reference and/or reference buffer. Used in conjunction with P12 and P9.
P12 PDREF to VIO Selection of either the internal reference of the ADC or an external reference.

Table 2. Solder Pad Descriptions

Solder Pad Default Position Function
JP1, JP2 A2, A3 (bottom to middle)ADC inputs: bottom pad to middle pad are for A2/A3 output. To bypass and use J1/J2 directly, solder top pad to middle pad.
JP3 ADC specificSingle or differential ADC input selection. Top pad to middle pad for the AD7986; bottom pad to middle pad for AD7944 and the AD7985.
JP9, JP10Left pads10-lead or 20-lead amplifier to ADC selection for future use.
VDRV− −5 VA Buffer amplifier negative supply: Selection of GND or −5 VA.
VDRV+ +7 V Buffer amplifier positive supply: selection of 12 V, 7 V, or 5 V.
VCC REF +7 V Reference circuit positive supply: selection of 12 V or 7 V.
AVDD +2.5 V ADC AVDD (analog core) supply: selection of 2.5 V or 5 V on the board or externally. To prevent permanent damage to the ADC, do not solder to 5 V or connect this supply to > 2.5 V.
DVDD +2.5 V ADC DVDD (digital core) supply: selection of 2.5 V or 5 V on the board or externally. To prevent permanent damage to the ADC, do not solder to 5 V or connect this supply to > 2.5 V.
BVDD +5 V ADC BVDD 5 V supply: selection of 5 V on the board or externally. For an external reference, the best performance is obtained when the reference source that is connected to the REF pins and BVDD are the same. See the External Reference: Factory Configuration section for details.
VIO +2.5 V ADC digital input/output supply voltage: selection of 2.5 V or 3.3 V {on board?}or externally.

Solder pads are factory configured for the device being evaluated.

Reference Options

The AD7944/AD7985/AD7986 each have an internal 4.096 V reference together with an internal buffer useful for using an external reference, or it can use an external 5.0 V reference directly. The evaluation board can be configured to use any of these references. A number of jumpers are used to set the reference and are detailed in {what? Table 3?} .

External Reference: Factory Configuration

The evaluation board includes the ADR435 which is a 5 V precision voltage reference. This reference can drive the ADCs and the REF pin directly or it can be buffered with the AD8032; both of which serve as the factory default setting. The best attainable SNR is achieved by using the maximum reference voltage of 5 V (see the appropriate ADC datasheet for details).

Table 3. Factory Reference Jumper Configuration

Jumper Setting
P2 REF and middle
P10 BUF to middle
BVDD 5 V (factory)

To use an external reference source as opposed to the internal reference, there are two methods available, as follows:

  • For an external unbuffered reference, leave P10 to P12 as the factory settings, open P2, and connect a source to the REF test point.
  • The ability to buffer the user external reference is also available. In this case, replace P2, open P9, and apply the source to the VREF test point.

ADC Reference Supply, BVDD

The evaluation board includes a 5 V source for the ADC reference supply, BVDD, set with a pair of solder pads of either 5 V or EXT_B, and a test point, EXT_B {so BVDD can be set with EXT_B as the solder pad and EXT_B as the test point as well?}. For the best performance, derive this supply from the external reference. To use the EXT_B, remove the solder from the 5 V pad and solder the EXT_B pad {to what? BVDD?}.

Internal 4.096 V Reference

The ADC has an internal 4.096 V precision reference and can be used on most applications. Connecting PDREF to GND enables the internal reference. When the internal reference is enabled, 4.096 V as well as a 1.2 V band gap are present on the ADC REF pin and test point. Note that external sources must not be connected to these test points because they {what are “they”? The external sources or the test points?} are directly connected to the ADC pins.

resources/eval/eval-ad7944_85_86edz.1331316821.txt.gz · Last modified: 09 Mar 2012 19:13 by catheriner