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resources:eval:dpg:ad974x-dpg2-ebz [07 May 2018 17:12]
ahurman [SOFTWARE INSTALLATION]
resources:eval:dpg:ad974x-dpg2-ebz [07 May 2018 17:42] (current)
ahurman [BASIC HARDWARE SETUP]
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   * DPG2         P1 and P2   * DPG2         P1 and P2
   * SDP-H1  ​       J4(FMC connector)   * SDP-H1  ​       J4(FMC connector)
-Power up the DPG and connect the USB cable to the PC. Next, run the DPGDownloader Software. A shortcut will be installed to your Start menu during the installation of the DAC Software Suite. To begin, click on the DPGDownloader shortcut in your Programs menu, typically at Start > Programs > Analog Devices > DPG > DPGDownloader.+ 
 +===== GETTING STARTED ===== 
 +It is suggested that the basic set-up is verified before making any modifications to the evaluation board.  
 + 
 +=== Generating a Test Vector with ACE === 
 + * - Power up the DPG and connect the USB cable to the PC.  
 + * - Next, run the DPGDownloader Software. To launch DPGDownloader,,​ click Start > Programs > Analog Devices > DPG > DPGDownloader. A shortcut will be installed to your Start menu during the installation of the DAC Software Suite. ​
 The basic parts of the DPGDownloader window are; Hardware Config Panel, EVB Config, Vector Generation Pull-Down Menu, Vector Palette, Vector Selection Panel and the Download and Play buttons. The basic parts of the DPGDownloader window are; Hardware Config Panel, EVB Config, Vector Generation Pull-Down Menu, Vector Palette, Vector Selection Panel and the Download and Play buttons.
 {{ :​resources:​eval:​dpg:​ad9747-5.png |}} {{ :​resources:​eval:​dpg:​ad9747-5.png |}}
 Figure 5. DPGDownloader Window Figure 5. DPGDownloader Window
   * - If the AD9747 evaluation board has been recognized by the PC, “AD9747 RevB” should be populated in the Evaluation Board field in the Hardware Config panel.   * - If the AD9747 evaluation board has been recognized by the PC, “AD9747 RevB” should be populated in the Evaluation Board field in the Hardware Config panel.
-  * - Generate a sinewave by pulling down the “Add Generated Waveform” menu and choosing “Single Tone”. Fill in the form as shown in Figure 5 (Sample Rate = 100MHz, Desired Frequency = 17.0MHz, etc.). Select the I and Q data vectors in the data selection panel.+  * - Generate a sinewave by pulling down the “Add Generated Waveform” menu and choosing “Single Tone”. Fill in the form as shown in Figure 5 (Sample Rate = 100MHz, Desired Frequency = 17.0MHz, etc.). ​ 
 +  * - Select the I and Q data vectors in the data selection panel.
   * - Configure the eval board by writing the value 01 to register 1E1. This configures the AD9516 to use the CLK input to drive the clock path.   * - Configure the eval board by writing the value 01 to register 1E1. This configures the AD9516 to use the CLK input to drive the clock path.
 {{ :​resources:​eval:​dpg:​ad9747-6.png |}} {{ :​resources:​eval:​dpg:​ad9747-6.png |}}
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   * - Next hit the download button. This transfers the data from the PC to the DPG memory.   * - Next hit the download button. This transfers the data from the PC to the DPG memory.
   * - When the vector has finished downloading,​ hit the play button. This starts the DPG2 transmitting data to the eval board.   * - When the vector has finished downloading,​ hit the play button. This starts the DPG2 transmitting data to the eval board.
 +  * - Open ACE from the start window. It can be found by following the file path to the program or by searching in the windows search bar for “ACE.” The icon indicates the ACE software.
 +  * - If the board is connected properly, ACE will detect it and display it on the Start page under “Attached Hardware.” Double click this board.
 +  * - Ensure that the button is green in the subsystem image under the “System” tab. If not, click it, select the AD9747/​6/​5/​3 and click “Acquire.” Double click on the subsystem image.
 +  * - To the left of the board diagram, there is an Initial Configuration wizard that sets up the DAC and PLL settings of the board. Alter the inputs to match the figure below. Set the “DAC Frequency” to 500MHz, “Interpolation” to 2, “Data Format” to Binary, “Enable PLL Clock” checked, “PLL Mode” set to Auto Mode. Click “Apply.”
 +  * - Double click on the dark blue AD9747/​6/​5/​3 on the board diagram. Ensure that the settings of the AD9747/​6/​5/​3 match with the chip diagram in the figure below and click “Apply Changes.” The “Poll Devices” button and PLL Locked should both be enabled. If neither are enabled, click “Read All” or reset the board, reset the chip, and reapply the settings for the board and chip. For more information about ACE, see the “ACE Software Features” section.
 +
   * - The output from J5 and J9 should be a clean 29MHz tone as shown below:   * - The output from J5 and J9 should be a clean 29MHz tone as shown below:
 {{ :​resources:​eval:​dpg:​ad9747-8.png |}} {{ :​resources:​eval:​dpg:​ad9747-8.png |}}
 +
 ===== Using the AD9743/​AD9745/​AD9746/​AD9747 Evaluation Boards ===== ===== Using the AD9743/​AD9745/​AD9746/​AD9747 Evaluation Boards =====
 The evaluation boards for the AD9743/​AD9745/​AD9746/​AD9747 are identical except for the DUT installed. The operation of the eval boards is also the same except for the vector generation “DAC Resolution” field and the Data Width fields as shown below. The evaluation boards for the AD9743/​AD9745/​AD9746/​AD9747 are identical except for the DUT installed. The operation of the eval boards is also the same except for the vector generation “DAC Resolution” field and the Data Width fields as shown below.
resources/eval/dpg/ad974x-dpg2-ebz.1525705968.txt.gz · Last modified: 07 May 2018 17:12 by ahurman