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resources:eval:dpg:ad974x-dpg2-ebz [27 Apr 2018 17:35]
ahurman [HARDWARE SETUP (DAC OUTPUT)]
resources:eval:dpg:ad974x-dpg2-ebz [07 May 2018 17:42] (current)
ahurman [BASIC HARDWARE SETUP]
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 ====== AD9743/​5/​6/​7 Evaluation Board Quick Start Guide ====== ====== AD9743/​5/​6/​7 Evaluation Board Quick Start Guide ======
 ===== WHAT’S IN THE BOX ===== ===== WHAT’S IN THE BOX =====
-  * WHAT’S IN THE BOX 
   * AD9747-EBZ Evaluation Board   * AD9747-EBZ Evaluation Board
   * Mini-USB Cable   * Mini-USB Cable
   * AD9747 Evaluation Board CD   * AD9747 Evaluation Board CD
-EXAMPLE EQUIPMENT LIST+===== EXAMPLE EQUIPMENT LIST =====
   * +5Vdc Power Supply: Agilent E3630A   * +5Vdc Power Supply: Agilent E3630A
   * Digital Pattern Generator( DPG2 or DPG3) OR System Demonstration Platform( SDP-H1) and FMC to High-Speed DAC Evaluation Board Adaptor(AD-DAC-FMC-ADP)  ​   * Digital Pattern Generator( DPG2 or DPG3) OR System Demonstration Platform( SDP-H1) and FMC to High-Speed DAC Evaluation Board Adaptor(AD-DAC-FMC-ADP)  ​
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 The AD9747 Evaluation Board connects to the Analog Devices Digital Pattern Generator (DPG2, PN: ADI HSC-DAC-DPG-BZ;​ or DPG3, PN: AD –DPG3) or System Demonstration Platform (SDP-H1, PN: EVAL-SDP-CH1Z) to allow for quick evaluation of the AD9747. The DPG2 or SDP-H1 allows the user to create many types of digital vectors and transmit these at speed to the AD9747 in any of the AD9747 operating modes. The AD9747 evaluation board is configured over USB from a panel within the DPGDownloader software. The AD9747 Evaluation Board connects to the Analog Devices Digital Pattern Generator (DPG2, PN: ADI HSC-DAC-DPG-BZ;​ or DPG3, PN: AD –DPG3) or System Demonstration Platform (SDP-H1, PN: EVAL-SDP-CH1Z) to allow for quick evaluation of the AD9747. The DPG2 or SDP-H1 allows the user to create many types of digital vectors and transmit these at speed to the AD9747 in any of the AD9747 operating modes. The AD9747 evaluation board is configured over USB from a panel within the DPGDownloader software.
 (Note: The AD9747 operation is described in detail. The operation of the other devices in the family is described in a later section.) (Note: The AD9747 operation is described in detail. The operation of the other devices in the family is described in a later section.)
-===== SOFTWARE INSTALLATION ===== +===== ACE SOFTWARE INSTALLATION ===== 
-The AD9747 ​application software, DPGDownloader, ​should be installed on the PC prior connecting the hardware to the PC. The DAC Software Suite is included on the Evaluation Board CD, or can be downloaded from the DPG web site at http://www.analog.com/​dpg. +The DAC Software Suite plus AD9747/6/5/3 Update ​should be installed on the PC prior to connecting the hardware to the PC. The DAC Software Suite is included on the Evaluation Board CD, or can be downloaded from the DPG web site at https://wiki.analog.com/​resources/​eval/dpg/​dacsoftwaresuite. This will install DPGDownloader ​(for loading vectors into the DPG2and the AD9747/6/5/3 SPI Controller application. However, ACE, a newer evaluation software from ADI, is the preferred evaluation software over the legacy SPI control graphical user interface (GUI). ACE can be downloaded from the ACE website at www.analog.com/​ace. The ACE plug-in for the evaluation board, which is also required, is available for download on the AD9747/​6/​5/​3 eval webpage in the software section at http://​www.analog.com/​en/​design-center/​evaluation-hardware-and-software/​evaluation-boards-kits/​EVAL-AD9747.html#​eb-relatedsoftware ​
-This will install DPGDownloader ​required ​for loading vectors into the DPG2 and configuring ​the AD9747 evaluation board.+
 ===== HARDWARE SETUP (DAC OUTPUT) ===== ===== HARDWARE SETUP (DAC OUTPUT) =====
 Once the DPGDownloader software is installed, the hardware can be connected . A single 5V power supply powers the evaluation board. The power supply should be able to source up to 1A to cover all the board’s operating conditions. A low jitter clock source (< 0.5psec RMS) should be used for the DACCLK. A sinusoidal clock output level of 0 to 4dBm is optimal. By default, the DAC outputs are connected to SMA connectors for evaluation. Both DAC outputs are available. Later in the document, the modifications for observing the modulator output and different clocking options will be shown. Once the DPGDownloader software is installed, the hardware can be connected . A single 5V power supply powers the evaluation board. The power supply should be able to source up to 1A to cover all the board’s operating conditions. A low jitter clock source (< 0.5psec RMS) should be used for the DACCLK. A sinusoidal clock output level of 0 to 4dBm is optimal. By default, the DAC outputs are connected to SMA connectors for evaluation. Both DAC outputs are available. Later in the document, the modifications for observing the modulator output and different clocking options will be shown.
   * The evaluation board plugs directly into the DPG2 or DPG3.   * The evaluation board plugs directly into the DPG2 or DPG3.
 The PC connects to both the DPG2 and the evaluation board through USB cables as shown in Figure 1 and Figure 2  The PC connects to both the DPG2 and the evaluation board through USB cables as shown in Figure 1 and Figure 2 
-  * The evaluation ​boards ​plugs into the AD-DAC-FMC-ADP adapter board that plugs into the SDP-H1.+  * The evaluation ​board plugs into the AD-DAC-FMC-ADP adapter board that plugs into the SDP-H1.
 The PC connects to both the SDP-H1 and the evaluation board through USB cables as shown in Figure 3 and Figure 4. The PC connects to both the SDP-H1 and the evaluation board through USB cables as shown in Figure 3 and Figure 4.
  
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 Figure 4. SDP-H1 and AD9747 Evaluation Board  Figure 4. SDP-H1 and AD9747 Evaluation Board 
 =====  BASIC HARDWARE SETUP ===== =====  BASIC HARDWARE SETUP =====
 +It is suggested that the basic set-up is verified before making any modifications to the evaluation board.
 Connect the equipment to the AD9747 evaluation board per the following table: Connect the equipment to the AD9747 evaluation board per the following table:
-  * Equipment Connects to AD9747 Eval Board+  * Equipment         ​Connects to AD9747 Eval Board
   * Power Supply P5(+5V),​ P6(GND)   * Power Supply P5(+5V),​ P6(GND)
   * Signal Source J1(CLOCK IN), Set source to 100MHz, 2dBm output   * Signal Source J1(CLOCK IN), Set source to 100MHz, 2dBm output
   * PC USB Cable XP2   * PC USB Cable XP2
   * Spectrum Analyzer J5(IOUT1_P) or J9 (IOUT2_P)   * Spectrum Analyzer J5(IOUT1_P) or J9 (IOUT2_P)
-  * DPG2 P1 and P2 +  * DPG2         ​P1 and P2 
-  * SDP-H1 J4(FMC connector) +  * SDP-H1         ​J4(FMC connector) 
-===== DPGDOWNLOADER SOFTWARE ​===== + 
-Power up the DPG and connect the USB cable to the PC. Next, run the DPGDownloader Software. A shortcut will be installed to your Start menu during the installation of the DAC Software Suite. To begin, click on the DPGDownloader shortcut in your Programs menu, typically at Start > Programs > Analog Devices > DPG > DPGDownloader.+===== GETTING STARTED ​===== 
 +It is suggested that the basic set-up is verified before making any modifications to the evaluation board.  
 + 
 +=== Generating a Test Vector with ACE === 
 + * - Power up the DPG and connect the USB cable to the PC.  
 + * - Next, run the DPGDownloader Software. To launch DPGDownloader,,​ click Start > Programs > Analog Devices > DPG > DPGDownloader. A shortcut will be installed to your Start menu during the installation of the DAC Software Suite. ​
 The basic parts of the DPGDownloader window are; Hardware Config Panel, EVB Config, Vector Generation Pull-Down Menu, Vector Palette, Vector Selection Panel and the Download and Play buttons. The basic parts of the DPGDownloader window are; Hardware Config Panel, EVB Config, Vector Generation Pull-Down Menu, Vector Palette, Vector Selection Panel and the Download and Play buttons.
 {{ :​resources:​eval:​dpg:​ad9747-5.png |}} {{ :​resources:​eval:​dpg:​ad9747-5.png |}}
 Figure 5. DPGDownloader Window Figure 5. DPGDownloader Window
   * - If the AD9747 evaluation board has been recognized by the PC, “AD9747 RevB” should be populated in the Evaluation Board field in the Hardware Config panel.   * - If the AD9747 evaluation board has been recognized by the PC, “AD9747 RevB” should be populated in the Evaluation Board field in the Hardware Config panel.
-  * - Generate a sinewave by pulling down the “Add Generated Waveform” menu and choosing “Single Tone”. Fill in the form as shown in Figure 5 (Sample Rate = 100MHz, Desired Frequency = 17.0MHz, etc.). Select the I and Q data vectors in the data selection panel.+  * - Generate a sinewave by pulling down the “Add Generated Waveform” menu and choosing “Single Tone”. Fill in the form as shown in Figure 5 (Sample Rate = 100MHz, Desired Frequency = 17.0MHz, etc.). ​ 
 +  * - Select the I and Q data vectors in the data selection panel.
   * - Configure the eval board by writing the value 01 to register 1E1. This configures the AD9516 to use the CLK input to drive the clock path.   * - Configure the eval board by writing the value 01 to register 1E1. This configures the AD9516 to use the CLK input to drive the clock path.
 {{ :​resources:​eval:​dpg:​ad9747-6.png |}} {{ :​resources:​eval:​dpg:​ad9747-6.png |}}
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   * - Next hit the download button. This transfers the data from the PC to the DPG memory.   * - Next hit the download button. This transfers the data from the PC to the DPG memory.
   * - When the vector has finished downloading,​ hit the play button. This starts the DPG2 transmitting data to the eval board.   * - When the vector has finished downloading,​ hit the play button. This starts the DPG2 transmitting data to the eval board.
 +  * - Open ACE from the start window. It can be found by following the file path to the program or by searching in the windows search bar for “ACE.” The icon indicates the ACE software.
 +  * - If the board is connected properly, ACE will detect it and display it on the Start page under “Attached Hardware.” Double click this board.
 +  * - Ensure that the button is green in the subsystem image under the “System” tab. If not, click it, select the AD9747/​6/​5/​3 and click “Acquire.” Double click on the subsystem image.
 +  * - To the left of the board diagram, there is an Initial Configuration wizard that sets up the DAC and PLL settings of the board. Alter the inputs to match the figure below. Set the “DAC Frequency” to 500MHz, “Interpolation” to 2, “Data Format” to Binary, “Enable PLL Clock” checked, “PLL Mode” set to Auto Mode. Click “Apply.”
 +  * - Double click on the dark blue AD9747/​6/​5/​3 on the board diagram. Ensure that the settings of the AD9747/​6/​5/​3 match with the chip diagram in the figure below and click “Apply Changes.” The “Poll Devices” button and PLL Locked should both be enabled. If neither are enabled, click “Read All” or reset the board, reset the chip, and reapply the settings for the board and chip. For more information about ACE, see the “ACE Software Features” section.
 +
   * - The output from J5 and J9 should be a clean 29MHz tone as shown below:   * - The output from J5 and J9 should be a clean 29MHz tone as shown below:
 {{ :​resources:​eval:​dpg:​ad9747-8.png |}} {{ :​resources:​eval:​dpg:​ad9747-8.png |}}
 +
 ===== Using the AD9743/​AD9745/​AD9746/​AD9747 Evaluation Boards ===== ===== Using the AD9743/​AD9745/​AD9746/​AD9747 Evaluation Boards =====
 The evaluation boards for the AD9743/​AD9745/​AD9746/​AD9747 are identical except for the DUT installed. The operation of the eval boards is also the same except for the vector generation “DAC Resolution” field and the Data Width fields as shown below. The evaluation boards for the AD9743/​AD9745/​AD9746/​AD9747 are identical except for the DUT installed. The operation of the eval boards is also the same except for the vector generation “DAC Resolution” field and the Data Width fields as shown below.
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 {{ :​resources:​eval:​dpg:​ad9747-9.png |}} {{ :​resources:​eval:​dpg:​ad9747-9.png |}}
 ===== Selecting the Modulator Outputs ===== ===== Selecting the Modulator Outputs =====
-By default, solder jumpers JP4, JP5, JP6, and JP7 configure the DAC outputs to be observed at SMA outputs J5 and J9. This jumper setting is shown in Figure ​6 a). To connect the DAC outputs to the LPF and the ADL537x analog quadrature modulator, the solder jumpers need to be repositioned as shown in Figure ​6 b). The modulator output can be observed thru the SMA connector J6 (MODULATED OUTPUT). The modulator LO input can be sourced thru SMA connector J10 (LOCAL OSC INPUT). The clock level into the modulator should be set to about 3dBm.+By default, solder jumpers JP4, JP5, JP6, and JP7 configure the DAC outputs to be observed at SMA outputs J5 and J9. This jumper setting is shown in Figure ​6a). To connect the DAC outputs to the LPF and the ADL537x analog quadrature modulator, the solder jumpers need to be repositioned as shown in Figure ​6b). The modulator output can be observed thru the SMA connector J6 (MODULATED OUTPUT). The modulator LO input can be sourced thru SMA connector J10 (LOCAL OSC INPUT). The clock level into the modulator should be set to about 3dBm.
 {{ :​resources:​eval:​dpg:​ad9747-10.png |}} {{ :​resources:​eval:​dpg:​ad9747-10.png |}}
 +        Figure 6a) DAC Output Configuration  ​                    ​Figure 6b) Modulator Output Configuration ​
 ===== Eval Board Jumper Options ===== ===== Eval Board Jumper Options =====
-There are 6 pin jumpers on the evaluation board corresponding to the 6 supplies on the board. They serve as ‘switches’ that determine if the LDOs on board or external supplies are used for each individual supply. They are shunted by default, which means on board LDOs  are used. When an external supply is necessary, pull off the shunt from the corresponding supply and connect the external supply to the SMA test points close to the jumper.+There are 6 pin jumpers on the evaluation board corresponding to the 6 supplies on the board. They serve as ‘switches’ that determine if the on board LDOs or external supplies are used for each individual supply. They are shunted by default, which means on board LDOs are used. When an external supply is necessary, pull off the shunt from the corresponding supply and connect the external supply to the SMA test points close to the jumper.
 {{ :​resources:​eval:​dpg:​ad9747-11.png |}} {{ :​resources:​eval:​dpg:​ad9747-11.png |}}
  
resources/eval/dpg/ad974x-dpg2-ebz.1524843342.txt.gz · Last modified: 27 Apr 2018 17:35 by ahurman