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resources:eval:dpg:ad917x-fmc-ebz [24 Jun 2020 17:46] – [KCU105 Setup] Eric Chaykovskyresources:eval:dpg:ad917x-fmc-ebz [09 Feb 2022 21:19] (current) – [ADS7/ADS8-V1 Setup] Arik Landsman
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   * AD9171-FMC-EBZ or AD9172-FMC-EBZ or AD9173-FMC-EBZ or AD9174-FMC-EBZ or AD9175-FMC-EBZ or AD9176-FMC-EBZ Evaluation Board   * AD9171-FMC-EBZ or AD9172-FMC-EBZ or AD9173-FMC-EBZ or AD9174-FMC-EBZ or AD9175-FMC-EBZ or AD9176-FMC-EBZ Evaluation Board
   * Mini USB cable   * Mini USB cable
 +
 +=== Additional Components Needed for an ADS7 / ADS8-V1 Evaluation Platform ===
 +  * Pattern generator board: ADS7 (up to 13Gbps SERDES) or ADS8-V1 (covers the full AD917x range): [[adi>en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/ADS8-V1EBZ.html]]
  
 **Note: if using the Xilinx KCU105 evaluation kit as a pattern generator, customers will need to purchase the following additional components:** **Note: if using the Xilinx KCU105 evaluation kit as a pattern generator, customers will need to purchase the following additional components:**
  
-=== Additional Components Needed for KCU105 Evaluation Platform ===+=== Additional Components Needed for KCU105 Evaluation Platform ===
   * Xilinx KCU105 Evaluation Kit: http://www.xilinx.com/products/boards-and-kits/kcu105.html   * Xilinx KCU105 Evaluation Kit: http://www.xilinx.com/products/boards-and-kits/kcu105.html
   * Cypress FX3 SuperSpeed Explorer Kit (CYUSB3KIT-003): https://www.cypress.com/documentation/development-kitsboards/cyusb3kit-003-ez-usb-fx3-superspeed-explorer-kit   * Cypress FX3 SuperSpeed Explorer Kit (CYUSB3KIT-003): https://www.cypress.com/documentation/development-kitsboards/cyusb3kit-003-ez-usb-fx3-superspeed-explorer-kit
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-==== ADS7/ADS8 Setup ==== +==== ADS7/ADS8-V1 Setup ==== 
 +<note important>NOTE: The ADS8-V1 covers the full range of the SERDES (JESD204B) lane rate of the device, up-to 16Gbps. The ADS7 is limited to a 13Gbps Lane rate, and may be a good economical alternative for users interested to operate at lower datarates.</note>
 The Cypress FX3 and interconnect board are not needed if the ADS7 or ADS8 board is used for data pattern generation. The hardware setup configuration when using the ADS7/ADS8 is as follows: The Cypress FX3 and interconnect board are not needed if the ADS7 or ADS8 board is used for data pattern generation. The hardware setup configuration when using the ADS7/ADS8 is as follows:
   - Connect the AD917x-FMC-EBZ board to the FMC connector on the ADS7 or ADS8.   - Connect the AD917x-FMC-EBZ board to the FMC connector on the ADS7 or ADS8.
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 {{ :resources:eval:dpg:ad9172:figure3_ads8_ad9172fmc.png?direct |}} {{ :resources:eval:dpg:ad9172:figure3_ads8_ad9172fmc.png?direct |}}
-Figure 3. Evaluation Board Kit Components Hardware Connection Setup with ADS8+Figure 3. Evaluation Board Kit Components Hardware Connection Setup with ADS8-V1
  
 ==== KCU105 Setup ==== ==== KCU105 Setup ====
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 === Using KCU105 with DPG Downloader === === Using KCU105 with DPG Downloader ===
  
-The KCU-105 board requires some additional setup steps to be compatible with the DPGDownloader software.  A Micro-SD card that contains the FPGA image used with DPGDownloader is included in the evaluation kit Before powering on the KCU105 unit, this Micro-SD card should be inserted into the appropriate slot on the bottom right-hand side of the KCU105 evaluation board as shown in Figure 1.  In order to boot up the KCU105 board using the image from the Micro-SD card, ensure that the DIP switch settings on SW15 are set according to Figure 2 below.+The KCU105 board requires some additional setup steps to be compatible with the DPGDownloader software, and these steps only need to be done **once** to properly configure the FPGA for future use with DPGDownloader. Before powering on the KCU105 unit, insert the Micro SD card with FPGA image into the appropriate slot on the bottom right-hand side of the KCU105 evaluation board as shown in Figure 1. Be certain to verify that the Micro SD card clicks into place when inserted. In order to boot up the KCU105 board using the image from the Micro SD card, ensure that the DIP switch settings on SW15 are set according to Figure 2 below.
  
 {{ :resources:eval:dpg:ad9172:figure2_kcuswitch.png?direct |}} {{ :resources:eval:dpg:ad9172:figure2_kcuswitch.png?direct |}}
 Figure 2. KCU105 DIP Switch Settings for Loading Image from Micro-SD Card Figure 2. KCU105 DIP Switch Settings for Loading Image from Micro-SD Card
  
-Once these steps are complete, the KCU105 board can be powered on and plugged into the USB ports on the host PC. This step only needs to be done once in order to set up the FPGA board properly for any future use with DPGDownloader software.+Once these steps are complete, the KCU105 board can be powered on and plugged into the USB ports on the host PC. After powering on the KCU105, wait approximately 10 seconds so that the KCU105 has adequate time to load the FPGA image. If the KCU105's LEDs begin flashing immediately after power on, then the FPGA image has not been loaded correctly. In this case, remove the Micro SD card, confirm that the appropriate files are stored on the card, and repeat the above procedure. Be sure to verify that your Micro SD card is not being encoded when you write the FPGA image to it. Proper FPGA image programming can be confirmed by looking at the 3 LEDs near the KCU105's power switch--these 3 LEDs should be toggling in a heartbeat pattern
  
 ==== Other FPGA Development Kits==== ==== Other FPGA Development Kits====
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 The outputs of the AD917x can be captured at the SMA connectors: J1 for DAC0; J2 for DAC1; and J3 for CLKOUT. The outputs of the AD917x can be captured at the SMA connectors: J1 for DAC0; J2 for DAC1; and J3 for CLKOUT.
 +
 +Some applications may be more sensitive to clock spurious. To prevent any spurious coupling from the onboard HMC7044 onto the AD917x output, the HMC7044 may be kept in reset:
 +
 +  - reset the board in ACE (Reset Board button in the "AD917x-FMC-EBZ" view) 
 +  - in the Wizard, under Eval System Option select chip to configure: "AD917x Only". This will keep the HMC7044 in reset after step #1.
 +  - Under DC Test Mode, select the option "Main" or "Channel" to enable the NCO-only mode 
 +  - Under SERDES Interface, set the link mode and interpolation (this will apply a clock to the corresponding datapaths. E.g. dual-link to enable both datapath0 and datapath1, that would feed DAC0 and DAC1 respectively)
 +  - Under Clock frequencies, set the Input Data Rate to set the DAC Clock Rate. DAC Clock Rate = Data Rate * Interpolation.
  
  
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 The raw macro file will be saved using ACE syntax, which is not easily readable. To remedy this, the ACE software download includes the Macro to Hex Conversion Tool. The user can choose to include or exclude register write, reads, and/or comments in the conversion. The file pathways for the source and save paths should be the same, except that one should be an .acemacro file and the other should be a .txt file. The “Convert” button converts and opens the converted text file, which is easier to read. The conversion tool can also convert back to an .acemacro file if desired. The Macro to Hex converter tool is located in the start menu under "All Programs" --> "Analog Devices" --> "ACE" --> "Tools". The raw macro file will be saved using ACE syntax, which is not easily readable. To remedy this, the ACE software download includes the Macro to Hex Conversion Tool. The user can choose to include or exclude register write, reads, and/or comments in the conversion. The file pathways for the source and save paths should be the same, except that one should be an .acemacro file and the other should be a .txt file. The “Convert” button converts and opens the converted text file, which is easier to read. The conversion tool can also convert back to an .acemacro file if desired. The Macro to Hex converter tool is located in the start menu under "All Programs" --> "Analog Devices" --> "ACE" --> "Tools".
 +<note important>NOTE: The latest version of ACE includes a new "Generate" option to output the register hex format directly and the Macro Converter is deprecated.</note>
 <WRAP column 40%> <WRAP column 40%>
 {{ :resources:eval:user-guides:ad9122_m2hconvert_5.png }} {{ :resources:eval:user-guides:ad9122_m2hconvert_5.png }}
resources/eval/dpg/ad917x-fmc-ebz.1593013582.txt.gz · Last modified: 24 Jun 2020 17:46 by Eric Chaykovsky