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| resources:eval:dpg:ad9154-m6720-ebz [27 Feb 2015 20:48] – 4556 Larry Welch | resources:eval:dpg:ad9154-m6720-ebz [27 Feb 2015 20:52] – w Larry Welch | ||
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| - | ====== AD9154-M6720-EBZ Evaluation Board Quick Start Guide ====== | + | ====== AD9154-ADRF6720-EBZ Evaluation Board Quick Start Guide ====== |
| - | ===== Getting Started with the AD9154-M6720-EBZ Evaluation Board and Software ===== | + | ===== Getting Started with the AD9154-ADRF6720-EBZ Evaluation Board and Software ===== |
| ==== What's in the Box ==== | ==== What's in the Box ==== | ||
| - | * [[adi> | + | * [[adi> |
| * Evaluation Board CD | * Evaluation Board CD | ||
| * Mini-USB Cable | * Mini-USB Cable | ||
| Line 11: | Line 11: | ||
| * Data Pattern Generator Series 3 (DPG3) | * Data Pattern Generator Series 3 (DPG3) | ||
| ===== Introduction ====== | ===== Introduction ====== | ||
| - | The AD9154-M6720-EBZ connects to a DPG3. The AD9154 is a quad JESD204B signal processing RF Digital to Analog Converter. The DPG3 automatically formats the data and sends it to the AD9154-M6720-EBZ via its JESD204B lanes. The AD9154-M6720-EBZ includes an AD9154 and two ADRF6720-27 Wideband Quadrature Modulators with Integrated PLL and VCO. There is a board level passive low pass filter between the output of each AD9154 DAC and its corresponding ADRF6720-27 baseband input. The Evaluation Board (EVB) runs from a single +5V lab supply. A clock distribution chip AD9516 is included on this EVB as a clock fan-out and frequency divider for the DACCLK, JESD204B SYSREF signals, and a CFRAME clock used by the DPG3. | + | The AD9154-ADRF6720-EBZ connects to a DPG3. The AD9154 is a quad JESD204B signal processing RF Digital to Analog Converter. The DPG3 automatically formats the data and sends it to the AD9154-M6720-EBZ via its JESD204B lanes. The AD9154-M6720-EBZ includes an AD9154 and two ADRF6720-27 Wideband Quadrature Modulators with Integrated PLL and VCO. There is a board level passive low pass filter between the output of each AD9154 DAC and its corresponding ADRF6720-27 baseband input. The Evaluation Board (EVB) runs from a single +5V lab supply. A clock distribution chip AD9516 is included on this EVB as a clock fan-out and frequency divider for the DACCLK, JESD204B SYSREF signals, and a CFRAME clock used by the DPG3. |
| ===== AD9154 and ADRF6720-27 Evaluation Software ===== | ===== AD9154 and ADRF6720-27 Evaluation Software ===== | ||
| The AD9154 and ADRF6720-27 Evaluation software runs on the easy-to-use SPIPro graphical user interface (GUI). It is included on the Evaluation Board CD. | The AD9154 and ADRF6720-27 Evaluation software runs on the easy-to-use SPIPro graphical user interface (GUI). It is included on the Evaluation Board CD. | ||
resources/eval/dpg/ad9154-m6720-ebz.txt · Last modified: 08 Jan 2021 11:03 by Ioana Chelaru