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resources:eval:dpg:ad9154-ebz [20 Jun 2017 23:03] Bailey Meyerresources:eval:dpg:ad9154-ebz [28 Jul 2017 20:46] (current) Bailey Meyer
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 ===== Getting Started with the AD9154-EBZ Evaluation Board and Software ===== ===== Getting Started with the AD9154-EBZ Evaluation Board and Software =====
 ==== What's in the Box ==== ==== What's in the Box ====
-  * [[adi>AD9154-EBZ]]  Evaluation Board for DPG3+  * [[adi>AD9154-EBZ]] Evaluation Board for DPG3
   * Evaluation Board CD   * Evaluation Board CD
   * Mini-USB Cable   * Mini-USB Cable
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 The AD9154-EBZ connects to a DPG3. The AD9154 is a quad JESD204B signal processing RF Digital to Analog Converter. The DPG3 automatically formats the data and sends it to the AD9154-EBZ via its JESD204B lanes. The Evaluation Board (EVB) runs from a single +5V lab supply. A clock distribution chip AD9516 is included on this EVB as a clock fan-out and frequency divider for the DACCLK, JESD204B SYSREF signals, and a CFRAME clock used by the DPG3.  The AD9154-EBZ connects to a DPG3. The AD9154 is a quad JESD204B signal processing RF Digital to Analog Converter. The DPG3 automatically formats the data and sends it to the AD9154-EBZ via its JESD204B lanes. The Evaluation Board (EVB) runs from a single +5V lab supply. A clock distribution chip AD9516 is included on this EVB as a clock fan-out and frequency divider for the DACCLK, JESD204B SYSREF signals, and a CFRAME clock used by the DPG3. 
 ===== AD9154 Evaluation Software ===== ===== AD9154 Evaluation Software =====
-There are two evaluation softwares available for the AD9154: ACE, the preferred evaluation software from ADI, and the legacy SPIPro graphical user interface (GUI). Both are included on the Evaluation Board CD. ACE can also be downloaded from the ACE website at https://wiki.analog.com/resources/tools-software/ace. In addition, the ACE plugin for the [[adi>EVAL-AD9154]] is available in the software section of the eval webpage. DPGDownloader is used with both evaluation softwares and can be downloaded from the DPG website at http://www.analog.com/dpg.   +There are two evaluation softwares available for the AD9154: ACE, the preferred evaluation software from ADI, and the legacy SPIPro graphical user interface (GUI). Both are included on the Evaluation Board CD. ACE can also be downloaded from the ACE website at https://wiki.analog.com/resources/tools-software/ace. In addition, the ACE plugin for the AD9154 is available in the software section of the [[adi>EVAL-AD9154]] eval webpage. DPGDownloader is used with both evaluation softwares and can be downloaded from the DPG website at http://www.analog.com/dpg.   
 ===== Hardware Setup ===== ===== Hardware Setup =====
  Figure 1 shows the block diagram of the set-up.    Figure 1 shows the block diagram of the set-up.  
 +<WRAP center> 
  
-{{:resources:eval:dpg:9154ebz_figure_1_1.png?nolink|}} +| {{ {{ :resources:eval:dpg:9154ebz_figure_1_1.png?nolink |}} |  
-| Figure 1.  AD9154-EBZ Lab Block Diagram + 
-{{:resources:eval:dpg:9154ebz_figure_2.png?nolink|}} + Figure 1.  AD9154-EBZ Lab Block Diagram 
-| Figure 2.  Top view of AD9154-EBZ  |+</WRAP> 
 +<WRAP center>  
 + 
 +| {{ {{ :resources:eval:dpg:9154ebz_figure_2.png?nolink |}} |  
 + 
 + Figure 2.  Top view of AD9154-EBZ  | 
 +</WRAP>
  
 Connect +5.0V to P5, GND to P6. A low phase noise high frequency clock source should be connected to the SMA connector J1 (CLK_IN). A spectrum analyzer should be connected to the SMA connector J17. Connect J4, J5, and J7 to an oscilloscope. The evaluation board connects to the DPG3 through the connector P4. The PC should be connected to the EVB using the mini-USB connector XP2. Figure 1 shows a block diagram of the set-up.  Connect +5.0V to P5, GND to P6. A low phase noise high frequency clock source should be connected to the SMA connector J1 (CLK_IN). A spectrum analyzer should be connected to the SMA connector J17. Connect J4, J5, and J7 to an oscilloscope. The evaluation board connects to the DPG3 through the connector P4. The PC should be connected to the EVB using the mini-USB connector XP2. Figure 1 shows a block diagram of the set-up. 
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 === Using ACE === === Using ACE ===
  
-1. Open ACE (Start > All Programs > Analog Devices > ACE > ACE). The {{:resources:eval:user-guides:ace_icon_small.png}} icon indicates the ACE software. If the board is connected properly, the screen should look similar to Figure 4. Double click on this board. \\ \\+1. Configure the hardware according to the hardware set-up instructions given in the Hardware Setup section above. Set the frequency of the DAC clock signal generator to 1.5 GHz, and the output level to 3dBm. The spectrum analyzer can be configured as shown in Figure 9 with a resolution bandwidth of 100kHz. Choose an Input Attenuation of 24dB. 
 + 
 +2. Open ACE (Start > All Programs > Analog Devices > ACE > ACE). The {{:resources:eval:user-guides:ace_icon_small.png}} icon indicates the ACE software. If the board is connected properly, the screen should look similar to Figure 3. Double click on this board. \\ \\
 <WRAP center>   <WRAP center>  
  
 | {{ {{ :resources:eval:user-guides:ad9154_detected.png |}} |  | {{ {{ :resources:eval:user-guides:ad9154_detected.png |}} | 
  
-|  Figure 4. Detected AD9154 in ACE  |+|  Figure 3. Detected AD9154 in ACE  |
 </WRAP> </WRAP>
  
-Ensure that the {{:resources:eval:user-guides:connection_icon.png}} button is green in the subsystem image under the “System” tab, as shown in Figure 5. If not, click it, select the AD9136/5, and click //Acquire//. Double click on the subsystem image to reach the board block diagram.+Ensure that the {{:resources:eval:user-guides:connection_icon.png}} button is green in the subsystem image under the “System” tab, as shown in Figure 4. If not, click it, select the AD9154, and click "Acquire.Double click on the subsystem image to reach the board block diagram.
 <WRAP center>   <WRAP center>  
  
 | {{ {{ :resources:eval:user-guides:ad9154_system.png |}} |  | {{ {{ :resources:eval:user-guides:ad9154_system.png |}} | 
  
-|  Figure 5. AD9154 system  |+|  Figure 4. AD9154 system  |
 </WRAP> </WRAP>
  
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 | {{ {{ :resources:eval:user-guides:ad9154_boardview_enabled.png |}} |  | {{ {{ :resources:eval:user-guides:ad9154_boardview_enabled.png |}} | 
  
-|  Figure 6AD9135 board block diagram. The JESD PLL should not be locked yet  |+|  Figure 5AD9154 board block diagram. The JESD PLL should not be locked yet  |
 </WRAP> </WRAP>
  
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 | {{ {{ :resources:eval:user-guides:ad9154_applypage.png |}} |  | {{ {{ :resources:eval:user-guides:ad9154_applypage.png |}} | 
  
-|  Figure 7. Initial configuration settings for the AD9154  |+|  Figure 6. Initial configuration settings for the AD9154  |
 </WRAP> </WRAP>
  
-Double click on the dark blue AD9154 chip block in the board block diagram. The chip block diagram should appear, as shown in Figure 8. The JESD PLL should now be locked on both the board and chip block diagrams. Other parameters can be changed on both block diagrams, but do not need to be for this test. For more information about changing parameters in ACE, see the ACE Software Features section. +Double click on the dark blue AD9154 chip block in the board block diagram. The chip block diagram should appear, as shown in Figure 7. The JESD PLL should now be locked on both the board and chip block diagrams. Other parameters can be changed on both block diagrams, but do not need to be for this test. For more information about changing parameters in ACE, see the ACE Software Features section. 
 <WRAP center>  <WRAP center> 
  
 | {{ {{ :resources:eval:user-guides:ad9154_chipview.png |}} |  | {{ {{ :resources:eval:user-guides:ad9154_chipview.png |}} | 
  
-|  Figure 8AD9135 chip block diagram  |+|  Figure 7AD9154 chip block diagram  |
 </WRAP> </WRAP>
  
  
-2. Open DPGDownloader. (Start > All Programs > Analog Devices > DPG > DPGDownloader). DPGDownloader GUI will come up. Select the Port configuration QBF 1X8 85G 425M. The configuration progress bar will then show a moving green indication. Once port configuration is complete, select “Add Generated Waveform” and “Single Tone." Set Data Rate to 750 MHz, Desired Frequency to 112 MHz, Amplitude to -1.0 dBFS, uncheck unsigned, check Generate Complex Data (I&Q). Under Data Playback, select I data for DAC 0 and DAC2, and Q data for DAC 1 and DAC3. These settings should match those in the DPGDownloader panel in Figure 12+3. Open DPGDownloader. (Start > All Programs > Analog Devices > DPG > DPGDownloader). DPGDownloader GUI will come up. Select the Port configuration QBF 1X8 85G 425M. The configuration progress bar will then show a moving green indication. Once port configuration is complete, select “Add Generated Waveform” and “Single Tone." Set Data Rate to 750 MHz, Desired Frequency to 112 MHz, Amplitude to -1.0 dBFS, uncheck unsigned, check Generate Complex Data (I&Q). Under Data Playback, select I data for DAC 0 and DAC2, and Q data for DAC 1 and DAC3. These settings should match those in the DPGDownloader panel in Figure 8 
 +<WRAP center> 
  
-{{:resources:eval:user-guides:ad9154_dpgd.png|}}+| {{ {{ :resources:eval:user-guides:ad9154_dpgd.png |}} 
  
-|  Figure 12. DPGDownloader settings  |+|  Figure 8. DPGDownloader settings  | 
 +</WRAP>
  
-f. Click Download ({{:resources:eval:dpg:image009.png?direct&|}}) and Play ({{:resources:eval:dpg:image010.png?direct&|}}) in the DPG Downloader screen. The spectrum in Figure will appear on all 4 DAC outputs (J17, J4, J5, and J7), Serial Line Rate will be 7.5 Gbps. The current on the 5V supply should read around 1800mA - 1950mA. Figure is a scope capture of the DAC output signal taken on three of the channels.+4. Click Download ({{:resources:eval:dpg:image009.png?direct&|}}) and Play ({{:resources:eval:dpg:image010.png?direct&|}}) in the DPG Downloader screen. The spectrum in Figure will appear on all 4 DAC outputs (J17, J4, J5, and J7), Serial Line Rate will be 7.5 Gbps. The current on the 5V supply should read around 1800mA - 1950mA. Figure 10 is a scope capture of the DAC output signal taken on three of the channels.
    
-8. Here is what you will see at the output of DAC0 on the Spectrum Analyzer. \\ \\+5. Here is what you will see at the output of DAC0 on the Spectrum Analyzer. \\ \\ 
 +<WRAP center> 
  
-{{:resources:eval:dpg:9154ebz_figure_7.png?nolink|}}+| {{ {{ :resources:eval:dpg:9154ebz_figure_7.png?nolink |}} 
  
-|  Figure 7. DAC Output Spectrum Analyzer Display  |+|  Figure 9. DAC Output Spectrum Analyzer Display  | 
 +</WRAP>
  
-9. Here’s what you will see on DAC1, DAC2, and DAC3 on the scope. +6. Here’s what you will see on DAC1, DAC2, and DAC3 on the scope.  
 +<WRAP center> 
  
-{{:resources:eval:dpg:9154ebz_figure_8.png?nolink|}}+| {{ {{ :resources:eval:dpg:9154ebz_figure_8.png?nolink |}} 
  
-|  Figure 8. DAC Outputs Scope Display |+|  Figure 10. DAC Outputs Scope Display  | 
 +</WRAP>
  
 === Using the SPIPro software === === Using the SPIPro software ===
  
-1. Configure the hardware according to the hardware set-up instructions given in the Hardware Setup section above. Set the frequency of the DAC clock signal generator to 1.5 GHz, and the output level to 3dBm. The spectrum analyzer can be configured as shown in Figure with a resolution bandwidth of 100kHz. Choose an Input Attenuation of 24dB. +1. Configure the hardware according to the hardware set-up instructions given in the Hardware Setup section above. Set the frequency of the DAC clock signal generator to 1.5 GHz, and the output level to 3dBm. The spectrum analyzer can be configured as shown in Figure 15 with a resolution bandwidth of 100kHz. Choose an Input Attenuation of 24dB. 
  
-2. On your lab computer, open the AD9154 SPIPro application (Start > All Programs > Analog Devices > AD9154 > AD9154 SPI). You will see the GUI shown in Figure come up.+2. On your lab computer, open the AD9154 SPIPro application (Start > All Programs > Analog Devices > AD9154 > AD9154 SPI). You will see the GUI shown in Figure 11 come up. 
 +<WRAP center> 
  
 +| {{ {{ :resources:eval:dpg:9154ebz_figure_3.png?nolink |}} | 
  
- + Figure 11. AD9154 SPIPro at start up  
-{{:resources:eval:dpg:9154ebz_figure_3.png?nolink|}} +</WRAP>
-   Figure 3. AD9154 SPIPro at start up   +
  
 3. SPIPro Start Up Sequence.  3. SPIPro Start Up Sequence. 
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 e. Press the “Configure DAC and Clock” Button  e. Press the “Configure DAC and Clock” Button 
  
-f. The JESD204B PLL Lock Readback light should turn green and register bit settings will be populated. The GUI will look like Figure 4, except that values in “CodeGrpSync”, “FrameSync”, “GoodCheckSum”, and “InitialLaneSync” may be different because the link JESD204B Transmitter has not yet been set up.+f. The JESD204B PLL Lock Readback light should turn green and register bit settings will be populated. The GUI will look like Figure 12, except that values in “CodeGrpSync”, “FrameSync”, “GoodCheckSum”, and “InitialLaneSync” may be different because the link JESD204B Transmitter has not yet been set up.
  
 4. DPGDownloader Start Up Sequence 4. DPGDownloader Start Up Sequence
  
-a. Open DPGDownloader. (Start > All Programs > Analog Devices > DPG > DPGDownloader). DPGDownloader GUI will come up as shown Figure 5.  +a. Open DPGDownloader. (Start > All Programs > Analog Devices > DPG > DPGDownloader). DPGDownloader GUI will come up as shown Figure 13.  
  
 b. Select the Port configuration QBF 1X8 85G 425M. The configuration progress bar will then show a moving green indication. b. Select the Port configuration QBF 1X8 85G 425M. The configuration progress bar will then show a moving green indication.
  
-c. Once port configuration is complete, select “add generated waveform” and “single tone”.+c. Once port configuration is complete, select “Add Generated Waveform” and “Single Tone”.
  
 d. Set Data Rate to 750 MHz, Desired Frequency to 112 MHz, Amplitude to -1.0 dBFS, uncheck unsigned, check Generate Complex Data (I&Q). d. Set Data Rate to 750 MHz, Desired Frequency to 112 MHz, Amplitude to -1.0 dBFS, uncheck unsigned, check Generate Complex Data (I&Q).
  
-e. Under Data Playback, select I data for DAC 0 and DAC2, and Q data for DAC 1 and DAC3.+e. Under Data Playback, select I data for DAC 0 and DAC2, and Q data for DAC 1 and DAC3. The DPGDownloader settings should resemble Figure 14
  
-f. Click Download ({{:resources:eval:dpg:image009.png?direct&|}}) and Play ({{:resources:eval:dpg:image010.png?direct&|}}) in the DPG Downloader screen. The spectrum in Figure will appear on all 4 DAC outputs (J17, J4, J5, and J7), Serial Line Rate will be 7.5Gbps. Figure is a scope capture of the DAC output signal taken on three of the channels.+f. Click Download ({{:resources:eval:dpg:image009.png?direct&|}}) and Play ({{:resources:eval:dpg:image010.png?direct&|}}) in the DPG Downloader screen. The spectrum in Figure 15 will appear on all 4 DAC outputs (J17, J4, J5, and J7), Serial Line Rate will be 7.5Gbps. Figure 16 is a scope capture of the DAC output signal taken on three of the channels.
  
-5. On SPIPro Quick Start Tab, click “Read All Registers” and confirm the GUI looks the same as Figure 4+5. On SPIPro Quick Start Tab, click “Read All Registers” and confirm the GUI looks the same as Figure 12
  
 6. The current on the 5V supply should read around 1800mA - 1950mA.  6. The current on the 5V supply should read around 1800mA - 1950mA. 
- +<WRAP center> 
  
-{{:resources:eval:dpg:9154ebz_figure_4.png?nolink|}} +| {{ {{ :resources:eval:dpg:9154ebz_figure_4.png?nolink |}} | 
-|  Figure 4. Fully Configured AD9154 SPIPro  |+
  
 +|  Figure 12. Fully Configured AD9154 SPIPro  |
 +</WRAP>
 +<WRAP center> 
  
 +| {{ {{ :resources:eval:dpg:9154ebz_figure_5.png?nolink |}} | 
  
-{{:resources:eval:dpg:9154ebz_figure_5.png?nolink|}} +|  Figure 13. DPG Downloader Panel at Start Up  | 
-|  Figure DPG Downloader Panel at Start Up  | +</WRAP> 
- +<WRAP center> 
- +
-{{:resources:eval:dpg:9154ebz_figure_6.png?nolink|}} +
-|  Figure 6 Fully Configured DPG Downloader Panel  |+
  
 +| {{ {{ :resources:eval:dpg:9154ebz_figure_6.png?nolink |}} | 
  
 +|  Figure 14. Fully Configured DPG Downloader Panel  |
 +</WRAP>
  
 7. Here is what you will see at the output of DAC0 on the Spectrum Analyzer. \\ \\ 7. Here is what you will see at the output of DAC0 on the Spectrum Analyzer. \\ \\
 +<WRAP center> 
  
 +| {{ {{ :resources:eval:dpg:9154ebz_figure_7.png?nolink |}} | 
  
-{{:resources:eval:dpg:9154ebz_figure_7.png?nolink|}} +|  Figure 15. DAC Output Spectrum Analyzer Display 
- +</WRAP>
-|  Figure 7. DAC Output Spectrum Analyzer Display +
  
 8. Here’s what you will see on DAC1, DAC2, and DAC3 on the scope.  8. Here’s what you will see on DAC1, DAC2, and DAC3 on the scope. 
 +<WRAP center> 
  
-{{:resources:eval:dpg:9154ebz_figure_8.png?nolink|}}+| {{ {{ :resources:eval:dpg:9154ebz_figure_8.png?nolink |}} 
  
-|  Figure 8. DAC Outputs Scope Display |+|  Figure 16. DAC Outputs Scope Display  | 
 +</WRAP>
  
 ===== ACE Software Features ===== ===== ACE Software Features =====
resources/eval/dpg/ad9154-ebz.1497992618.txt.gz · Last modified: 20 Jun 2017 23:03 by Bailey Meyer