Differences

This shows you the differences between two versions of the page.

--- resources:eval:dpg:ad9152-fmc-ebz [02 Aug 2022 11:48] – [Introduction] Shine Cabatan
+++ resources:eval:dpg:ad9152-fmc-ebz [11 Oct 2022 14:05] (current) – [Software Needed] Shine Cabatan
@@ Line 5: / Line 5: @@
 This user guide describes both the hardware and software setup needed to acquire data capture from [[adi>EVAL-AD9152|AD9152-FMC-EBZ]] evaluation board to characterize [[adi>AD9152]] 16-bit 2.25Gsps dual JESD204B signal processing RF Digital to Analog Converter.
-The [[adi>EVAL-AD9152|AD9152-FMC-EBZ]] is an FMC mezzanine card and connects to an [[adi>eval-ads7-v2|ADS7-V2]] or [[adi>eval-ads8-v1ebz|ADS8-V1]] data pattern generator system. The ADS7-V2/ADS8-V1 automatically formats the data and sends it to the AD9152-FMC-EBZ via its JESD204B lanes. The AD9152-FMC-EBZ is an FMC mezzanine card. +12V, +3.3V, and VADJ power supply rails are provided by the ADS7-V2/ADS8-V1 system via the FMC connector P1. A clock distribution chip AD9516 is included on this EVB as a clock fan-out and frequency divider for the DACCLK, JESD204B SYSREF signals, and a GBTCLK clock used by the ADS7-V2/ADS8-V1. There is also an FMC standard I2C bus that is used by the ADS7-V2/ADS8-V1 to identify the AD9152-FMC-EBZ. This I2C interface is implemented in software in the AD9152-FMC-EBZ PIC processor (XU1). All ADS7-V2/ADS8-V1 to/from AD9152-FMC-EBZ interface signals are connected via the FMC connector P1.
+The [[adi>EVAL-AD9152|AD9152-FMC-EBZ]] is an FMC mezzanine card and connects to an [[adi>eval-ads7-v2|ADS7-V2]] or [[adi>eval-ads8-v1ebz|ADS8-V1]] data pattern generator system. The ADS7-V2/ADS8-V1 automatically formats the data and sends it to the AD9152-FMC-EBZ via its JESD204B lanes. +12V, +3.3V, and VADJ power supply rails are provided by the ADS7-V2/ADS8-V1 system via the FMC connector P1. A clock distribution chip AD9516 is included on this EVB as a clock fan-out and frequency divider for the DACCLK, JESD204B SYSREF signals, and a GBTCLK clock used by the ADS7-V2/ADS8-V1. There is also an FMC standard I2C bus that is used by the ADS7-V2/ADS8-V1 to identify the AD9152-FMC-EBZ. This I2C interface is implemented in software in the AD9152-FMC-EBZ PIC processor (XU1). All ADS7-V2/ADS8-V1 to/from AD9152-FMC-EBZ interface signals are connected via the FMC connector P1.
-===== Getting Started with the AD9152-FMC-EBZ Evaluation Board and Software =====
+===== Typical Setup =====
-==== What's in the Box ====
-  * [[adi>AD9152-FMC-EBZ]]  Evaluation Board for ADS7
-  * Evaluation Board CD
-  * Mini-USB Cable
-==== Recommended Equipment List ====
-  * Sinusoidal Clock Sources
-  * Spectrum Analyzer
-  * Oscilloscope
-  * Data Pattern Generator ADS7
-===== AD9152 Evaluation Software =====
+<WRAP centeralign> {{ :resources:eval:dpg:ad9152-fmc-ebz_setup_with_labels.jpg?600 |}}//Figure 1a. AD9152-FMC-EBZ Setup with ADS7-V2EBZ//</WRAP>
-The ACE application software, the preferred evaluation method for the AD9152, is included in the Evaluation Board software or can be downloaded from the ACE website at http://www.analog.com/en/design-center/evaluation-hardware-and-software/ace-software.html. In addition, the AD9152 Evaluation Board software runs on the easy-to-use legacy SPIPro graphical user interface (GUI), but ACE is preferred. It is included on the Evaluation Board CD. Registers on the AD9152 and AD9516 products are programmed via a USB cable connecting the user’s PC to the AD9152-FMC-EBZ XP2 connector. Software in the AD9152-FMC-EBZ PIC processor (XU1) provides the interface between the USB bus and the SPI busses of the AD9152 and AD9516.
-===== Hardware Setup =====
-A low phase noise high frequency clock source should be connected to the SMA connector J1, This is the DACCLK input. The spectrum analyzer should be connected to the SMA connector,J4 or J17. The evaluation board connects to the ADS7 through the connectors P3. The PC should be connected to the EVB using the mini-USB connector XP2 after installation of the Evaluation Board software. Figure 1 shows the block diagram of the set-up.
+<WRAP centeralign> {{ :resources:eval:dpg:ad9152-fmc-ebz_setup2_with_labels.jpg?600 |}}//Figure 1b. AD9152-FMC-EBZ Setup with ADS8-V1EBZ//</WRAP>
-<WRAP center>
+<note tip>Tip: Click on any picture in this guide to open an enlarged version.</note>
-| {{:resources:eval:dpg:ad9152:figure_1_ad9152_fmc_ebz_lab_bench_set-up1.png?500|}} |  {{:resources:eval:dpg:ad9152:AD9152-fmc-EBZ_photo.png?300|}}  |
+===== Helpful Files/Links =====
-|  Figure 1.  Block diagram of the AD9152-FMC-EBZ lab bench set-up  |  Figure 2.  Top view of AD9152-FMC-EBZ  |
-</WRAP>
+  * User Guides for non-FMC card users:
+    * [[:resources:eval:dpg:ad9152-ebz|AD9152-EBZ]]
+    * [[:resources:eval:dpg:ad9152-adrf6720-ebz|AD9152-ADRF6720-EBZ]]
+  * [[:resources:eval:dpg:ads7|ADS7-V1/-V2 for High-Speed DAC Evaluation]]
+  * Datasheet: [[adi>media/en/technical-documentation/data-sheets/AD9152.pdf|AD9152]]
+  * IBIS Model: [[ibis>ad9152bcpz|AD9152]]
+  * AMI Model: [[https://form.analog.com/Form_Pages/securedownloads/designFilePackage.aspx?prodID=AD9144-9152-9154-9135-9136|AD9144/AD9152/AD9154/AD9135/AD9136]]
+  * Schematic: {{:resources:eval:dpg:ad9152-fmc-ebz_reva_schematic.pdf|RevA}}
+  * Bill of Materials: {{:resources:eval:dpg:ad9152-fmc-ebz_reva_bom.xlsx|RevA}}
+  * PCB Gerber Files: {{:resources:eval:dpg:ad9152-fmc-ebz_reva_gerber_files.zip|RevA}}
+  * PCB BRD File: {{:resources:eval:dpg:ad9152-fmc-ebz_reva.zip|RevA}}
+  * PCB Layout PDF: {{:resources:eval:dpg:ad9152-fmc-ebz_reva_layout.pdf|RevA}}
-===== Getting Started =====
+===== Software Needed =====
-The PC software is included in the CD shipped with the EVB. The installation will include the DPG Downloader software and ACE software as well as all the necessary AD9152 files including schematic, board layout, datasheet, and other files.
-==== Initial Set-Up ====
-.	Install ACE software or SPIPro software and support files on your PC. Follow the instructions in the installation wizard and use the default (recommended) installation settings.  \\ \\
-.	Plug the AD9152-FMC-EBZ into port FMC_1 of the ADS7 System. Use a USB cable to connect the EVB to your PC and connect the lab equipment to the EVB as shown in Figure 1. \\ \\
-.	Connect the ADS7 unit to your PC via USB and turn on the ADS7.  \\ \\
-==== Single-Tone Test ====
-These settings configure the AD9152 to output a sine wave using the ADS7 and allow the
-user to view the single-tone performance at the DAC output, under the condition: Fdata = 375MHz, 4X interpolation, Fout = 100MHz. \\ \\
-Following settings configure the AD9152 to output a 100Mhz (-10dbFS) sine wave using the ADS7 on both 2 of AD9152 DACs.
+  * [[:resources:tools-software:ace|Analysis | Control | Evaluation (ACE) Software]]
+  * [[:resources:tools-software:ace:dpg-lite|DPG Lite]] (Recommended; Installed with ACE) or [[:resources:eval:dpg:dpgdownloader|DPG Downloader]]
+  * [[adi>plugins/ace/board.ad9152.1.2020.4400.acezip|AD9152 ACE Plugin]]
-- Configure the hardware according to the hardware set-up instructions given in the Hardware Setup section above. Set the frequency of the DAC clock signal generator to 1500MHz, and the output level to 3dBm. The spectrum analyzer can be configured as shown in Figure 6 with a resolution bandwidth of 30kHz. Choose an Input Attenuation of 10dB.
+<note important>
+  * Do not install ACE on a computer with DAC Software Suite.
+  * **Known Issue:** ACE may fail to detect HS-DAC boards, details [[resources:tools-software:ace:knownissues#high-speed_dac_eval_boards_are_not_discovered|here]].
+</note>
-=== Using ACE ===
+===== Hardware Needed =====
-. Open DPG Downloader Lite.  It will say AD9152 as shown in Figure 3. \\ \\
-<WRAP center>
+  * [[adi>EVAL-AD9152|AD9152-FMC-EBZ]] Evaluation Board which comes with:
+     * USB-A to USB-Mini Cable
+  * [[:resources:eval:ads7-v2|ADS7-V2EBZ]] or [[:resources:eval:ads8-v1|ADS8-V1EBZ]] Evaluation Kit which includes:
+     * 12V 60W AC/DC Power Supply
+     * Power Cord
+     * USB-A to USB-B Cable
+  * PC with ACE and DPG Lite Software Applications
+  * Low Phase Noise High-Frequency Continuous Wave Generator
+  * Signal/Spectrum Analyzer
+  * (2) SMA Cables
-| {{ :resources:eval:dpg:dpg_init.png?800 |}}|
+===== Quick Start Guide =====
-|    Figure 3. Initial DPG Downloader Panel  |
-</WRAP>
-. Open ACE from the start window. It can be found by following the file path to the program or by searching in the windows search bar for “ACE.” The {{:resources:eval:user-guides:ace_icon_small.png}} icon indicates the ACE software.\\ \\
+  - Attach AD9152-FMC-EBZ onto the FMC connector of ADS7-V2 or ADS8-V1 controller board. Connect the evaluation board to PC via USB, the continuous waveform generator output to J1, and one of the DAC outputs (J4 or J17) to a signal/spectrum analyzer. Connect ADS7-V2/ADS8-V1 to PC via USB and to a 12V 60W AC/DC power supply, then switch the board ON using S1 beside the connector for 12V supply. Refer to [[:resources:eval:dpg:ad9152-fmc-ebz#typical setup|Typical Setup]] section for pictures of actual evaluation setup.
-. If the board is connected properly, ACE will detect it and display it on the Start page under "Attached Hardware." Double click this board.\\ \\
+  - Set the frequency of the continuous waveform generator output to **1.5 GHz** and the output level to **+3 dBm**. Enable the output. <WRAP centeralign>{{ :resources:eval:dpg:ad9152-fmc-ebz_dpg_board_detect_ads7.png?600 |}}//Figure 2. ADS7-V2 and AD9152 detected in DPG Software//</WRAP>
-<WRAP center>
+  - Start DPG Lite or DPG Downloader. A panel named after the detected controller board should appear at the bottom of the DPG window. The device on the evaluation board and the data interface should also be automatically detected by the software and shown at **Evaluation Board** and **Port Configuration**, respectively. See Figure 2. <WRAP centeralign>{{ :resources:eval:dpg:ad9152-fmc-ebz_ace_board_detect_ads7.png?600 |}}//Figure 3. AD9152-FMC-EBZ detected in ACE//</WRAP>
+  - Open ACE. The board will automatically be recognized by the software as shown in Figure 3. Otherwise, install the plugin for AD9152 evaluation board by following the steps in this page: [[:resources:tools-software:ace:userguide:quickstart|Quickstart - ACE Quickstart and Plug-in Installation]]. <WRAP centeralign>{{ :resources:eval:dpg:ad9152-fmc-ebz_ace_configuration_wizard_ads7.png?600 |}}//Figure 4. ACE Initial Configuration Wizard//</WRAP><WRAP centeralign>{{ :resources:eval:dpg:ad9152-fmc-ebz_ace_chipview_ads7.png?600 |}}//Figure 5. ACE AD9152 Chipview Tab//</WRAP>
+  - In ACE, apply the configuration wizard settings enumerated below and shown in Figure 4. JESD204B PLL should lock and the indicator should turn green.
+    * **FDAC:** 1.5 GHz
+    * **Interpolation:** 4
+    * **JESD Mode:** 4
+    * **Subclass1:** True
+    * **DigGain:** True
+    * **PLL_Enable:** False
+    * **Input Data Format:** 2's complement <WRAP centeralign>{{ :resources:eval:dpg:ad9152-fmc-ebz_dpg_generate_output.png?600 |}}//Figure 6. Single Tone and ADS7-V2 Configuration Panels in DPG//</WRAP>
+  - In DPG Lite or DPG Downloader, configure single tone waveform generation. From the **Add Generator Waveforms** pulldown menu, select **Single Tone**. Apply the following settings:
+    * **Data Rate:** 350 MHz
+    * **Desired Frequency:** 100 MHz
+    * **DAC Resolution:** 16 bits
+    * **Amplitude:** -10 dB
+    * **Unsigned Data:** unchecked
+    * **Generate Complex Data (I & Q):** checked
+  - In the ADS7-V2 or ADS8-V1 panel in the DPG window, configure **Data Playback** by selecting tones for the DAC outputs from each dropdown menu. Set **JESD Mode** to Mode 4, **Links** to Single and **Subclass** to 1.<WRAP centeralign>{{ :resources:eval:dpg:ad9152:ad9152-fmc_dac_output.png |}}//Figure 7. AD9152 DAC Output FFT for Data Rate = 350 MHz, FOUT = 100 MHz//</WRAP>
+  - Press the download arrow ({{:resources:eval:dpg:9154_down_arrow.png}}) then the play button ({{:resources:eval:dpg:9154_right_green_arrow.png}}). As in Figure 6, **Serial Line Rate** should appear as 3.75 Gbps and **Sync Status** should have a check mark. FFT plot of the DAC output is in Figure 7.
-| {{ :resources:eval:user-guides:ad9152_detected_FMC_new.png |}}|
-|  Figure 4. The detected AD9152 in ACE.  |
-</WRAP>
-. Ensure that the {{:resources:eval:user-guides:connection_icon.png}} button is green in the subsystem image under the “System” tab. If not, click it, select the AD9152, and click "Acquire." Double click on the subsystem image.\\ \\
-<WRAP center>
-| {{ :resources:eval:user-guides:ad9152_system_FMC_new.png |}}|
-|  Figure 5. The AD9152 system.  |
-</WRAP>
-. To the left of the board diagram, click "Modify" under "Initial Configuration Summary" to edit the DAC and PLL setup of the board. In some cases, the "Initial Configuration" page will already be shown.\\ \\
-<WRAP center>
-| {{ :resources:eval:user-guides:ad9152_boardview_FMC.png |}}|
-|  Figure 6. The board block diagram of the AD9152.  |
-</WRAP>
-. Alter the inputs to match the figure below. Click "Apply."\\ \\
-<WRAP center>
-| {{ :resources:eval:user-guides:ad9152_applypage_FMC.png |}}|
-|  Figure 7. Inputs for the Initial Configuration of the AD9152.  |
-</WRAP>
-. Double click on the dark blue AD9152 on the board diagram. Ensure that the settings of the AD9152 match with the chip diagram in the figure below and click "Apply Changes." The "Poll Devices" button and JESD PLL Locked should both be enabled. If neither are enabled, click "Read All" or reset the board, reset the chip, and reapply the settings for the board and chip. For more information about ACE, see the "ACE Software Features" section.\\ \\
-<WRAP center>
-| {{ :resources:eval:user-guides:ad9152_chipview_FMC_new.png |}}|
-|  Figure 8. The chip block diagram of the AD9152.  |
-</WRAP>
-.	On the DPGDownloader panel, select Single Tone under the Add Generated Waveforms Tab. Set Data Rate: 375Mhz, Desired Frequency: 100Mhz, Amplitude: -10dbFS, Uncheck Unsigned Data, Check Generate Complex Data (I and Q). \\ \\
-.	Click Download ({{:resources:eval:dpg:image009.png?direct&|}}) and Play ({{:resources:eval:dpg:image010.png?direct&|}}) in the DPG Downloader screen. The spectrum in Figure 10 will appear on all 2 DAC outputs (J17, J4, ), Serial Line Rate will be 3.75Gsps.  \\ \\
-<WRAP center>
-| {{ :resources:eval:dpg:dpg_lite.png?800 |}}|
-|  Figure 9. AD9152-FMC-EBZ Fully Configured DPG Downloader Display  |
-</WRAP>
-.Here is what you will see at the output of  DAC0 on the Spectrum Analyzer.
-<WRAP center>
-| {{ :resources:eval:dpg:ad9152:ad9152-fmc_dac_output.png |}}|
-|  Figure 10. DAC Output Spectrum Analyzer Display  |
-</WRAP>
-=== Using SPIPro ===
-.	On your lab computer, open the SPIPro application (Start > All Programs > Analog Devices > AD9152 > SPIPro). You will see the GUI shown in Figure 12 come up. Run DPG Downloader Lite.  It will say AD9152 as shown in Figure 11. \\ \\
-<WRAP center>
-| {{ :resources:eval:dpg:dpg_init.png?800 |}}|
-|    Figure 11. Initial DPG Downloader Panel  |
-</WRAP>
-.	Open SPIPro. It will show AD9152-FMC-EBZ in the upper left hand corner. \\ \\
-.	Select single link, JESD mode 4, Interpolation 4. Press ‘Configure DAC and Clock’ button. JESD204B PLL lock will turn green. \\ \\
-<WRAP center>
-| {{ :resources:eval:dpg:ad9152:ad9152-fmc_spipro.png?800 |}}|
-|  Figure 12. Fully Configured SPIPro Display  |
-</WRAP>
-.	Select Single Tone under the Add Generated Waveforms Tab. Set Data Rate: 375Mhz, Desired Frequency: 100Mhz, Amplitude: -10dbFS, Uncheck Unsigned Data, Check Generate Complex Data (I and Q). \\ \\
-.	Click Download ({{:resources:eval:dpg:image009.png?direct&|}}) and Play ({{:resources:eval:dpg:image010.png?direct&|}}) in the DPG Downloader screen. The spectrum in figure 6 will appear on all 2 DAC outputs (J17, J4, ), Serial Line Rate will be 3.75Gsps.  \\ \\
-<WRAP center>
-| {{ :resources:eval:dpg:dpg_lite.png?800 |}}|
-|  Figure 13. AD9152-FMC-EBZ Fully Configured DPG Downloader Display  |
-</WRAP>
-.	Here is what you will see at the output of  DAC0 on the Spectrum Analyzer.
-<WRAP center>
-| {{ :resources:eval:dpg:ad9152:ad9152-fmc_dac_output.png |}}|
-|  Figure 14. DAC Output Spectrum Analyzer Display  |
-</WRAP>
-===== ACE Software Features =====
-The ACE software is organized to allow the user to evaluate and control the AD9122A evaluation board. The “Initial Configuration” wizard, which is only available for certain boards, controls the DAC and PLL setups. Block diagram views of the board and chip contain elements that can be used to vary parameters like ref current and data format. These parameters can be changed using check boxes, drop down menus, and input boxes. Some parameters do not have settings shown in the diagram. Double click on the parameter to view the available settings, seen with the NCO settings below.
-{{ :resources:eval:user-guides:ad9122_nco.png }}
-<WRAP clear>
-</WRAP>
-<WRAP centeralign> NCO settings for the AD9122 </WRAP>
-In addition, some parameters can be enabled or disabled. This feature is evident by the color of the block parameter. For example, if the block parameter is dark blue, the parameter is enabled. If it is light grey, it is disabled. To enable or disable a parameter, click on it.
-<WRAP column 40%>
-{{ :resources:eval:user-guides:ad9739a_on.png }}
-</WRAP>
-<WRAP column 55%>
-{{ :resources:eval:user-guides:ad9739a_off.png }}
-</WRAP>
-<WRAP clear>
-</WRAP>
-<WRAP column 40%>
-<WRAP centeralign> Enabled parameter </WRAP>
-</WRAP>
-<WRAP column 55%>
-<WRAP centeralign> Disabled parameter </WRAP>
-</WRAP>
-<WRAP clear>
-</WRAP>
-More direct changes to registers and bit fields can be made in the memory map, which is linked from the chip block diagram through the “Proceed to Memory Map” button. In this view, names, addresses, and data can be manually altered by the user.
-{{ :resources:eval:user-guides:ad9122_memmap.png }}
-<WRAP clear>
-</WRAP>
-<WRAP centeralign> Bench Set-Up </WRAP>
-ACE also contains the Macro Tool, which can be used to record register reads and writes. This is executed in the memory map view or with the initialization wizard. To use, check the “Record Sub-Commands” checkbox and press the record button. Changes in the memory map, which are bolded until they are applied to the part, are recorded as UI commands by the macro tool once the changes are made. Changed register write commands for the controls are also recorded. Hit “Apply Changes” to execute the commands and make changes in the memory map. To stop recording, click the “Stop Recording” button. A macro tool page with the command steps will be created. The macro can be saved using the “Save Macro” button so that it may be loaded for future use.
-{{ :resources:eval:user-guides:ad9122_macrocommands.png }}
-<WRAP clear>
-</WRAP>
-<WRAP centeralign> Macro tool in ACE. The //Stop Recording//, //Record//, and //Save Macro// commands are located at the top of the macro tool. </WRAP>
-The raw macro file will be saved using ACE syntax, which is not easily readable. To remedy this, the ACE software download includes the Macro to Hex Conversion Tool. The user can choose to include or exclude register write, reads, and/or comments in the conversion. The file pathways for the source and save paths should be the same, except that one should be an .acemacro file and the other should be a .txt file. The “Convert” button converts and opens the converted text file, which is easier to read. The conversion tool can also convert back to an .acemacro file if desired.
-<WRAP column 40%>
-{{ :resources:eval:user-guides:ad9122_m2hconvert_5.png }}
-</WRAP>
-<WRAP column 55%>
-{{ :resources:eval:user-guides:ad9122_m2hconvert_4.png }}
-</WRAP>
-<WRAP clear>
-</WRAP>
-<WRAP column 40%>
-<WRAP centeralign> Conversion set-up for macro to hex </WRAP>
-</WRAP>
-<WRAP column 55%>
-<WRAP centeralign> Converted text file </WRAP>
-</WRAP>
-<WRAP clear>
-</WRAP>
-For more information about ACE and its features, visit https://wiki.analog.com/resources/tools-software/ace.

Wiki

Analog Devices Wiki

Differences

Analog Devices Wiki

Differences

Page Tools