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EVALUATING THE AD9121/AD9122 DIGITAL-TO-ANALOG CONVERTER
Preface
This user guide describes both the hardware and software setup needed to acquire data capture from AD9121-M5375-EBZ / AD9122-M5375-EBZ evaluation board to characterize AD9121 14-bit/AD9122 16-bit, Dual, 1.23GSPS, TxDAC+® digital-to-analog converter. This guide shows how AD9121-M5375-EBZ & AD9122-M5375-EBZ works with ADS7-V2/SDP-H1 controller board developed by Analog Devices. Link to the previous user guide document is provided for customers who still have the DPG3 controller board.
All of the below information also refers to the AD9121
Typical Setup
Figure 1a. AD9121-M5375-EBZ/AD9122-M5375-EBZ with SDP-H1 Set-up
Figure 1b. AD9121-M5375-EBZ/AD9122-M5375-EBZ with ADVS7-V2EBZ Setup
Tip: Click on any picture in this guide to open an enlarged version.
Helpful Files:
Software Needed:
Do not install DAC software suite on a computer with ACE.
Hardware Needed:
-
SDP-H1 (EVAL-SDP-CH1Z) Evaluation Kit
-
AD-DAC-FMC-ADP High-Speed DAC Evaluation Board to FMC Adaptor Board
12V 1A Wall Adapter for SDP-H1
12V 1A Power Supply for ADS7-V2EBZ
5V 1A Power Supply
High-Frequency Continuous Wave Generator
Signal/Spectrum Analyzer
(1)
USB-A to
USB-Mini Cable and;
(1)
USB-A to
USB-Mini Cable for SDP-H1 |
USB-A to
USB-B Cable for ADS7-V2EBZ
(2) SMA Cables
(2) Banana Plug Cables
Quick Start Guide
Selecting the DAC Output
By default, solder jumpers JP4, JP5, JP6, and JP17 configure the AQM output to be observed at SMA output J6. This connects the DAC outputs to the LPF and the ADL537x analog quadrature modulator. The modulator LO input can be sourced through SMA connector J15 (LO_IN). The clock level into the modulator should be set to about 3 dBm. In order to observe the DAC outputs at Jumpers J3 and J8, the solder jumpers need to be repositioned as shown below.
| |
DAC Output Configuration | Modulator Output Configuration |
Figure 2. AD9121-M5375-EBZ/AD9122-M5375-EBZ Output Configuration
Jumper Options
There are 7 pin jumpers on the evaluation board. The pin jumpers are corresponding to the 6 supplies on the board. They serve as ‘switches’ that determine if the LDOs on board or external supplies are used for each individual supply. They are shunted by default, which means on board LDOs are used. When an external supply is necessary, pull off the shunt from the corresponding supply and connect the external supply to the SMA jack close to the jumper. The seventh pin jumper configures the voltage of the IOVDD supply. Refer to the table below.
Supply Rail | For LDO, Install Pin Jumper | For external Supply, use SMA |
CVDD18 | JP2 | J4 |
DVDD18 | JP3 | J11 |
IOVDD | JP12 | J12 |
AVDD33 | JP8 | J13 |
XCVDD33 | JP9 | J10 |
AVDD5 | JP11 | TP11(+5V), TP12 (GND) |
Evaluation Guide
Make sure that on AD9121-M5375-EBZ/AD9122-M5375-EBZ, JP4, JP5, JP6, and JP17 are configured such that DAC output are connected with J3 (DAC1_P) or J8 (DAC2_P). Refer to Figure 2.
Follow Evaluation setup in Figure 1a and 1b.
Attach the evaluation board to SDP-H1/ADS7-V2EBZ connector using the AD-DAC-FMC-ADP adapter board.
Connect continuous wave generator for clock input to J1.
Connect the DAC output from J3 (DAC1_P) or J8 (DAC2_P) to a signal/spectrum analyzer.
Connect the evaluation board to PC via
USB and to a 5V 1.5A power supply via banana plug cables.
Connect SDP-H1/ADS7-V2EBZ to PC via
USB and to a 12V 1A power supply.
Set clock input to 500MHz and 2dBm.
Open ACE from the start window. It can be found by following the file path to the program or by searching in the windows search bar for “ACE.”
On Start page, ACE will detect if the board is connected under “Attached Hardware.” Double click this board then modify the configuration, as shown in figure 3, and click “Apply”.
Figure 3. Running ACE Initial Configuration Wizard when using SDP-H1/ADS7-V2EBZ
Open the DPGDownloaderLite software from start window. The evaluation board AD9122/AD9122, controller board and DCO Frequency will be automatically detected by the DPG downloader.
From DPGDownloaderLite, Add Generator Waveforms pulldown menu select Single Tone and apply the settings as shown in Figure 4. Set the Data Rate to 250MHz and frequency to 29
MHz. Set DAC resolution to the DAC’s number of bits to: 14 bits for AD9121; 16 bits for AD9122. Check the “Generate Complex Data (I & Q)” box and “Unsigned Data” box.
Select the in-phase tone from the I Data Vector pulldown menu and the quadrature tone from the Q Data Vector pulldown menu.
Figure 4. DPGDownloader Waveform Configuration for AD9122-M5375-EBZ
Press the download arrow and then the play button. The spectrum similar to Figure 5 should appear in the signal/spectrum analyzer.
Figure 5. AD9122-M5375-EBZ FFT for Fdac=500MHz,2x Interpolation Fout=29MHz