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AD9121/AD9122 Evaluation Board Quick Start Guide

Getting Started with the AD9121/AD9122 Evaluation Board

What's in the Box

  • AD9122-M5375-EBZ or AD9122-M5372-EBZ Evaluation Board
  • Mini-USB Cable
  • AD9121/AD9122 Evaluation Board CD
  • Digital Pattern Generator Series 2 or 3 (DPG): ADI HSC-DAC-DPG-BZ OR System Demonstration Platform( SDP-H1) and FMC to High-Speed DAC Evaluation Board Adaptor(AD-DAC-FMC-ADP)
  • +5Vdc Power Supply Ex: Agilent E3630A
  • DAC Clock Source Ex: Rohde Schwarz SML 02
  • AQM LO Clock Source Ex: Rohde Schwarz SMA100A
  • Spectrum Analyzer Ex: Agilent PSAA or Rohde Schwarz FSU
  • PC: Windows PC with 2 or more USB ports

Introduction

The AD9121/AD9122 Evaluation Board connects to the Analog Devices Digital Pattern Generator (DPG) or System Demonstration Platform (SDP-H1, PN: EVAL-SDP-CH1Z) to allow for quick evaluation of the AD9122. The DPG or SDP-H1 allows the user to create many types of digital vectors and transmit these at speed to the AD9122 in any of the AD9122 operating modes. The AD9122 evaluation board is configured over USB with accompanying PC software.

Software Installation

The DAC Software Suite plus AD9122 Update should be installed on the PC prior to connecting the hardware to the PC. The DAC Software Suite is included on the Evaluation Board CD, or can be downloaded from the DPG web site at https://wiki.analog.com/resources/eval/dpg/dacsoftwaresuite. This will install DPGDownloader (for loading vectors into the DPG2) and the AD9122 SPI Controller application. However, ACE, a newer evaluation software from ADI, is the preferred evaluation software over the legacy SPI control graphical user interface (GUI). ACE can be downloaded from the ACE website at www.analog.com/ace. The ACE plug-in for the evaluation board, which is also required, is available for download on the AD9122 eval webpage in the software section at http://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/EVAL-AD9122.html#eb-relatedsoftware.

Hardware Setup (DAC OUTPUT)

Once the DPGDownloader software is installed, the hardware can be connected as shown below. A single 5V power supply powers the evaluation board. The power supply should be able to source up to 2A to cover all of the board’s operating conditions. A low jitter clock source (< 0.5psec RMS) should be used for the DACCLK. A sinusoidal clock output level of 0 to 4dBm is optimal. By default, the DAC outputs are connected to SMA connectors for evaluation. Both DAC outputs are available. Later in the document, the modifications for observing the modulator output and different clocking options will be shown.

  • The evaluation board plugs directly into the DPG2 or DPG3.

The PC connects to both the DPG2 and the evaluation board through USB cables as showing in Figure 1 and Figure 2

  • The evaluation boards plugs into the AD-DAC-FMC-ADP adapter board that plugs into the SDP-H1.

The PC connects to both the SDP-H1 and the evaluation board through USB cables as shown in Figure 3 and Figure 4.

Figure 1. DPG2 and AD9122 Evaluation Board Bench set-up Figure 2. DPG2 and AD9122 Evaluation Board Figure 3. SDP-H1 and AD9122 Evaluation Board Bench set-up Figure 4. SDP-H1 and AD9122 Evaluation Board

BASIC HARDWARE SETUP

Connect the equipment to the AD9122 evaluation board per the following table:

  • Equipment Connects to AD9122 Eval Board
  • Power Supply P5(+5V), P6(GND)
  • Signal Source J1(CLOCK IN), Set source to 500MHz, 2dBm output
  • PC USB Cable XP2
  • Spectrum Analyzer J3 (DAC1_P) or J8 (DAC2_P)
  • DPG2 P1 and P2
  • SDP-H1 J4(FMC connector)

Getting Started

It is suggested that the basic set-up be verified before making any modifications to the evaluation board.

Generating a Test Vector with ACE

1. Power up the DPG and connect the USB cable to the PC.

2. Next, run the DPGDownloader Software. To launch DPGDownloader,, click Start > Programs > Analog Devices > DPG > DPGDownloader. If the AD9122 evaluation board has been recognized by the PC, AD9122 should be populated in the Evaluation Board field in the Hardware Config panel.

3. Generate a sine wave by pulling down the “Add Generated Waveform” menu and choosing “Single Tone”. Fill in the form as shown below (Sample Rate = 250MHz, Desired Frequency = 29 MHz, etc.). Note that the Sample Rate should match the input sample rate and not the DAC update rate.


4. Select the I and Q data vectors in the data selection panel.

5. Hit the download button. This transfers the data from the PC to the DPG memory.

6. When the vector has finished downloading, hit the play button. This starts the DPG2 transmitting data to the eval board.

7. Open ACE from the start window. It can be found by following the file path to the program or by searching in the windows search bar for “ACE.” The icon indicates the ACE software.

8. If the board is connected properly, ACE will detect it and display it on the Start page under “Attached Hardware.” Double click this board.


9. Ensure that the button is green in the subsystem image under the “System” tab. If not, click it, select the AD9122, and click “Acquire.” Double click on the subsystem image.


10. To the left of the board diagram, click “Modify” under “Initial Configuration Summary” to edit the DAC and PLL setup of the board. In some cases, the “Initial Configuration” page will already be shown.


11. Alter the inputs to match the figure below. Click “Apply.”


12. Double click on the dark blue AD9122 on the board diagram. Ensure that the settings of the AD9122 match with the chip diagram in the figure below and click “Apply Changes.” The “Poll Devices” button and PLL Locked should both be enabled. If neither are enabled, click “Read All” or reset the board, reset the chip, and reapply the settings for the board and chip. For more information about ACE, see the “ACE Software Features” section.


13. The output from J7 and J8 should be a clean 29MHz tone as shown below:

Generating a Test Vector with the SPI Controller

Launch the AD9122 SPI GUI by clicking the AD9122 SPI button.

1. Power up the DPG and connect the USB cable to the PC.

2. Next, run the DPGDownloader Software. To launch DPGDownloader,, click Start > Programs > Analog Devices > DPG > DPGDownloader. If the AD9122 evaluation board has been recognized by the PC, AD9122 should be populated in the Evaluation Board field in the Hardware Config panel.

3. Generate a sine wave by pulling down the “Add Generated Waveform” menu and choosing “Single Tone”. Fill in the form as shown below (Sample Rate = 250MHz, Desired Frequency = 29 MHz, etc.). Note that the Sample Rate should match the input sample rate and not the DAC update rate.


4. Select the I and Q data vectors in the data selection panel.

5. Launch the AD9122 SPI GUI by clicking the AD9122 SPI button.

6. Go to the “Data Clock” tab and change the Interpolation field to “2x”.

7. When the Run button is clicked, the SPI controller will run once. It will both write and read from the AD9122/AD9125 and setup the clock chip (AD9516) on the evaluation board. The Run Forever control will continue to read from the chip and will update the SPI when any of the controls change. The Force Write and Read Only controls force the controller to write all the controls to the evaluation board or only read from the SPI port.

8. The DCO frequency field in the DPGDownloader window should now be reading something close to 250MHz.

9. Hit the download button. This transfers the data from the PC to the DPG memory.

10. When the vector has finished downloading, hit the play button. This starts the DPG2 transmitting data to the eval board.

11. The output from J7 and J8 should be a clean 29MHz tone as shown below:

AD9122 SPI Controller

The SPI Controller application is split into several tabs. These tabs group related functions. Several of the functions provided by the SPI Controller are described here, as they relate to the evaluation board. For complete descriptions of each register, refer to the AD9122 datasheet. In the interest of continuous quality improvements, the images below may not exactly match your version of the software.

Data Clock Control

This section, shown to the right, provides control over the Interpolation Rate and Course Modulation. Once the controller is executed, the Modulation Description field will return a summary of control. If an improper selection is made, the field will return ‘Invalid.’ The DATAFMT field selects the number format of the incoming data, between unsigned (Binary) and signed (2’s compliment). The QFirst control selects which DAC receives data first from the interleaved bus. For use with the DPG2, this should always be set to IQ Pairs. The Interface Mode selects how wide the data bus will be. This setting will need to match the setting in the DPG AD9122 panel for proper operation with the DPG2.

NCO Control

This tab controls the Fine Modulation within the AD9122. The top portion of this tab helps the user easily control the frequency shift. It will calculate the NCO Frequency using Data Frequency entered by the user. The NCO can shift the signal by at most +/- fnco/2. An indicator also displays the frequency shift from the course modulation on the previous tab. The total shift will be the sum of the course and fine modulations. To manually enter the Frequency Tuning Word (FTW), the Enable Advanced Control will bypass the calculations on the top of the page.

PLL Control

The AD9122 has an on-chip PLL. When PLL_ENABLE is turned on, the chip will automatically select the appropriate band using the Divder1 and Divider0 values. This tab provides the calculation for the DAC Freq and VCO Freq based on the Reference Clock and the value of the dividers. The VCO Frequency must be between 1 and 2 GHz for proper operation. The auto-band select can be bypassed by enabling PLL MANUAL and entering a band in PLL Band Select. Divider1 and Divider0 must still be chosen appropriately in this mode of operation.

Interrupts

This tab provides a visual indication of the state of each interrupt. Enabling the button to the left of each interrupt with enable the interrupt. A green indicator to the right of the button will light when the interrupt is asserted. Once asserted, the interrupt can be acknowledged by pressing the Clear button.

Main DAC Control

This tab controls the two main DACs in the AD9122. The Full-Scale Current of each DAC can be set with the I DAC Gain and Q DAC Gain controls. The I Sleep and Q Sleep controls put their respective DAC into a low-power sleep state. When the AD9122 is used with a modulator, the Phase Compensation/DC Offset controls can be used to correct any mismatches between the two DACs.

Filter Tool

A filter tool that helps users determine the AD9122 interpolation filter is best suited for their application can be launched by clicking the “Filter Tool” Button on the DPGDownloader main window. The figure to the right shows the user interface.

Selecting the DAC Outputs

By default, solder jumpers JP4, JP5, JP6, and JP17 configure the AQM output to be observed at SMA output J6. This connects the DAC outputs to the LPF and the ADL537x analog quadrature modulator. The modulator LO input can be sourced through SMA connector J15 (LO_IN). The clock level into the modulator should be set to about 3 dBm. In order to observe the DAC outputs at Jumpers J3 and J8, the solder jumpers need to be repositioned as shown below.

DAC Output Configuration Modulator Output Configuration

Jumper Options

There are 7 pin jumpers on the evaluation board. The pin jumpers are corresponding to the 6 supplies on the board. They serve as ‘switches’ that determine if the LDOs on board or external supplies are used for each individual supply. They are shunted by default, which means on board LDOs are used. When an external supply is necessary, pull off the shunt from the corresponding supply and connect the external supply to the SMA jack close to the jumper. The seventh pin jumper configures the voltage of the IOVDD supply.

Supply Rail For LDO, Install Pin Jumper For external Supply, use SMA
CVDD18 JP2 J4
DVDD18 JP3 J11
IOVDD JP12 J12
AVDD33 JP8 J13
XCVDD33 JP9 J10
AVDD5 JP11 TP11(+5V), TP12 (GND)

ACE Software Features

The ACE software is organized to allow the user to evaluate and control the AD9122A evaluation board. The “Initial Configuration” wizard, which is only available for certain boards, controls the DAC and PLL setups. Block diagram views of the board and chip contain elements that can be used to vary parameters like ref current and data format. These parameters can be changed using check boxes, drop down menus, and input boxes. Some parameters do not have settings shown in the diagram. Double click on the parameter to view the available settings, seen with the NCO settings below.

NCO settings for the AD9122

In addition, some parameters can be enabled or disabled. This feature is evident by the color of the block parameter. For example, if the block parameter is dark blue, the parameter is enabled. If it is light grey, it is disabled. To enable or disable a parameter, click on it.

Enabled parameter

Disabled parameter

More direct changes to registers and bit fields can be made in the memory map, which is linked from the chip block diagram through the “Proceed to Memory Map” button. In this view, names, addresses, and data can be manually altered by the user.

Bench Set-Up

ACE also contains the Macro Tool, which can be used to record register reads and writes. This is executed in the memory map view or with the initialization wizard. To use, check the “Record Sub-Commands” checkbox and press the record button. Changes in the memory map, which are bolded until they are applied to the part, are recorded as UI commands by the macro tool once the changes are made. Changed register write commands for the controls are also recorded. Hit “Apply Changes” to execute the commands and make changes in the memory map. To stop recording, click the “Stop Recording” button. A macro tool page with the command steps will be created. The macro can be saved using the “Save Macro” button so that it may be loaded for future use.

Macro tool in ACE. The Stop Recording, Record, and Save Macro commands are located at the top of the macro tool.

The raw macro file will be saved using ACE syntax, which is not easily readable. To remedy this, the ACE software download includes the Macro to Hex Conversion Tool. The user can choose to include or exclude register write, reads, and/or comments in the conversion. The file pathways for the source and save paths should be the same, except that one should be an .acemacro file and the other should be a .txt file. The “Convert” button converts and opens the converted text file, which is easier to read. The conversion tool can also convert back to an .acemacro file if desired.

Conversion set-up for macro to hex

Converted text file

For more information about ACE and its features, visit https://wiki.analog.com/resources/tools-software/ace.

resources/eval/dpg/ad9122-ebz.1524503021.txt.gz · Last modified: 23 Apr 2018 19:03 by Annette Hurman