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Pulser Plus Reference Design for GaN PA Biasing and Sequencing

Features

  • Complete Bias Control and Sequencing Solution for Pulsed GaN Radar Power Amplifiers
  • Pin Compatible with ADI's existing Pulser Board and with ADI's GaN Power Amplifier Evaluation Boards
  • Operation in Drain Pulsed Mode or Gate Pulsed Mode
  • Optional Crowbar Circuit for Fast Turn Off in Drain Pulsed Mode
  • Single 24 V to 50 V Power Supply with on-board Negative Gate Voltage Generation.
  • Drain Current Monitoring Circuit

General Description

Pulser Plus is a reference design for biasing Gallium Nitride RF Power Amplifiers. It plugs directly into Analog Devices’ GaN PA evaluation boards such as ADPA1106 and ADPA1107. The only input signals required to control and operate the board are a power supply voltage between 24 V and 50V and a 0V/3V signal on the Drain Pulse Enable or Gate Pulse Enable digital inputs.

The Pulser Plus reference design was specifically designed to enable fast pulsing of GaN Radar Power Amplifiers. It can support RF pulses as short as 1us and with rise and fall times of 200 ns. Figure 1 shows a simplified block diagram of the board. The circuit has two main branches, the Drain Voltage Generator and the Gate Voltage generator. The Drain Voltage Generator circuitry consists of a fast switching MOSFET (Infineon P/N BSC340N08NS3) and the LTC7000 FET driver. On the Drain/Supply side of the FET, there is bank of capacitors which store charge and facilitate fast on/off switching when the FET is switched on and off. There is also a 10 mΩ series resistor on the Drain side of the FET. Both sides of this resistor are connected to the LTC7000 SNS+ and SNS- pins for current sensing and current limiting. This resistor is also connected to the LT1999 current sense amplifier which provides a current monitoring signal which is faster than the LTC7000’s IMON function. The Drain Voltage Generator branch also includes a crowbar circuit (AON7296 (Alpha and Omega Semiconductor) and ADP3625 FET driver). This optional circuit can be used to provide very fast turn off of the drain voltage when operating in Drain Pulsed Mode. The Gate Voltage Generator circuitry consists of a negative voltage generator and LDO which create a -5.5V supply. This -5.5V powers a single supply op-amp (0V and -5.5V). A derived -5.0V signal also drives a resistor divider whose other side is connected ADG1401, a Single Pole Single Throw (SPST) switch. When the switch is open, the op-amp input and output voltage is -5V. This gate voltage is intended to put the GaN PA in pinch-off mode. When the SPST is closed, the resistor divider is active and the op-amp is driven by a voltage that can be varied from -0.7V to -3.3V using the potentiometer. The Source pin of the FET and the op-amp output are connected to a pair of 24 pin headers. Various ADI GaN PA evaluation boards can be plugged into this header pair and operated in Drain Puled Mode or Gate Pulsed Mode.

Specifications

Specifications Target Notes
Drain Voltage Range 24 V to 50 V
Gate Voltage Range -0.7 V to -3.3 V
Pinchoff Voltage -5 V
Maximum Drain Current 5 A
Maximum Gate Current +/-10 mA
Rise Time (Drain Pulsed Mode) 65 ns 10% to 90% of Drain Voltage (VDD_PA)
Fall Time (Drain Pulsed Mode) 85 ns 90% to 10% of Drain Voltage (VDD_PA)
Turn On Time (Drain Pulse Mode) 150 ns50% of Drain Pulse Enable to 90 % of Drain Voltage (VDD_PA)
Turn On Time (Drain Pulse Mode) 150 ns50% of Drain Pulse Enable to 1dB Settling of RF output
Turn Off Time (Drain Pulse Mode) 160 ns50% of Drain Pulse Enable to 10 % of Drain Voltage (VDD_PA)
Turn Off Time (Drain Pulse Mode) 130 ns50% of Drain Pulse Enable to 1dB Settling of RF output
Rise Time (Gate Pulsed Mode) 35 ns 10% to 90% of Gate Voltage (VGG1)
Fall Time (Gate Pulsed Mode) 150 ns 90% to 10% of Gate Voltage (VGG1)
Turn On Time (Gate Pulse Mode) 270 ns50% of Drain Pulse Enable to 90 % of Gate Voltage (VGG1)
Turn On Time (Gate Pulse Mode) 340 ns50% of Gate Pulse Enable to 1dB Settling of RF output
Turn Off Time (Gate Pulse Mode) 370 ns50% of Gate Pulse Enable to 10 % of Gate Voltage (VGG1)
Turn Off Time (Gate Pulse Mode) 240 ns50% of Gate Pulse Enable to 1dB Settling of RF output

Performance Plots

The performance plots shown here were measured with the ADPA1116 connected to the Pulser Plus board. Gate and Drain capacitances on the evaluation board were removed as necessary to ensure a fast response in Gate Pulsed and Drain Pulsed mode.

Performance Plots

Power Amplifier Evaluation Board Compatibility

Compatibility of power amplifiers with the Pulser Plus board is primarily a function of the pinout of the header(s) on the PA evaluation board. Where the header is not pin-compatible, it should be still possible to wire the two boards together. When doing this, try to keep wire lengths as short as possible and make sure that the VDD lines are thick enough to handle the expected current.

Part Number Description Notes
ADPA1105 46 dBm (40 W), 0.9 GHz to 1.6 GHz, GaN Power Amplifier
ADPA1106 46 dBm (40 W), 2.7 GHz to 3.5 GHz, GaN Power Amplifier
ADPA1107 45.0 dBm (35 W), 4.8 GHz to 6.0 GHz, GaN Power Amplifier
ADPA1113 46 dBm (40W), 2 GHz to 6 GHZ, GaN Power AmplifierPre-Release. Not suitable for fast Gate Pulsing due to internal capacitance on ADPA1113's VGG1 pin
ADPA1116 37 dBm (5 W), 0.3 GHz to 6 GHz, GaN Power Amplifier Pre-Release
ADPA1122 43 dBm, 20 W, GaN Power Amplifier, 8.2 GHz to 11.8 GHz
HMC8415 40 W (46 dBm), 9 GHz to 10.5 GHz, GaN Power Amplifier
HMC8205BF10 0.3 or 0.4 GHz to 6 GHz, 35 W, GaN Power Amplifier not compatible due to pinout of eval board header
HMC7885 2 GHz to 6 GHz, 45 dBm Power Amplifier not compatible due to pinout of eval board header
HMC8500PM5E 10 W (40 dBm), 0.01 GHz to 2.8 GHz, GaN Power Amplifier not compatible due to pinout of eval board header
HMC1114PM5E >10 W (42 dBm), 2.7 GHz to 3.8 GHz, GaN Power Amplifier not compatible due to pinout of eval board header
HMC1099PM5E 10 W (40 dBm), 0.01 GHz to 1.1 GHz, GaN Power Amplifier not compatible due to pinout of eval board header
HMC1086F10 25 Watt Flange Mount GaN MMIC Power Amplifier, 2 - 6 GHz not compatible due to pinout of eval board header
HMC1087F10 8 Watt GaN Flange Mount MMIC Power Amplifier, 2 - 20 GHz not compatible due to pinout of eval board header

Theory Of Operation

Drain Pulsed Mode Operation

The figure below shows the recommended bench setup for operation in Drain pulsed mode.

Setup

  1. Setup the power supply voltages before attaching the PA board to the underside of the Pulser Plus board
  2. Set up the power supply's output voltage somewhere between 22V to 50V based on the requirements of the power amplifer being used. With the supply voltage turned off, connect the power supply cables to the red and black banana connectors (black=GND). Leave this voltage off for now.
  3. Set up a 3V dc supply to drive the Gate Pulse Enable SMA connector. This voltage will be used to switch the gate voltage between its pinch off level of -5V (Gate Pulse Enable = 0V) and its bias level that was set by the potentiometer (Gate Pulse Enable = +3V). Leave this voltage off for now.
  4. Before attaching the PA evaluation board to the underside of the Pulser Plus board, turn on the main supply and set the Gate Pulse Enable voltage to +3V.
  5. Connect a Digital Volt Meter (DVM) to the VGG1 and GND clip leads and adjust the blue potentiometer(R48) until the desired gate voltage is set. This voltage will generally be set in the -0.5 to -2.5V range. Consult the IDQ vs VGG1 plot in the PA datasheet for further guidance. Once this step is complete turn off the Gate Pulse Enable voltage and the main power supply.
  6. Carefully plug the PA evaluation board into the underside of the Pulser Plus board. Make sure that the pins are correctly aligned and that RFOUT is towards the front of the Pulser Plus board, aligned with the Drain Pulse Enable and VDD_PA SENSE SMA connectors.
  7. Connect an RF Signal Generator and Spectrum Analyzer to the RFIN and RFOUT SMA connectors of the PA evaluation board. Set the RF input power level and frequency according to the PA datasheet. Ensure that the RF output power from the signal generator is off for now.
  8. In general an attenuator will be required between RFOUT and the input of the spectrum analyzer to avoid damage to the spectrum analyzer. Typically a 20-30 dB of attenuator with adequate heat sinking will be used. Most spectrum analyzers have a “Reference Level Offset” function. By typing in the loss of the attenuator and cables between the PA evaluation board and the spectrum a analyzer, the displayed power on screen will indicate the power at the PA eval board output.
  9. Set the spectrum analyzer center frequency, attenuation and reference level based on the expected input frequency and power level.
  10. Care should be taken in setting the attenuation level of the spectrum analyzer. To maximize the dynamic range of the measurement, set the attenuation of the spectrum analyzer to the minimum that the spectrum analyzer will accept (this will maximize the range of the instrument's internal RF power detectors). Setting the spectrum analyzer's input attenuation level too high may result in an slow observed response time, particularly on its falling edge.
  11. Switch the operating mode to Zero Span. Set the Resolution Bandwidth (RBW) and Video Bandwidth (VB) to the highest available values (ideally 10 MHz or greater). Set the sweep trigger to “External”
  12. Connect a digital pulse generator to the Drain Pulse Enable SMA connector. The high level on this pulse should be between 3V and 5V. Note the Drain Pulse Enable input is terminated with a 50 ohm resistor (R13) on the Pulser Plus Board. Set up the digital pulser generator so that it is expecting to be driving a 50 ohm load.
  13. The sync output of the pulse generator should be connected to the trigger input of the spectrum analyzer. This signal will provide the trigger to the spectrum analyzer to start its zero span sweep.
  14. If the PA evaluation board is not connected to a heat sink, operation at a very low duty cycle is recommended. A starting pulse profile of 10 us high and 10 ms low is recommended (i.e. 0.1% duty cycle). For PAs operating up to 47 dBm output power, this duty cycle has been observed to result in negligible self-heating.

Turn On

  1. Ensure that the voltage on Gate Pulse Enable is low
  2. Turn on the main VDD supply volage (24V to 50V)
  3. Set Gate Pulse Enable to high (3V)
  4. Turn on the RF Signal Generator
  5. Turn on the input pulse to Drain Pulse Enable

The signal on the spectrum analyzer should be similar to the trace below.

Turn Off

  1. Turn off the RF Signal Generator
  2. Set Gate Pulse Enable to low
  3. Turn off the pulse to Drain Pulse Enable (set to low)
  4. Turn off the main VDD supply volage

Gate Pulsed Mode Operation

Setup

  1. The setup for Gate Pulsed Mode operation is very similar to Drain Pulsed Mode. The main difference is that the connection of the pulse source and the dc source to Drain Pulse Enable and Gate Pulse Enable connectors respectively, is flipped, that is a fixed logic 1 is placed on the Drain Pulse Enable input and a 0/3V pulse is placed on the Gate Pulse Enable input.
  2. Most of ADI's GaN PA evaluation boards ship with significant capacitance connected to the VGG1 pin. To operate in Drain Pulsed Mode, most of these capacitors must be removed. In general 100pF or 1nF of capacitance should be left in place.
  3. Setup up the power supply voltages before attaching the PA board to the underside of the Pulser Plus board
  4. Set the power supply's output voltage somewhere between 22V to 50V based on the requirements of the power amplifier being used. With the supply voltage turned off, connect the power supply cables to the red and black banana connectors (black=GND). Leave this voltage off for now.
  5. Set up a 3V dc supply to drive the Drain Pulse Enable SMA connector. Leave this voltage off for now.
  6. Set up a 3V dc supply to drive the Gate Pulse Enable SMA connector Leave this voltage off for now.
  7. Before attaching the PA evaluation board to the underside of the Pulser Plus board, turn on the main supply and set the Gate Pulse Enable voltage to +3V.
  8. Connect a Digital Volt Meter (DVM) to the VGG1 and GND clip leads and adjust the blue potentiometer(R48) until the desired gate voltage is set. This voltage will generally be set in the -0.5 to -2.5V range. Consult the IDQ vs VGG1 plot in the PA datasheet for further guidance on what value to choose for VGG1. Once this step is complete turn off the Gate Pulse Enable voltage and the main power supply.
  9. Remove the dc supply connected to Gate Pulse Enable and replace it with a digital pulse generator. The high level on this pulse should be between 3V and 5V. Note the Gate Pulse Enable input is terminated with a 200 ohm resistor (R49) on the Pulser Plus Board. If Drain Pulse Enable is going to be driven from a 50 ohm source, replace r69 with a 50 ohm resistor and set up the digital pulser generator so that it is expecting to be driving a 50 ohm load. Set the Drain Pulse Enable pulse to 0V for now.
  10. Connect an RF Signal Generator and Spectrum Analyzer to the RFIN and RFOUT SMA connectors of the PA evaluation board.
  11. Carefully plug the PA evaluation board into the underside of the Pulser Plus board. Make sure that the pins are correctly aligned and that RFOUT is towards the front of the Pulser Plus board, aligned with the Drain Pulse Enable and VDD_PA SENSE SMA connectors.
  12. Set the RF input power level and frequency according to the PA datasheet. Ensure that the RF output power from the signal generator is off for now.
  13. In general an attenuator will be required between RFOUT and the input of the spectrum analyzer to avoid damage to the spectrum analyzer. Typically a 20-30 dB of attenuator with adequate heat sinking will be used.
  14. Set the spectrum analyzer center frequency, attenuation and reference level based on the expected input frequency and power level.
  15. Care should be taken in setting the attenuation level of the spectrum analyzer. To maximize the dynamic range of the measurement, set the attenuation of the spectrum analyzer to the minimum that the spectrum analyzer will accept (this will maximize the range of the instrument's internal RF power detectors). Setting the spectrum analyzer's input attenuation level too high may result in an slow observed response time, particularly on its falling edge.
  16. Switch the operating mode to Zero Span. Set the Resolution Bandwidth (RBW) and Video Bandwidth (VB) to the highest available values (ideally 10 MHz or greater). Set the sweep trigger to “External”
  17. Switch the operating mode to Zero Span. Set the Resolution Bandwidth (RBW) and Video Bandwidth (VB) to the highest available values (ideally 10 MHz or greater). Set the sweep trigger to “External” and connect the pulse generator's sync or trigger output to the external trigger input of the spectrum analyzer. This signal will trigger input will be used to start the spectrum analyzer's zero span sweep
  18. If the PA evaluation board is not connected to a heat sink, operation at a very low duty cycle is recommended. A starting pulse profile of 10 us high and 10 ms low is recommended (i.e. 0.1% duty cycle). For PAs operating up to 47 dBm output power, this duty cycle has been observed to result in negligible self-heating.

Turn On

  1. Ensure that the voltage on Gate Pulse Enable is low (pulse generator output disabled)
  2. Turn on the main VDD supply volage (24V to 50V)
  3. Turn on Drain Pulse Enable (3V dc)
  4. Turn on the RF Signal Generator
  5. Turn on the output of the pulse generator driving Gate Pulse Enable

Turn Off

  1. Turn off the output of the pulse generator driving Gate Pulse Enable
  2. Turn off the RF Signal Generator
  3. Turn off Drain Pulse Enable (0V dc)
  4. Turn off the main VDD supply volage (24V to 50V)

Resources

Support

For support on this reference design, please contact us through our technical support portal at the follow link: en/support/technical-support.html. Alternatively, you can log on to the RF & Microwave Community on Engineerzone (rf/) and post a question that contains the Keywords “PulserPlus” or “Pulser Plus” and we will get back to you.


/srv/wiki.analog.com/data/pages/resources/eval/developer-kits/pulser-plus.txt · Last modified: 01 Mar 2024 16:48 by Eamon Nash