Wiki

Analog Devices Wiki

English
English
简体中文
简体中文
日本語
日本語
Руccкий
Руccкий

Differences

This shows you the differences between two versions of the page.

Link to this comparison view

Both sides previous revisionPrevious revision
Next revision		Previous revision
resources:eval:ad9083 [22 Mar 2021 16:35] – added trigger section Alex Arrantsresources:eval:ad9083 [05 Jan 2022 16:45] (current) – change Gerber layout files to layout files Brigid Duggan
Line 26: Line 26:
 ===== Board Design and Integration Files ===== ===== Board Design and Integration Files =====
   * {{:resources:eval:ad9083:02_059760b.pdf|Schematics}}   * {{:resources:eval:ad9083:02_059760b.pdf|Schematics}}
-  * {{:resources:eval:ad9083:ad9083ebz_revc.zip|Gerber Layout files}}+  * {{:resources:eval:ad9083:ad9083ebz_revc.zip| Layout files}}
   * {{:resources:eval:ad9083:05-059760-01-c.zip | Bill of materials}}   * {{:resources:eval:ad9083:05-059760-01-c.zip | Bill of materials}}
  
Line 224: Line 224:
 //Figure 9. AD9083EBZ Precision Time Domain Mode Typical FFT // //Figure 9. AD9083EBZ Precision Time Domain Mode Typical FFT //
 ===== External Trigger ===== ===== External Trigger =====
-SMA connector J2 on the ADS8v3 is used as an optional trigger so that the data capture start time can be controlled. The trigger requires an 1.8V active high pulse width that is longer than the FPGA internal peripheral clock, which has a frequency of 50 MHz. +SMA connector J2 on the ADS8v3 can be used as an optional trigger so that the data capture start time can be controlled. The trigger requires a 1.8V active high pulse width that is longer than the FPGA internal peripheral clock, which has a frequency of 50 MHz. 
 To enable the external trigger: To enable the external trigger:
  
Line 231: Line 231:
  
 2. Click on the "+" sign next to Address (Hex) 0106. 2. Click on the "+" sign next to Address (Hex) 0106.
-{{:resources:eval:ad9083:ext_trig_en.png?1652|}}+{{:resources:eval:ad9083:0106.png?555|}} 
 3. Click on the "0" that is on the same row as "ext_trig_en". The 0 will change to a 1. 3. Click on the "0" that is on the same row as "ext_trig_en". The 0 will change to a 1.
 +{{:resources:eval:ad9083:ext_trig_en.png?1652|}}
  
 4. Click "Apply Changes" 4. Click "Apply Changes"
Line 239: Line 241:
 SMA connector J3 is normally used as a system ready indicator. It indicates that the FPGA is ready to accept an external trigger.  SMA connector J3 is normally used as a system ready indicator. It indicates that the FPGA is ready to accept an external trigger. 
  
 +To capture data, click on "Run Once" as normal. Capture will begin once 1.8V is detected on connector J2 of the ADS8v3.
  
 ===== Troubleshooting Notes ===== ===== Troubleshooting Notes =====
resources/eval/ad9083.1616427333.txt.gz · Last modified: 22 Mar 2021 16:35 by Alex Arrants

Page Tools