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resources:eval:ad9083 [22 Feb 2021 22:14] – [Evaluation] Alex Arrantsresources:eval:ad9083 [05 Jan 2022 16:45] (current) – change Gerber layout files to layout files Brigid Duggan
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 ===== Board Design and Integration Files ===== ===== Board Design and Integration Files =====
   * {{:resources:eval:ad9083:02_059760b.pdf|Schematics}}   * {{:resources:eval:ad9083:02_059760b.pdf|Schematics}}
-  * {{:resources:eval:ad9083:ad9083ebz_revc.zip|Gerber Layout files}}+  * {{:resources:eval:ad9083:ad9083ebz_revc.zip| Layout files}}
   * {{:resources:eval:ad9083:05-059760-01-c.zip | Bill of materials}}   * {{:resources:eval:ad9083:05-059760-01-c.zip | Bill of materials}}
  
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   * fC = 800 MHz.   * fC = 800 MHz.
   * High Performance Mode = False   * High Performance Mode = False
-  * fIn Max = 50 MHz (sample rate/20).+  * Fin Max = 50 MHz (sample rate/20).
   * Backoff = 0   * Backoff = 0
   * # ADC Channels = 16   * # ADC Channels = 16
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 //Figure 9. AD9083EBZ Precision Time Domain Mode Typical FFT // //Figure 9. AD9083EBZ Precision Time Domain Mode Typical FFT //
 +===== External Trigger =====
 +SMA connector J2 on the ADS8v3 can be used as an optional trigger so that the data capture start time can be controlled. The trigger requires a 1.8V active high pulse width that is longer than the FPGA internal peripheral clock, which has a frequency of 50 MHz. 
 +To enable the external trigger:
 +
 +1. Click on "Navigate to FPGA SPI" on the block diagram of the AD9083 Chip View
 +{{:resources:eval:ad9083:navigate_to_fpga_spi.png?396|}}
 +
 +2. Click on the "+" sign next to Address (Hex) 0106.
 +{{:resources:eval:ad9083:0106.png?555|}}
 +
 +3. Click on the "0" that is on the same row as "ext_trig_en". The 0 will change to a 1.
 +{{:resources:eval:ad9083:ext_trig_en.png?1652|}}
 +
 +4. Click "Apply Changes"
 +{{:resources:eval:ad9083:apply_changes.png?94|}}
 +
 +SMA connector J3 is normally used as a system ready indicator. It indicates that the FPGA is ready to accept an external trigger. 
 +
 +To capture data, click on "Run Once" as normal. Capture will begin once 1.8V is detected on connector J2 of the ADS8v3.
 +
 ===== Troubleshooting Notes ===== ===== Troubleshooting Notes =====
 **Evaluation Board is not Functioning Properly** **Evaluation Board is not Functioning Properly**
resources/eval/ad9083.1614028463.txt.gz · Last modified: 22 Feb 2021 22:14 by Alex Arrants