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resources:eval:ad9083 [22 Mar 2021 21:18]
Alex Arrants [External Trigger]
resources:eval:ad9083 [05 Jan 2022 16:45]
Brigid Duggan change Gerber layout files to layout files
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 ===== Board Design and Integration Files ===== ===== Board Design and Integration Files =====
   * {{:​resources:​eval:​ad9083:​02_059760b.pdf|Schematics}}   * {{:​resources:​eval:​ad9083:​02_059760b.pdf|Schematics}}
-  * {{:​resources:​eval:​ad9083:​ad9083ebz_revc.zip|Gerber ​Layout files}}+  * {{:​resources:​eval:​ad9083:​ad9083ebz_revc.zip| Layout files}}
   * {{:​resources:​eval:​ad9083:​05-059760-01-c.zip | Bill of materials}}   * {{:​resources:​eval:​ad9083:​05-059760-01-c.zip | Bill of materials}}
  
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 //Figure 9. AD9083EBZ Precision Time Domain Mode Typical FFT // //Figure 9. AD9083EBZ Precision Time Domain Mode Typical FFT //
 ===== External Trigger ===== ===== External Trigger =====
-SMA connector J2 on the ADS8v3 can used as an optional trigger so that the data capture start time can be controlled. The trigger requires ​an 1.8V active high pulse width that is longer than the FPGA internal peripheral clock, which has a frequency of 50 MHz. +SMA connector J2 on the ADS8v3 can be used as an optional trigger so that the data capture start time can be controlled. The trigger requires ​1.8V active high pulse width that is longer than the FPGA internal peripheral clock, which has a frequency of 50 MHz. 
 To enable the external trigger: To enable the external trigger:
  
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 3. Click on the "​0"​ that is on the same row as "​ext_trig_en"​. The 0 will change to a 1. 3. Click on the "​0"​ that is on the same row as "​ext_trig_en"​. The 0 will change to a 1.
 {{:​resources:​eval:​ad9083:​ext_trig_en.png?​1652|}} {{:​resources:​eval:​ad9083:​ext_trig_en.png?​1652|}}
 +
 4. Click "Apply Changes"​ 4. Click "Apply Changes"​
 {{:​resources:​eval:​ad9083:​apply_changes.png?​94|}} {{:​resources:​eval:​ad9083:​apply_changes.png?​94|}}
resources/eval/ad9083.txt · Last modified: 05 Jan 2022 16:45 by Brigid Duggan