| Both sides previous revisionPrevious revisionNext revision | Previous revision |
| resources:alliances:xilinx [20 Feb 2014 21:22] – [ADC Driver Pulsar] table re-org Brandon Bushey | resources:alliances:xilinx [05 Apr 2021 16:41] (current) – Ioana Chelaru |
|---|
| ===== Add on Boards ===== | ===== Add on Boards ===== |
| |
| ADI products can be found on many boards which use industry standard connectors, such as PMODs and [[http://www.vita.com/fmc.html|FMC]]. | ADI products can be found on many boards which use industry standard connectors, such as PMODs and [[http://www.vita.com/fmc|FMC]]. |
| |
| {{page>./digilent#fmc}} | {{page>./digilent#fmc}} |
| {{page>./avnet#fmc}} | |
| {{page>./digilent#pmods}} | {{page>./digilent#pmods}} |
| |
| | [[adi>cn0336|EVAL-CN0336-PMDZ]] | {{:resources:alliances:cn0336_hw_375.jpg?200 }} \\ \\ CN0336 processes 4 mA to 20 mA input signals using a single 3.3 V supply. The total error after room temperature calibration is ±0.06% FSR over a ±10°C temperature change, making it ideal for a wide variety of industrial measurements. Both data and power are isolated, thereby making the circuit robust to high voltages and also ground-loop interference often encountered in harsh industrial environments. | [[adi>ad7091r|AD7091R]] \\ [[adi>ad8606|AD8606]] \\ [[adi>adum5401|ADUM5401]] | | | [[adi>cn0336|EVAL-CN0336-PMDZ]] | {{:resources:alliances:cn0336_hw_375.jpg?200 }} \\ \\ CN0336 processes 4 mA to 20 mA input signals using a single 3.3 V supply. The total error after room temperature calibration is ±0.06% FSR over a ±10°C temperature change, making it ideal for a wide variety of industrial measurements. Both data and power are isolated, thereby making the circuit robust to high voltages and also ground-loop interference often encountered in harsh industrial environments. | [[adi>ad7091r|AD7091R]] \\ [[adi>ad8606|AD8606]] \\ [[adi>adum5401|ADUM5401]] | |
| | [[adi>cn0337|EVAL-CN0337-PMDZ]] | {{:resources:alliances:cn0337_hw_375.jpg?200 }} \\ \\ CN0337 processes the output of a PT100 RTD and includes an innovative circuit for lead-wire compensation using a standard 3-wire connection. The circuit operates on a single 3.3 V supply. | [[adi>ad7091r|AD7091R]] \\ [[adi>ad8606|AD8606]] \\ [[adi>adum5401|ADUM5401]] | | | [[adi>cn0337|EVAL-CN0337-PMDZ]] | {{:resources:alliances:cn0337_hw_375.jpg?200 }} \\ \\ CN0337 processes the output of a PT100 RTD and includes an innovative circuit for lead-wire compensation using a standard 3-wire connection. The circuit operates on a single 3.3 V supply. | [[adi>ad7091r|AD7091R]] \\ [[adi>ad8606|AD8606]] \\ [[adi>adum5401|ADUM5401]] | |
| | [[adi>cn0346|EVAL-CN0346-PMDZ]] | {{:resources:alliances:cn0346_hw_375.jpg?200 }} \\ \\ CN0346 is a pH measurement sensing circuit which can be connected up to any Pmod compatible host controller board. This is designed for a portable application and always for temperature calibration. | [[adi>ad7156|AD7156]] \\ [[adi>ad8615|AD8615]] \\ [[adi>adp125|ADP125]] | | | [[adi>cn0346|EVAL-CN0346-PMDZ]] | {{:resources:alliances:cn0346_hw_375.jpg?200 }} \\ \\ CN0346 is a relative humidity sensing circuit which can be connected up to any Pmod compatible host controller board. | [[adi>ad7156|AD7156]] \\ [[adi>ad8615|AD8615]] \\ [[adi>adp125|ADP125]] | |
| | | [[adi>cn0349|EVAL-CN0349-PMDZ]] | {{:resources:alliances:cn0349_hw_375.jpg?200 }} \\ \\ CN0349 is a fully Isolated conductivity measurement data acquisition system.| [[adi>ad5934|AD5934]] \\ [[adi>ad8606|AD8606]] \\ [[adi>adum5000|ADUM5000]] \\ [[adi>adum1250|ADUM1250]] \\ [[adi>adg715|ADG715]] | |
| | | [[adi>cn0350|EVAL-CN0350-PMDZ]] | {{:resources:alliances:cn0350_hw_375.jpg?200 }} \\ \\ CN0350 processes charge input signals from piezoelectric sensors using a single 3.3 V supply and has a total error of less than 0.25% FSR after calibration over a ±10°C temperature range. | [[adi>ad7091r|AD7091R]] \\ [[adi>ad8608|AD8608]] | |
| | | [[adi>cn0354|EVAL-CN0354-PMDZ]] | {{:resources:alliances:cn0354_hw_375.jpg?200 }} \\ \\ CN0354 is a low power multichannel thermocouple measurement system with cold junction compensation.| [[adi>ad7787|AD7787]] \\ [[adi>ad8495|AD8495]] \\ [[adi>adm8829|ADM8829]] \\ [[adi>adg1609|ADG1609]] \\ [[adi>adr3412|ADR3412]] \\ [[adi>ref194|REF194]] | |
| | | [[adi>cn0355|EVAL-CN0355-PMDZ]] | {{:resources:alliances:cn0355_hw_375.jpg?200 }} \\ \\ CN0355 is a low power signal conditioner for resistive bridge type sensors and includes a temperature compensation channel.| [[adi>ad7793|AD7793]] \\ [[adi>ad8420|AD8420]] \\ [[adi>ada4096-2|ADA4096-2]] | |
| | | [[adi>cn0357|EVAL-CN0357-PMDZ]] | {{:resources:alliances:cn0357_hw_375.jpg?200 }} \\ \\ CN0357 is an electrochemical gas sensing signal conditioning solution, designed to work with many electrochemical gas sensors down to resolutions of 1 part per million (ppm).| [[adi>ad7790|AD7790]] \\ [[adi>ada4528-2|ADA4528-2]] \\ [[adi>ad8500|AD8500]] \\ [[adi>adr3412|ADR3412]] \\ [[adi>ad5270|AD5270]] | |
| | ==== ADC Drivers ==== |
| |
| ==== ADC Driver Pulsar ==== | ^ Resolution ^ Sampling Speed ^ Part Number / Purchase ^ Description ^ ADI Parts ^ Device Driver ^ |
| | | 14-Bits | 250 KSPS | [[adi>ad7942|EVAL-AD7942-PMDZ]] | {{:resources:alliances:adc_driver_pmod_375.jpg?200 }} \\ \\ AD7942 is a 14-bit PulSAR® ADC 250 kSPS, unipolar, single-ended input. | [[adi>ad7942|AD7942]] \\ [[adi>ada4841|ADA4841]] | [[resources:tools-software:linux-drivers:iio-adc:ad7476a|AD7942 IIO Serial ADC Linux Driver]] | |
| ^ Resolution ^ Sampling Speed ^ Part Number / Purchase ^ Description ^ ADI Parts ^ | | 14-Bits | 500 KSPS | [[adi>ad7946|EVAL-AD7946-PMDZ]] | {{:resources:alliances:adc_driver_pmod_375.jpg?200 }} \\ \\ AD7946 is a 14-bit PulSAR® ADC 500 kSPS, unipolar, single-ended input. | [[adi>ad7946|AD7946]] \\ [[adi>ada4841|ADA4841]] | [[resources:tools-software:linux-drivers:iio-adc:ad7476a|AD7946 IIO Serial ADC Linux Driver]] | |
| | 14-Bits | 250 KSPS | [[adi>ad7942|EVAL-AD7942-PMDZ]] | {{:resources:alliances:adc_driver_pmod_375.jpg?200 }} \\ \\ AD7942 is a 14-bit PulSAR® ADC 250 kSPS, unipolar, single-ended input. | [[adi>ad7942|AD7942]] \\ [[adi>ada4841|ADA4841]] | | | 16-Bits | 100 KSPS | [[adi>ad7988-1|EVAL-AD7988-1-PMDZ]] | {{:resources:alliances:adc_driver_pmod_375.jpg?200 }} \\ \\ AD7988-1 is a 16-bit PulSAR® ADC 100 kSPS, unipolar, differential input. | [[adi>ad7988-1|AD7988-1]] \\ [[adi>ada4841|ADA4841]] | [[resources:tools-software:linux-drivers:iio-adc:ad7476a|AD7988-1 IIO Serial ADC Linux Driver]] | |
| | 14-Bits | 500 KSPS | [[adi>ad7946|EVAL-AD7946-PMDZ]] | {{:resources:alliances:adc_driver_pmod_375.jpg?200 }} \\ \\ AD7946 is a 14-bit PulSAR® ADC 500 kSPS, unipolar, single-ended input. | [[adi>ad7946|AD7946]] \\ [[adi>ada4841|ADA4841]] | | | 16-Bits | 250 KSPS | [[adi>ad7685|EVAL-AD7685-PMDZ]] | {{:resources:alliances:adc_driver_pmod_375.jpg?200 }} \\ \\ AD7685 is a 16-bit PulSAR® ADC 250 kSPS, unipolar, single-ended input. | [[adi>ad7685|AD7685]] \\ [[adi>ada4841|ADA4841]] | [[resources:tools-software:linux-drivers:iio-adc:ad7476a|AD7685 IIO Serial ADC Linux Driver]] | |
| | 16-Bits | 100 KSPS | [[adi>ad7988-1|EVAL-AD7988-1-PMDZ]] | {{:resources:alliances:adc_driver_pmod_375.jpg?200 }} \\ \\ AD7988-1 is a 16-bit PulSAR® ADC 100 kSPS, unipolar, differential input. | [[adi>ad7988-1|AD7988-1]] \\ [[adi>ada4841|ADA4841]] | | | 16-Bits | 250 KSPS | [[adi>ad7687|EVAL-AD7687-PMDZ]] | {{:resources:alliances:adc_driver_pmod_375.jpg?200 }} \\ \\ AD7687 is a 16-bit PulSAR® ADC 250 kSPS, unipolar, differential input. | [[adi>ad7687|AD7687]] \\ [[adi>ada4841|ADA4841]] | [[resources:tools-software:linux-drivers:iio-adc:ad7476a|AD7687 IIO Serial ADC Linux Driver]] | |
| | 16-Bits | 250 KSPS | [[adi>ad7685|EVAL-AD7685-PMDZ]] | {{:resources:alliances:adc_driver_pmod_375.jpg?200 }} \\ \\ AD7685 is a 16-bit PulSAR® ADC 250 kSPS, unipolar, single-ended input. | [[adi>ad7685|AD7685]] \\ [[adi>ada4841|ADA4841]] | | | 16-Bits | 250 KSPS | [[adi>ad7691|EVAL-AD7691-PMDZ]] | {{:resources:alliances:adc_driver_pmod_375.jpg?200 }} \\ \\ AD7691 is a 16-bit PulSAR® ADC 250 kSPS, unipolar, differential input. | [[adi>ad7691|AD7691]] \\ [[adi>ada4841|ADA4841]] | [[resources:tools-software:linux-drivers:iio-adc:ad7476a|AD7691 IIO Serial ADC Linux Driver]] | |
| | 16-Bits | 250 KSPS | [[adi>ad7687|EVAL-AD7687-PMDZ]] | {{:resources:alliances:adc_driver_pmod_375.jpg?200 }} \\ \\ AD7687 is a 16-bit PulSAR® ADC 250 kSPS, unipolar, differential input. | [[adi>ad7687|AD7687]] \\ [[adi>ada4841|ADA4841]] | | | 16-Bits | 500 KSPS | [[adi>ad7686|EVAL-AD7686-PMDZ]] | {{:resources:alliances:adc_driver_pmod_375.jpg?200 }} \\ \\ AD7686 is a 16-bit PulSAR® ADC 500 kSPS, unipolar, single-ended input. | [[adi>ad7686|AD7686]] \\ [[adi>ada4841|ADA4841]] | [[resources:tools-software:linux-drivers:iio-adc:ad7476a|AD7686 IIO Serial ADC Linux Driver]] | |
| | 16-Bits | 250 KSPS | [[adi>ad7691|EVAL-AD7691-PMDZ]] | {{:resources:alliances:adc_driver_pmod_375.jpg?200 }} \\ \\ AD7691 is a 16-bit PulSAR® ADC 250 kSPS, unipolar, differential input. | [[adi>ad7691|AD7691]] \\ [[adi>ada4841|ADA4841]] | | | 16-Bits | 500 KSPS | [[adi>ad7688|EVAL-AD7688-PMDZ]] | {{:resources:alliances:adc_driver_pmod_375.jpg?200 }} \\ \\ AD7688 is a 16-bit PulSAR® ADC 500 kSPS, unipolar, differential input. | [[adi>ad7688|AD7688]] \\ [[adi>ada4841|ADA4841]] | [[resources:tools-software:linux-drivers:iio-adc:ad7476a|AD7688 IIO Serial ADC Linux Driver]] | |
| | 16-Bits | 500 KSPS | [[adi>ad7686|EVAL-AD7686-PMDZ]] | {{:resources:alliances:adc_driver_pmod_375.jpg?200 }} \\ \\ AD7686 is a 16-bit PulSAR® ADC 500 kSPS, unipolar, single-ended input. | [[adi>ad7686|AD7686]] \\ [[adi>ada4841|ADA4841]] | | | 16-Bits | 500 KSPS | [[adi>ad7693|EVAL-AD7693-PMDZ]] | {{:resources:alliances:adc_driver_pmod_375.jpg?200 }} \\ \\ AD7693 is a 16-bit PulSAR® ADC 500 kSPS, unipolar, differential input. | [[adi>ad7693|AD7693]] \\ [[adi>ada4841|ADA4841]] | [[resources:tools-software:linux-drivers:iio-adc:ad7476a|AD7693 IIO Serial ADC Linux Driver]] | |
| | 16-Bits | 500 KSPS | [[adi>ad7688|EVAL-AD7688-PMDZ]] | {{:resources:alliances:adc_driver_pmod_375.jpg?200 }} \\ \\ AD7688 is a 16-bit PulSAR® ADC 500 kSPS, unipolar, differential input. | [[adi>ad7688|AD7688]] \\ [[adi>ada4841|ADA4841]] | | | 16-Bits | 500 KSPS | [[adi>ad7988-5|EVAL-AD7988-5-PMDZ]] | {{:resources:alliances:adc_driver_pmod_375.jpg?200 }} \\ \\ AD7988-5 is a 16-bit PulSAR® ADC 500 kSPS, unipolar, single-ended input. | [[adi>ad7988-5|AD7988-5]] \\ [[adi>ada4841|ADA4841]] | [[resources:tools-software:linux-drivers:iio-adc:ad7476a|AD7988-5 IIO Serial ADC Linux Driver]] | |
| | 16-Bits | 500 KSPS | [[adi>ad7693|EVAL-AD7693-PMDZ]] | {{:resources:alliances:adc_driver_pmod_375.jpg?200 }} \\ \\ AD7693 is a 16-bit PulSAR® ADC 500 kSPS, unipolar, differential input. | [[adi>ad7693|AD7693]] \\ [[adi>ada4841|ADA4841]] | | | 16-Bits | 1000 KSPS | [[adi>ad7980|EVAL-AD7980-PMDZ]] | {{:resources:alliances:adc_driver_pmod_375.jpg?200 }} \\ \\ AD7980 is a 16-bit PulSAR® ADC 1000 kSPS, unipolar, single-ended input. | [[adi>ad7980|AD7980]] \\ [[adi>ada4841|ADA4841]] | [[resources:tools-software:linux-drivers:iio-adc:ad7476a|AD7980 IIO Serial ADC Linux Driver]] | |
| | 16-Bits | 500 KSPS | [[adi>ad7988-5|EVAL-AD7988-5-PMDZ]] | {{:resources:alliances:adc_driver_pmod_375.jpg?200 }} \\ \\ AD7988-5 is a 16-bit PulSAR® ADC 500 kSPS, unipolar, single-ended input. | [[adi>ad7988-5|AD7988-5]] \\ [[adi>ada4841|ADA4841]] | | | 16-Bits | 1333 KSPS | [[adi>ad7983|EVAL-AD7983-PMDZ]] | {{:resources:alliances:adc_driver_pmod_375.jpg?200 }} \\ \\ AD7983 is a 16-bit PulSAR® ADC 1333 kSPS, unipolar, single-ended input. | [[adi>ad7983|AD7983]] \\ [[adi>ada4841|ADA4841]] | [[resources:tools-software:linux-drivers:iio-adc:ad7476a|AD7983 IIO Serial ADC Linux Driver]] | |
| | 16-Bits | 1000 KSPS | [[adi>ad7980|EVAL-AD7980-PMDZ]] | {{:resources:alliances:adc_driver_pmod_375.jpg?200 }} \\ \\ AD7980 is a 16-bit PulSAR® ADC 1000 kSPS, unipolar, single-ended input. | [[adi>ad7980|AD7980]] \\ [[adi>ada4841|ADA4841]] | | | 18-Bits | 400 KSPS | [[adi>ad7690|EVAL-AD7690-PMDZ]] | {{:resources:alliances:adc_driver_pmod_375.jpg?200 }} \\ \\ AD7690 is a 18-bit PulSAR® ADC 400 kSPS, unipolar, differential input. | [[adi>ad7690|AD7690]] \\ [[adi>ada4841|ADA4841]] | [[resources:tools-software:linux-drivers:iio-adc:ad7476a|AD7690 IIO Serial ADC Linux Driver]] | |
| | 16-Bits | 1333 KSPS | [[adi>ad7983|EVAL-AD7983-PMDZ]] | {{:resources:alliances:adc_driver_pmod_375.jpg?200 }} \\ \\ AD7983 is a 16-bit PulSAR® ADC 1333 kSPS, unipolar, single-ended input. | [[adi>ad7983|AD7983]] \\ [[adi>ada4841|ADA4841]] | | | 18-Bits | 1000 KSPS | [[adi>ad7982|EVAL-AD7982-PMDZ]] | {{:resources:alliances:adc_driver_pmod_375.jpg?200 }} \\ \\ AD7982 is a 18-bit PulSAR® ADC 1000 kSPS, unipolar, differential input. | [[adi>ad7982|AD7982]] \\ [[adi>ada4841|ADA4841]] | [[resources:tools-software:linux-drivers:iio-adc:ad7476a|AD7982 IIO Serial ADC Linux Driver]] | |
| | 16-Bits | 1333 KSPS | [[adi>ad7984|EVAL-AD7984-PMDZ]] | {{:resources:alliances:adc_driver_pmod_375.jpg?200 }} \\ \\ AD7984 is a 16-bit PulSAR® ADC 1333 kSPS, unipolar, differential input. | [[adi>ad7984|AD7984]] \\ [[adi>ada4841|ADA4841]] | | | 18-Bits | 1333 KSPS | [[adi>ad7984|EVAL-AD7984-PMDZ]] | {{:resources:alliances:adc_driver_pmod_375.jpg?200 }} \\ \\ AD7984 is a 18-bit PulSAR® ADC 1333 kSPS, unipolar, differential input. | [[adi>ad7984|AD7984]] \\ [[adi>ada4841|ADA4841]] | [[resources:tools-software:linux-drivers:iio-adc:ad7476a|AD7984 IIO Serial ADC Linux Driver]] | |
| | 18-Bits | 400 KSPS | [[adi>ad7690|EVAL-AD7690-PMDZ]] | {{:resources:alliances:adc_driver_pmod_375.jpg?200 }} \\ \\ AD7690 is a 18-bit PulSAR® ADC 400 kSPS, unipolar, differential input. | [[adi>ad7690|AD7690]] \\ [[adi>ada4841|ADA4841]] | | |
| | 18-Bits | 1000 KSPS | [[adi>ad7982|EVAL-AD7982-PMDZ]] | {{:resources:alliances:adc_driver_pmod_375.jpg?200 }} \\ \\ AD7982 is a 18-bit PulSAR® ADC 1000 kSPS, unipolar, differential input. | [[adi>ad7982|AD7982]] \\ [[adi>ada4841|ADA4841]] | | |
| ===== Adapter Boards ===== | ===== Adapter Boards ===== |
| |
| An Adapter Board is an electrical interface routing between one socket or connection to another. The purpose of these adapters are to reroute one connector (normally an ADI standard connector) to a different connector (normally a standard Xilinx connector). | An Adapter Board is an electrical interface routing between one socket or connection to another. The purpose of these adapters are to reroute one connector (normally an ADI standard connector) to a different connector (normally a standard Xilinx connector). |
| |
| ==== AD-DAC-FMC Adapter Board ==== | ==== AD-DAC-FMC Adapter Board ==== |
| {{ http://www.analog.com/static/imported-files/images/evaluation_tools/AD-DAC-FMC-ADP_sm.jpg?150}} \\ | {{ http://www.analog.com/static/imported-files/images/evaluation_tools/AD-DAC-FMC-ADP_sm.jpg?150}} \\ |
| |< 100% 15% 75% 10% >| | |< 100% 15% 75% 10% >| |
| ^ Part Number ^ Description ^ ADI Parts ^ | ^ Part Number ^ Description ^ ADI Parts ^ |
| | [[adi>AD9739-R2-EBZ]] | **Reference design:** [[resources/fpga/xilinx/interposer/ad9739a|Analog Devices]]\\ \\ 14-Bit, 2500 MSPS, RF Digital-to-Analog Converter | [[adi>AD9739]] | | | [[adi>AD9739-R2-EBZ]] | **Reference design:** [[resources/fpga/xilinx/interposer/ad9739a|Analog Devices]]\\ \\ 14-Bit, 2500 MSPS, RF Digital-to-Analog Converter | [[adi>AD9739]] | |
| | [[adi>AD9789-EBZ]] | **Reference design:** [[resources/fpga/xilinx/interposer/ad9789|Analog Devices]]\\ \\ 4 Channel QAM encoder/interpolator/upconverter with 2400 MSPS, 14-bit RF digital-to-analog converter | [[adi>AD9789]] | | | [[adi>AD9789-EBZ]] | **Reference design:** [[resources/fpga/xilinx/interposer/ad9789|Analog Devices]]\\ \\ 4 Channel QAM encoder/interpolator/upconverter with 2400 MSPS, 14-bit RF digital-to-analog converter | [[adi>AD9789]] | |
| | [[adi>AD9122-EBZ]] | **Reference design:** [[resources/fpga/xilinx/interposer/ad9122|Analog Devices]]\\ \\ Dual 16-bit, 1200MSPS digital-to-analog converter | [[adi>AD9122]] | | | [[adi>EVAL-AD9122]] | **Reference design:** [[resources/fpga/xilinx/interposer/ad9122|Analog Devices]]\\ \\ Dual 16-bit, 1200MSPS digital-to-analog converter | [[adi>AD9122]] | |
| | [[adi>AD9129-EBZ]] | **Reference design:** [[resources/fpga/xilinx/interposer/ad9129|Analog Devices]]\\ \\ 14-bit, 2.8GSPS digital-to-analog converter | [[adi>AD9129]] | | | [[adi>AD9129-EBZ]] | **Reference design:** [[resources/fpga/xilinx/interposer/ad9129|Analog Devices]]\\ \\ 14-bit, 2.8GSPS digital-to-analog converter | [[adi>AD9129]] | |
| | [[adi>AD9747-EBZ]] | **Reference design:** [[resources/fpga/xilinx/interposer/ad9747|Analog Devices]]\\ \\ Dual 16-bit, 250MSPS digital-to-analog converter | [[adi>AD9747]] | | | [[adi>AD9747-EBZ]] | **Reference design:** [[resources/fpga/xilinx/interposer/ad9747|Analog Devices]]\\ \\ Dual 16-bit, 250MSPS digital-to-analog converter | [[adi>AD9747]] | |
| | [[adi>AD9117-DPG2-EBZ]] \\ [[adi>AD9116-DPG2-EBZ]] \\ [[adi>AD9115-DPG2-EBZ]] \\ [[adi>AD9114-DPG2-EBZ ]] | **Reference design:** [[resources/fpga/xilinx/interposer/ad9116|Analog Devices]]\\ \\ 8/10/12/14-bit, low power digital-to-analog converter (DAC) that provides a sample rate of 125 MSPS. | [[adi>AD9114]] \\ [[adi>AD9115]] \\ [[adi>AD9116]] \\ [[adi>AD9117]] | | | [[adi>AD9117-DPG2-EBZ]] \\ [[adi>AD9116-DPG2-EBZ]] \\ [[adi>AD9115-DPG2-EBZ]] \\ [[adi>AD9114-DPG2-EBZ ]] | **Reference design:** [[resources/fpga/xilinx/interposer/ad9116|Analog Devices]]\\ \\ 8/10/12/14-bit, low power digital-to-analog converter (DAC) that provides a sample rate of 125 MSPS. | [[adi>AD9114]] \\ [[adi>AD9115]] \\ [[adi>AD9116]] \\ [[adi>AD9117]] | |
| | [[adi>AD9785-DPG2-EBZ]] \\ [[adi>AD9787-DPG2-EBZ]] \\ [[adi>AD9788-DPG2-EBZ]] | **Reference design:** [[resources/fpga/xilinx/interposer/ad9787|Analog Devices]]\\ \\ 12-bit, 14-bit, and 16-bit, high dynamic range TxDAC® devices, respectively, that provide a sample rate of 800 MSPS, permitting multicarrier generation up to the Nyquist frequency. | [[adi>AD9785]] \\ [[adi>AD9787]] \\ [[adi>AD9788]] | | | [[adi>AD9785-DPG2-EBZ]] \\ [[adi>AD9787-DPG2-EBZ]] \\ [[adi>AD9788-DPG2-EBZ]] | **Reference design:** [[resources/fpga/xilinx/interposer/ad9787|Analog Devices]]\\ \\ 12-bit, 14-bit, and 16-bit, high dynamic range TxDAC® devices, respectively, that provide a sample rate of 800 MSPS, permitting multicarrier generation up to the Nyquist frequency. | [[adi>AD9785]] \\ [[adi>AD9787]] \\ [[adi>AD9788]] | |
| ==== AD-ADC-FMC Adapter Board ==== | ==== AD-ADC-FMC Adapter Board ==== |
| {{ :resources:alliances:both.jpg?200|}} \\ | {{ :resources:alliances:both.jpg?200|}} \\ |
| |< 100% 15% 75% 10% >| | |< 100% 15% 75% 10% >| |
| ^ Part Number ^ Description ^ ADI Parts ^ | ^ Part Number ^ Description ^ ADI Parts ^ |
| |[[adi>en/analog-to-digital-converters/ad-converters/ad9279/products/EVAL-AD9279/eb.html|AD9279-80KITZ]] | **Reference Design:** [[resources/fpga/xilinx/interposer/ad9279|Analog Devices]]\\ \\ 8 channel LNA, VGA, AAF, I/Q Demodulator with 12Bit, 80MSPS Analog-to-Digital Converter | [[adi>AD9279]] | | |[[adi>en/analog-to-digital-converters/ad-converters/ad9279/products/EVAL-AD9279/eb.html|AD9279-80KITZ]] | **Reference Design:** [[resources/fpga/xilinx/interposer/ad9279|Analog Devices]]\\ \\ 8 channel LNA, VGA, AAF, I/Q Demodulator with 12Bit, 80MSPS Analog-to-Digital Converter | [[adi>AD9279]] | |
| |[[adi>en/analog-to-digital-converters/ad-converters/ad9467/products/EVAL-AD9467/eb.html|AD9467-250EBZ]] | **Reference Design:** [[resources/fpga/xilinx/interposer/ad9467|Analog Devices]]\\ \\ 16-bit, 250MSPS monolithic, IF sampling analog-to-digital converter (ADC) | [[adi>AD9467]] | | |[[adi>en/analog-to-digital-converters/ad-converters/ad9467/products/EVAL-AD9467/eb.html|AD9467-250EBZ]] | **Reference Design:** [[resources/fpga/xilinx/interposer/ad9467|Analog Devices]]\\ \\ 16-bit, 250MSPS monolithic, IF sampling analog-to-digital converter (ADC) | [[adi>AD9467]] | |
| |
| Evaluation boards which can be used with the Rev B, AD-ADC-FMC Adapter Board (Part Number: CVT-ADC-FMC-INTPZB): | Evaluation boards which can be used with the Rev B, AD-ADC-FMC Adapter Board (Part Number: CVT-ADC-FMC-INTPZB): |
| |< 100% 15% 75% 10% >| | |< 100% 15% 75% 10% >| |
| ^ Part Number ^ Description ^ ADI Parts ^ | ^ Part Number ^ Description ^ ADI Parts ^ |
| |[[adi>en/analog-to-digital-converters/ad-converters/ad9250/products/EVAL-AD9250/eb.html|AD9250-250EBZ]] | **Reference Design:** [[resources/fpga/xilinx/interposer/ad9250|Analog Devices]]\\ \\ 14-Bit, 250 MSPS, Analog-to-Digital Converter | [[adi>AD9250]] | | |[[adi>en/analog-to-digital-converters/ad-converters/ad9250/products/EVAL-AD9250/eb.html|AD9250-250EBZ]] | **Reference Design:** [[resources/fpga/xilinx/interposer/ad9250|Analog Devices]]\\ \\ 14-Bit, 250 MSPS, Analog-to-Digital Converter | [[adi>AD9250]] | |
| |[[adi>en/analog-to-digital-converters/ad-converters/ad9250/products/EVAL-AD9250/eb.html|AD9250-170EBZ]] | **Reference Design:** [[resources/fpga/xilinx/interposer/ad9250|Analog Devices]]\\ \\ 14 Bit, 170 MSPS, Analog-to-Digital converter | [[adi>AD9250]] | | |[[adi>en/analog-to-digital-converters/ad-converters/ad9250/products/EVAL-AD9250/eb.html|AD9250-170EBZ]] | **Reference Design:** [[resources/fpga/xilinx/interposer/ad9250|Analog Devices]]\\ \\ 14 Bit, 170 MSPS, Analog-to-Digital converter | [[adi>AD9250]] | |
| |[[adi>en/analog-to-digital-converters/ad-converters/ad6673/products/EVAL-AD6673/eb.html|AD6673-250EBZ]] | **Reference Design:** [[resources/fpga/xilinx/interposer/ad6673|Analog Devices]]\\ \\ 11 Bit, 250 MSPS, Dual channel IF Receiver | [[adi>AD6673]] | | |[[adi>en/analog-to-digital-converters/ad-converters/ad6673/products/EVAL-AD6673/eb.html|AD6673-250EBZ]] | **Reference Design:** [[resources/fpga/xilinx/interposer/ad6673|Analog Devices]]\\ \\ 11 Bit, 250 MSPS, Dual channel IF Receiver | [[adi>AD6673]] | |
| |[[adi>en/analog-to-digital-converters/ad-converters/ad9649/products/EVAL-AD9649/eb.html|AD9649-EBZ]] | **Reference Design:** [[resources/fpga/xilinx/interposer/ad9649|Analog Devices]]\\ \\ 14 Bit, 80 MSPS, Single channel ADC | [[adi>AD9649]] | | |[[adi>en/analog-to-digital-converters/ad-converters/ad9649/products/EVAL-AD9649/eb.html|AD9649-EBZ]] | **Reference Design:** [[resources/fpga/xilinx/interposer/ad9649|Analog Devices]]\\ \\ 14 Bit, 80 MSPS, Single channel ADC | [[adi>AD9649]] | |
| |[[adi>en/analog-to-digital-converters/ad-converters/ad9671/products/product.html#product-evaluationkits|AD9671-EBZ]] | **Reference Design:** [[resources/fpga/xilinx/interposer/ad9671|Analog Devices]]\\ \\ 14 Bit, 40 MSPS, Eight channel Ultrasound AFE with digital demodulator | [[adi>AD9671]] | | |[[adi>en/analog-to-digital-converters/ad-converters/ad9671/products/product.html#product-evaluationkits|AD9671-EBZ]] | **Reference Design:** [[resources/fpga/xilinx/interposer/ad9671|Analog Devices]]\\ \\ 14 Bit, 40 MSPS, Eight channel Ultrasound AFE with digital demodulator | [[adi>AD9671]] | |
| |[[adi>en/analog-to-digital-converters/ad-converters/ad9683/products/EVAL-AD9683/eb.html|AD9683-250EBZ]] | **Reference Design:** [[resources/fpga/xilinx/interposer/ad9683|Analog Devices]]\\ \\ 14-Bit, 250 MSPS, Analog-to-Digital Converter | [[adi>AD9683]] | | |[[adi>en/analog-to-digital-converters/ad-converters/ad9683/products/EVAL-AD9683/eb.html|AD9683-250EBZ]] | **Reference Design:** [[resources/fpga/xilinx/interposer/ad9683|Analog Devices]]\\ \\ 14-Bit, 250 MSPS, Analog-to-Digital Converter | [[adi>AD9683]] | |
| |
| ==== FMC-SDP Interposer ==== | ==== FMC-SDP Interposer ==== |
| ^ Part Number ^ Description ^ ADI Parts ^ | ^ Part Number ^ Description ^ ADI Parts ^ |
| ^ ^ Analog to Digital Converters ^ ^ | ^ ^ Analog to Digital Converters ^ ^ |
| | [[adi>EVAL-AD7091SDZ]] | {{/resources/fpga/xilinx/interposer/ad7091_kc705.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7091|Analog Devices]]\\ \\ The AD7091 is a 12-bit successive approximation register analog-to-digital converter (SAR ADC) that offers ultralow power consumption (typically 367 μA at 3 V and 1 MSPS) while achieving fast throughput rates (1 MSPS with a 50 MHz SCLK). The AD7091 operates from a single 2.09 V to 5.25 V power supply. The AD7091 also features an on-chip conversion clock and a high speed serial interface. | [[adi>AD7091]] | | | [[adi>EVAL-AD7091SDZ]] | {{/resources/fpga/xilinx/interposer/ad7091_kc705.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7091|Analog Devices]]\\ \\ The AD7091 is a 12-bit successive approximation register analog-to-digital converter (SAR ADC) that offers ultralow power consumption (typically 367 μA at 3 V and 1 MSPS) while achieving fast throughput rates (1 MSPS with a 50 MHz SCLK). The AD7091 operates from a single 2.09 V to 5.25 V power supply. The AD7091 also features an on-chip conversion clock and a high speed serial interface. | [[adi>AD7091]] | |
| | [[adi>EVAL-AD7091RSDZ]] | {{/resources/fpga/xilinx/interposer/ad7091r_kc705.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7091R|Analog Devices]]\\ \\ The [[adi>AD7091R]] is a 12-bit successive approximation analog-to-digital converter (ADC) that offers ultralow power consumption (typically 349 µA at 3 V and 1 MSPS) while achieving fast throughput rates (1 MSPS with a 50 MHz SCLK). Operating from a single 2.7 V to 5.25 V power supply, the part contains a wide bandwidth track-and-hold amplifier that can handle input frequencies in excess of 7 MHz. The AD7091R also features an on-chip conversion clock, accurate reference, and high speed serial interface. | [[adi>AD7091R]] | | | [[adi>EVAL-AD7091RSDZ]] | {{/resources/fpga/xilinx/interposer/ad7091r_kc705.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7091R|Analog Devices]]\\ \\ The [[adi>AD7091R]] is a 12-bit successive approximation analog-to-digital converter (ADC) that offers ultralow power consumption (typically 349 µA at 3 V and 1 MSPS) while achieving fast throughput rates (1 MSPS with a 50 MHz SCLK). Operating from a single 2.7 V to 5.25 V power supply, the part contains a wide bandwidth track-and-hold amplifier that can handle input frequencies in excess of 7 MHz. The AD7091R also features an on-chip conversion clock, accurate reference, and high speed serial interface. | [[adi>AD7091R]] | |
| | [[adi>EVAL-AD7176-2SDZ]] | {{/resources/fpga/xilinx/interposer/ad7176_2.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7176_2|Analog Devices]]\\ \\ The [[adi>AD7176-2]] is a fast settling, highly accurate, high resolution, multiplexed S-? analog-to-digital converter (ADC) for low band-width input signals. Its inputs can be configured as two fully differential or four pseudo differential inputs via the integrated crosspoint multiplexer. An integrated precision, 2.5 V, low drift (2 ppm/°C), band gap internal reference (with an output reference buffer) adds functionality and reduces the external component count. The maximum channel scan data rate is 50 kSPS (with a settling time of 20 µs), resulting in fully settled data of 17 noise free bits. User-selectable output data rates range from 5 SPS to 250 kSPS. The resolution increases at lower speeds. The AD7176-2 offers three key digital filters. The fast settling filter maximizes the channel scan rate. The Sinc3 filter maximizes the resolution for single-channel, low speed applications. For 50 Hz and 60 Hz environments, the AD7176-2 specific filter minimizes the settling times or maximizes the rejection of the line frequency. These enhanced filters enable simultaneous 50 Hz and 60 Hz rejec-tion with a 27 SPS output data rate (with a settling time of 36 ms). | [[adi>AD7176-2]] | | | [[adi>EVAL-AD7175-2SDZ]] | {{/resources/fpga/xilinx/interposer/ad7176_2.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7176_2|Analog Devices]]\\ \\ The [[adi>AD7175-2]] is a low noise, fast settling, multiplexed, 2-/4- channel (fully/pseudo differential) Σ-Δ analog-to-digital converter (ADC) for low bandwidth inputs. It has a maximum channel scan rate of 50 kSPS (20 μs) for fully settled data. The output data rates range from 5 SPS to 250 kSPS. The AD7175-2 integrates key analog and digital signal condition-ing blocks to allow users to configure an individual setup for each analog input channel in use. Each feature can be user selected on a per channel basis. Integrated true rail-to-rail buffers on the analog inputs and external reference inputs provide easy to drive high impedance inputs. The precision 2.5 V low drift (2 ppm/°C) band gap internal reference (with output reference buffer) adds embedded functionality to reduce external component count. The digital filter allows simultaneous 50 Hz/60 Hz rejection at 27.27 SPS output data rate. The user can switch between different filter options according to the demands of each channel in the application. The ADC automatically switches through each selected channel. Further digital processing functions include offset and gain calibration registers, configurable on a per channel basis. | [[adi>AD7175-2]] | |
| | [[adi>EVAL-AD7291SDZ]] | {{/resources/fpga/xilinx/interposer/ad7291.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7291|Analog Devices]]\\ \\ The AD7291 is a 12-bit, low power, 8-channel, successive approximation analog-to-digital converter (ADC) with an internal temperature sensor. | [[adi>AD7291]] | | | [[adi>EVAL-AD7176-2SDZ]] | {{/resources/fpga/xilinx/interposer/ad7176_2.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7176_2|Analog Devices]]\\ \\ The [[adi>AD7176-2]] is a fast settling, highly accurate, high resolution, multiplexed S-? analog-to-digital converter (ADC) for low band-width input signals. Its inputs can be configured as two fully differential or four pseudo differential inputs via the integrated crosspoint multiplexer. An integrated precision, 2.5 V, low drift (2 ppm/°C), band gap internal reference (with an output reference buffer) adds functionality and reduces the external component count. The maximum channel scan data rate is 50 kSPS (with a settling time of 20 µs), resulting in fully settled data of 17 noise free bits. User-selectable output data rates range from 5 SPS to 250 kSPS. The resolution increases at lower speeds. The AD7176-2 offers three key digital filters. The fast settling filter maximizes the channel scan rate. The Sinc3 filter maximizes the resolution for single-channel, low speed applications. For 50 Hz and 60 Hz environments, the AD7176-2 specific filter minimizes the settling times or maximizes the rejection of the line frequency. These enhanced filters enable simultaneous 50 Hz and 60 Hz rejec-tion with a 27 SPS output data rate (with a settling time of 36 ms). | [[adi>AD7176-2]] | |
| | [[adi>EVAL-AD7298SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad7298.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7298|Analog Devices]]\\ \\ The AD7298 is a 12-bit, high speed, low power, 8-channel, successive approximation ADC with an internal temperature sensor. The part operates from a single 3.3 V power supply and features throughput rates up to 1 MSPS. The device contains a low noise, wide bandwidth track-and-hold amplifier that can handle input frequencies in excess of 30 MHz. | [[adi>AD7298]] | | | [[adi>EVAL-AD7291SDZ]] | {{/resources/fpga/xilinx/interposer/ad7291.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7291|Analog Devices]]\\ \\ The AD7291 is a 12-bit, low power, 8-channel, successive approximation analog-to-digital converter (ADC) with an internal temperature sensor. | [[adi>AD7291]] | |
| | [[adi>EVAL-AD7327SDZ]] | {{/resources/fpga/xilinx/interposer/ad7328.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7327|Analog Devices]]\\ \\ The AD7327 is an 8-channel, 12-bit plus sign successive approximation ADC designed on the iCMOS (industrial CMOS) process. iCMOS is a process combining high voltage silicon with submicron CMOS and complementary bipolar technologies. It enables the development of a wide range of high performance analog ICs capable of 33 V operation in a footprint that no previous generation of high voltage parts could achieve. Unlike analog ICs using conventional CMOS processes, iCMOS components can accept bipolar input signals while providing increased performance, dramatically reduced power consumption, and reduced package size. The AD7327 can accept true bipolar analog input signals. The AD7327 has four software-selectable input ranges: ±10 V, ±5 V, ±2.5 V, and 0 V to +10 V. Each analog input channel can be independently programmed to one of the four input ranges. The analog input channels on the AD7327 can be programmed to be single-ended, true differential, or pseudo differential. | [[adi>AD7327]] | | | [[adi>EVAL-AD7298SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad7298.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7298|Analog Devices]]\\ \\ The AD7298 is a 12-bit, high speed, low power, 8-channel, successive approximation ADC with an internal temperature sensor. The part operates from a single 3.3 V power supply and features throughput rates up to 1 MSPS. The device contains a low noise, wide bandwidth track-and-hold amplifier that can handle input frequencies in excess of 30 MHz. | [[adi>AD7298]] | |
| | [[adi>EVAL-AD7328SDZ]] | {{/resources/fpga/xilinx/interposer/ad7328.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7328|Analog Devices]]\\ \\ The AD7328 is an 8-channel, 12-bit plus sign successive approximation ADC designed on the iCMOS™ (industrial CMOS) process. iCMOS is a process combining high voltage silicon with submicron CMOS and complementary bipolar technologies. It enables the development of a wide range of high performance analog ICs capable of 33 V operation in a footprint that no previous generation of high voltage parts could achieve. Unlike analog ICs using conventional CMOS processes, iCMOS components can accept bipolar input signals while providing increased performance, dramatically reduced power consumption, and reduced package size. The AD7328 can accept true bipolar analog input signals. | [[adi>AD7328]] | | | [[adi>EVAL-AD7327SDZ]] | {{/resources/fpga/xilinx/interposer/ad7328.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7327|Analog Devices]]\\ \\ The AD7327 is an 8-channel, 12-bit plus sign successive approximation ADC designed on the iCMOS (industrial CMOS) process. iCMOS is a process combining high voltage silicon with submicron CMOS and complementary bipolar technologies. It enables the development of a wide range of high performance analog ICs capable of 33 V operation in a footprint that no previous generation of high voltage parts could achieve. Unlike analog ICs using conventional CMOS processes, iCMOS components can accept bipolar input signals while providing increased performance, dramatically reduced power consumption, and reduced package size. The AD7327 can accept true bipolar analog input signals. The AD7327 has four software-selectable input ranges: ±10 V, ±5 V, ±2.5 V, and 0 V to +10 V. Each analog input channel can be independently programmed to one of the four input ranges. The analog input channels on the AD7327 can be programmed to be single-ended, true differential, or pseudo differential. | [[adi>AD7327]] | |
| | [[adi>EVAL-AD7366SDZ]] | {{/resources/fpga/xilinx/interposer/ad7366.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7366|Analog Devices]]\\ \\ The AD7366 is a dual 12-bit, high speed, low power, successive approximation analog-to-digital converter that feature throughput rates up to 1 MSPS. The device contains two ADCs, each preceded by a 2-channel multiplexer, and a low noise, wide bandwidth track-and-hold amplifier. The AD7366 is fabricated on the Analog Devices, Inc., industrial CMOS process (iCMOS), which is a technology platform combining the advantages of low and high voltage CMOS. The iCMOS process allows the AD7366 to accept high voltage bipolar signals in addition to reducing power consumption and package size. The AD7366 can accept true bipolar analog input signals in the ±10 V range, ±5 V range, and 0 V to 10 V range. | [[adi>AD7366]] | | | [[adi>EVAL-AD7328SDZ]] | {{/resources/fpga/xilinx/interposer/ad7328.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7328|Analog Devices]]\\ \\ The AD7328 is an 8-channel, 12-bit plus sign successive approximation ADC designed on the iCMOS™ (industrial CMOS) process. iCMOS is a process combining high voltage silicon with submicron CMOS and complementary bipolar technologies. It enables the development of a wide range of high performance analog ICs capable of 33 V operation in a footprint that no previous generation of high voltage parts could achieve. Unlike analog ICs using conventional CMOS processes, iCMOS components can accept bipolar input signals while providing increased performance, dramatically reduced power consumption, and reduced package size. The AD7328 can accept true bipolar analog input signals. | [[adi>AD7328]] | |
| | [[adi>EVAL-AD7367SDZ]] | {{/resources/fpga/xilinx/interposer/ad7367.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7367|Analog Devices]]\\ \\ The AD7367 is a dual 14-bit, high speed, low power, successive approximation analog-to-digital converter that feature throughput rates up to 1 MSPS. The device contains two ADCs, each preceded by a 2-channel multiplexer, and a low noise, wide bandwidth track-and-hold amplifier. The AD7367 is fabricated on the Analog Devices, Inc., industrial CMOS process (iCMOS), which is a technology platform combining the advantages of low and high voltage CMOS. The iCMOS process allows the AD7367 to accept high voltage bipolar signals in addition to reducing power consumption and package size. The AD7367 can accept true bipolar analog input signals in the ±10 V range, ±5 V range, and 0 V to 10 V range. | [[adi>AD7367]] | | | [[adi>EVAL-AD7366SDZ]] | {{/resources/fpga/xilinx/interposer/ad7366.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7366|Analog Devices]]\\ \\ The AD7366 is a dual 12-bit, high speed, low power, successive approximation analog-to-digital converter that feature throughput rates up to 1 MSPS. The device contains two ADCs, each preceded by a 2-channel multiplexer, and a low noise, wide bandwidth track-and-hold amplifier. The AD7366 is fabricated on the Analog Devices, Inc., industrial CMOS process (iCMOS), which is a technology platform combining the advantages of low and high voltage CMOS. The iCMOS process allows the AD7366 to accept high voltage bipolar signals in addition to reducing power consumption and package size. The AD7366 can accept true bipolar analog input signals in the ±10 V range, ±5 V range, and 0 V to 10 V range. | [[adi>AD7366]] | |
| | [[adi>EVAL-AD7450ASDZ]] | {{/resources/fpga/xilinx/interposer/ad7450a.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7450a|Analog Devices]]\\ \\ The AD7450A is 12-bit, high speed, low power, successive-approximation (SAR) analog-to-digital converter that feature a fully differential analog input. This part operates from a single 3 V or 5 V power supply and features throughput rates up to 1 MSPS. | [[adi>AD7450A]] | | | [[adi>EVAL-AD7367SDZ]] | {{/resources/fpga/xilinx/interposer/ad7367.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7367|Analog Devices]]\\ \\ The AD7367 is a dual 14-bit, high speed, low power, successive approximation analog-to-digital converter that feature throughput rates up to 1 MSPS. The device contains two ADCs, each preceded by a 2-channel multiplexer, and a low noise, wide bandwidth track-and-hold amplifier. The AD7367 is fabricated on the Analog Devices, Inc., industrial CMOS process (iCMOS), which is a technology platform combining the advantages of low and high voltage CMOS. The iCMOS process allows the AD7367 to accept high voltage bipolar signals in addition to reducing power consumption and package size. The AD7367 can accept true bipolar analog input signals in the ±10 V range, ±5 V range, and 0 V to 10 V range. | [[adi>AD7367]] | |
| | [[adi>EVAL-AD7490SDZ]] | {{/resources/fpga/xilinx/interposer/ad7490.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7490|Analog Devices]]\\ \\ The AD7490 is a 12-bit high speed, low power, successive- approximation ADC. The part operates from a single 2.7 V to 5.25 V power supply and features throughput rates up to 1 MSPS. The part contains a low-noise, wide bandwidth track/hold amplifier that can handle input frequencies in excess of 1 MHz. | [[adi>AD7490]] | | | [[adi>EVAL-AD7450ASDZ]] | {{/resources/fpga/xilinx/interposer/ad7450a.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7450a|Analog Devices]]\\ \\ The AD7450A is 12-bit, high speed, low power, successive-approximation (SAR) analog-to-digital converter that feature a fully differential analog input. This part operates from a single 3 V or 5 V power supply and features throughput rates up to 1 MSPS. | [[adi>AD7450A]] | |
| | [[adi>EVAL-AD7656-1SDZ]] | {{/resources/fpga/xilinx/interposer/ad7656-1.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7656_1|Analog Devices]]\\ \\ The AD7656 is a reduced decoupling pin- and software-compatible versions of AD7656/AD7657/AD7658. The AD7656-1/AD7657-1/AD7658-1 devices contain six 16-/ 14-/12-bit, fast, low power successive approximation ADCs in a package designed on the iCMOS® process (industrial CMOS). iCMOS is a process combining high voltage silicon with submicron CMOS and complementary bipolar technologies. It enables the development of a wide range of high performance analog ICs capable of 33 V operation in a footprint that no previous generation of high voltage parts could achieve. Unlike analog ICs using conven-tional CMOS processes, iCMOS components can accept bipolar input signals while providing increased performance, which dramatically reduces power consumption and package size. The AD7656-1/AD7657-1/AD7658-1 feature throughput rates of up to 250 kSPS. | [[adi>AD7656-1]] | | | [[adi>EVAL-AD7490SDZ]] | {{/resources/fpga/xilinx/interposer/ad7490.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7490|Analog Devices]]\\ \\ The AD7490 is a 12-bit high speed, low power, successive- approximation ADC. The part operates from a single 2.7 V to 5.25 V power supply and features throughput rates up to 1 MSPS. The part contains a low-noise, wide bandwidth track/hold amplifier that can handle input frequencies in excess of 1 MHz. | [[adi>AD7490]] | |
| | [[adi>EVAL-AD7657-1SDZ]] | {{/resources/fpga/xilinx/interposer/ad7656-1.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7657_1|Analog Devices]]\\ \\ The AD7657 is a reduced decoupling pin- and software-compatible versions of AD7656/AD7657/AD7658. The AD7656-1/AD7657-1/AD7658-1 devices contain six 16-/ 14-/12-bit, fast, low power successive approximation ADCs in a package designed on the iCMOS® process (industrial CMOS). iCMOS is a process combining high voltage silicon with submicron CMOS and complementary bipolar technologies. It enables the development of a wide range of high performance analog ICs capable of 33 V operation in a footprint that no previous generation of high voltage parts could achieve. Unlike analog ICs using conven-tional CMOS processes, iCMOS components can accept bipolar input signals while providing increased performance, which dramatically reduces power consumption and package size. The AD7656-1/AD7657-1/AD7658-1 feature throughput rates of up to 250 kSPS. | [[adi>AD7657-1]] | | | [[adi>EVAL-AD7656-1SDZ]] | {{/resources/fpga/xilinx/interposer/ad7656-1.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7656_1|Analog Devices]]\\ \\ The AD7656 is a reduced decoupling pin- and software-compatible versions of AD7656/AD7657/AD7658. The AD7656-1/AD7657-1/AD7658-1 devices contain six 16-/ 14-/12-bit, fast, low power successive approximation ADCs in a package designed on the iCMOS® process (industrial CMOS). iCMOS is a process combining high voltage silicon with submicron CMOS and complementary bipolar technologies. It enables the development of a wide range of high performance analog ICs capable of 33 V operation in a footprint that no previous generation of high voltage parts could achieve. Unlike analog ICs using conven-tional CMOS processes, iCMOS components can accept bipolar input signals while providing increased performance, which dramatically reduces power consumption and package size. The AD7656-1/AD7657-1/AD7658-1 feature throughput rates of up to 250 kSPS. | [[adi>AD7656-1]] | |
| | [[adi>EVAL-AD7658-1SDZ]] | {{/resources/fpga/xilinx/interposer/ad7656-1.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7658_1|Analog Devices]]\\ \\ The AD7658 is a reduced decoupling pin- and software-compatible versions of AD7656/AD7657/AD7658. The AD7656-1/AD7657-1/AD7658-1 devices contain six 16-/ 14-/12-bit, fast, low power successive approximation ADCs in a package designed on the iCMOS® process (industrial CMOS). iCMOS is a process combining high voltage silicon with submicron CMOS and complementary bipolar technologies. It enables the development of a wide range of high performance analog ICs capable of 33 V operation in a footprint that no previous generation of high voltage parts could achieve. Unlike analog ICs using conven-tional CMOS processes, iCMOS components can accept bipolar input signals while providing increased performance, which dramatically reduces power consumption and package size. The AD7656-1/AD7657-1/AD7658-1 feature throughput rates of up to 250 kSPS. | [[adi>AD7658-1]] | | | [[adi>EVAL-AD7657-1SDZ]] | {{/resources/fpga/xilinx/interposer/ad7656-1.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7657_1|Analog Devices]]\\ \\ The AD7657 is a reduced decoupling pin- and software-compatible versions of AD7656/AD7657/AD7658. The AD7656-1/AD7657-1/AD7658-1 devices contain six 16-/ 14-/12-bit, fast, low power successive approximation ADCs in a package designed on the iCMOS® process (industrial CMOS). iCMOS is a process combining high voltage silicon with submicron CMOS and complementary bipolar technologies. It enables the development of a wide range of high performance analog ICs capable of 33 V operation in a footprint that no previous generation of high voltage parts could achieve. Unlike analog ICs using conven-tional CMOS processes, iCMOS components can accept bipolar input signals while providing increased performance, which dramatically reduces power consumption and package size. The AD7656-1/AD7657-1/AD7658-1 feature throughput rates of up to 250 kSPS. | [[adi>AD7657-1]] | |
| | [[adi>EVAL-AD7492SDZ]] | {{/resources/fpga/xilinx/interposer/ad7492.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7492|Analog Devices]] \\ The AD7492, AD7492-4, AD7492-5 are 12-bit high speed, low power, successive approximation ADCs. The parts operate from a single 2.7 V to 5.25 V power supply and feature throughput rates up to 1.25 MSPS. They contain a low noise, wide bandwidth track/hold amplifier that can handle bandwidths up to 10 MHz. | [[adi>AD7492]] | | | [[adi>EVAL-AD7658-1SDZ]] | {{/resources/fpga/xilinx/interposer/ad7656-1.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7658_1|Analog Devices]]\\ \\ The AD7658 is a reduced decoupling pin- and software-compatible versions of AD7656/AD7657/AD7658. The AD7656-1/AD7657-1/AD7658-1 devices contain six 16-/ 14-/12-bit, fast, low power successive approximation ADCs in a package designed on the iCMOS® process (industrial CMOS). iCMOS is a process combining high voltage silicon with submicron CMOS and complementary bipolar technologies. It enables the development of a wide range of high performance analog ICs capable of 33 V operation in a footprint that no previous generation of high voltage parts could achieve. Unlike analog ICs using conven-tional CMOS processes, iCMOS components can accept bipolar input signals while providing increased performance, which dramatically reduces power consumption and package size. The AD7656-1/AD7657-1/AD7658-1 feature throughput rates of up to 250 kSPS. | [[adi>AD7658-1]] | |
| | [[adi>EVAL-AD7683SDZ]] | {{/resources/fpga/xilinx/interposer/ad7980.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7683|Analog Devices]]\\ \\ The AD7683 is a 16-bit, charge redistribution, successive approximation, PulSAR® analog-to-digital converter (ADC) that operates from a single power supply, VDD, between 2.7 V and 5.5 V. It contains a low power, high speed, 16-bit sampling ADC with no missing codes (B grade), an internal conversion clock, and a serial, SPI-compatible interface port. The part also contains a low noise, wide bandwidth, short aperture delay, track-and-hold circuit. On the CS falling edge, it samples an analog input, +IN, between 0 V to REF with respect to a ground sense, –IN. The reference voltage, REF, is applied externally and can be set up to the supply voltage. Its power scales linearly with throughput. | [[adi>AD7683]] | | | [[adi>EVAL-AD7492SDZ]] | {{/resources/fpga/xilinx/interposer/ad7492.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7492|Analog Devices]] \\ The AD7492, AD7492-4, AD7492-5 are 12-bit high speed, low power, successive approximation ADCs. The parts operate from a single 2.7 V to 5.25 V power supply and feature throughput rates up to 1.25 MSPS. They contain a low noise, wide bandwidth track/hold amplifier that can handle bandwidths up to 10 MHz. | [[adi>AD7492]] | |
| | [[adi>EVAL-AD7685SDZ]] | {{/resources/fpga/xilinx/interposer/ad7980.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7685|Analog Devices]]\\ \\ The AD7685 is a 16-bit, charge redistribution successive approximation, analog-to-digital converter (ADC) that operates from a single power supply, VDD, between 2.3 V to 5.5 V. It contains a low power, high speed, 16-bit sampling ADC with no missing codes, an internal conversion clock, and a versatile serial interface port. The part also contains a low noise, wide bandwidth, short aperture delay, track-and-hold circuit. On the CNV rising edge, it samples an analog input IN+ between 0 V to REF with respect to a ground sense IN-. The reference voltage, REF, is applied externally and can be set up to the supply voltage. Power dissipation scales linearly with throughput. | [[adi>AD7685]] | | | [[adi>EVAL-AD7683SDZ]] | {{/resources/fpga/xilinx/interposer/ad7980.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7683|Analog Devices]]\\ \\ The AD7683 is a 16-bit, charge redistribution, successive approximation, PulSAR® analog-to-digital converter (ADC) that operates from a single power supply, VDD, between 2.7 V and 5.5 V. It contains a low power, high speed, 16-bit sampling ADC with no missing codes (B grade), an internal conversion clock, and a serial, SPI-compatible interface port. The part also contains a low noise, wide bandwidth, short aperture delay, track-and-hold circuit. On the CS falling edge, it samples an analog input, +IN, between 0 V to REF with respect to a ground sense, –IN. The reference voltage, REF, is applied externally and can be set up to the supply voltage. Its power scales linearly with throughput. | [[adi>AD7683]] | |
| | [[adi>EVAL-AD7686SDZ]] | {{/resources/fpga/xilinx/interposer/ad7980.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7686|Analog Devices]]\\ \\ The D7686 is a 16-bit, charge redistribution, successive approximation, analog-to-digital converter (ADC) that operates from a single 5 V power supply, VDD. It contains a low power, high speed, 16-bit sampling ADC with no missing codes, an internal conversion clock, and a versatile serial interface port. The part also contains a low noise, wide bandwidth, short aperture delay track-and-hold circuit. On the CNV rising edge, the AD7686 samples an analog input IN+ between 0 V to REF with respect to a ground sense IN-. The reference voltage, REF, is applied externally and can be set up to the supply voltage. Power dissipation scales linearly with throughput. | [[adi>AD7686]] | | | [[adi>EVAL-AD7685SDZ]] | {{/resources/fpga/xilinx/interposer/ad7980.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7685|Analog Devices]]\\ \\ The AD7685 is a 16-bit, charge redistribution successive approximation, analog-to-digital converter (ADC) that operates from a single power supply, VDD, between 2.3 V to 5.5 V. It contains a low power, high speed, 16-bit sampling ADC with no missing codes, an internal conversion clock, and a versatile serial interface port. The part also contains a low noise, wide bandwidth, short aperture delay, track-and-hold circuit. On the CNV rising edge, it samples an analog input IN+ between 0 V to REF with respect to a ground sense IN-. The reference voltage, REF, is applied externally and can be set up to the supply voltage. Power dissipation scales linearly with throughput. | [[adi>AD7685]] | |
| | [[adi>EVAL-AD7687SDZ]] | {{/resources/fpga/xilinx/interposer/ad7980.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7687|Analog Devices]]\\ \\ The AD7687 is a 16-bit, charge redistribution, successive approximation, analog-to-digital converter (ADC) that operates from a single power supply, VDD, between 2.3 V to 5.5 V. It contains a low power, high speed, 16-bit sampling ADC with no missing codes, an internal conversion clock, and a versatile serial interface port. The part also contains a low noise, wide bandwidth, short aperture delay track-and-hold circuit. On the CNV rising edge, it samples the voltage difference between IN+ and IN- pins. The voltages on these pins usually swing in opposite phase between 0 V to REF. The reference voltage, REF, is applied externally and can be set up to the supply voltage. Its power scales linearly with throughput. | [[adi>AD7687]] | | | [[adi>EVAL-AD7686SDZ]] | {{/resources/fpga/xilinx/interposer/ad7980.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7686|Analog Devices]]\\ \\ The D7686 is a 16-bit, charge redistribution, successive approximation, analog-to-digital converter (ADC) that operates from a single 5 V power supply, VDD. It contains a low power, high speed, 16-bit sampling ADC with no missing codes, an internal conversion clock, and a versatile serial interface port. The part also contains a low noise, wide bandwidth, short aperture delay track-and-hold circuit. On the CNV rising edge, the AD7686 samples an analog input IN+ between 0 V to REF with respect to a ground sense IN-. The reference voltage, REF, is applied externally and can be set up to the supply voltage. Power dissipation scales linearly with throughput. | [[adi>AD7686]] | |
| | [[adi>EVAL-AD7688SDZ]] | {{/resources/fpga/xilinx/interposer/ad7980.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7688|Analog Devices]]\\ \\ The AD688 is a 16-bit, charge redistribution, successive approximation, analog-to-digital converter (ADC) that operates from a single 5 V power supply, VDD. It contains a low power, high speed, 16-bit sampling ADC with no missing codes, an internal conversion clock, and a versatile serial interface port. The part also contains a low noise, wide bandwidth, short aperture delay track-and-hold circuit. On the CNV rising edge, it samples the voltage difference between IN+ and IN- pins. The voltages on these pins usually swing in opposite phase between 0 V and REF. The reference voltage, REF, is applied externally and can be set up to the supply voltage. Its power scales linearly with throughput. | [[adi>AD7688]] | | | [[adi>EVAL-AD7687SDZ]] | {{/resources/fpga/xilinx/interposer/ad7980.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7687|Analog Devices]]\\ \\ The AD7687 is a 16-bit, charge redistribution, successive approximation, analog-to-digital converter (ADC) that operates from a single power supply, VDD, between 2.3 V to 5.5 V. It contains a low power, high speed, 16-bit sampling ADC with no missing codes, an internal conversion clock, and a versatile serial interface port. The part also contains a low noise, wide bandwidth, short aperture delay track-and-hold circuit. On the CNV rising edge, it samples the voltage difference between IN+ and IN- pins. The voltages on these pins usually swing in opposite phase between 0 V to REF. The reference voltage, REF, is applied externally and can be set up to the supply voltage. Its power scales linearly with throughput. | [[adi>AD7687]] | |
| | [[adi>EVAL-AD7690SDZ]] | {{/resources/fpga/xilinx/interposer/ad7980.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7690|Analog Devices]]\\ \\ The AD7690 is an 18-bit, successive approximation, analog-to-digital converter (ADC) that operates from a single power supply, VDD. It contains a low power, high speed, 18-bit sampling ADC with no missing codes, an internal conversion clock, and a versatile serial interface port. On the CNV rising edge, it samples the voltage difference between the IN+ and IN- pins. The voltages on these pins swing in opposite phase between 0 V and REF. The reference voltage, REF, is applied externally and can be set up to the supply voltage. The power of the AD7690 scales linearly with the throughput. | [[adi>AD7690]] | | | [[adi>EVAL-AD7688SDZ]] | {{/resources/fpga/xilinx/interposer/ad7980.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7688|Analog Devices]]\\ \\ The AD688 is a 16-bit, charge redistribution, successive approximation, analog-to-digital converter (ADC) that operates from a single 5 V power supply, VDD. It contains a low power, high speed, 16-bit sampling ADC with no missing codes, an internal conversion clock, and a versatile serial interface port. The part also contains a low noise, wide bandwidth, short aperture delay track-and-hold circuit. On the CNV rising edge, it samples the voltage difference between IN+ and IN- pins. The voltages on these pins usually swing in opposite phase between 0 V and REF. The reference voltage, REF, is applied externally and can be set up to the supply voltage. Its power scales linearly with throughput. | [[adi>AD7688]] | |
| | [[adi>EVAL-AD7691SDZ]] | {{/resources/fpga/xilinx/interposer/ad7980.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7691|Analog Devices]]\\ \\ The AD7691 is an 18-bit, charge redistribution, successive approximation, analog-to-digital converter (ADC) that operates from a single power supply, VDD, between 2.3 V and 5 V. It contains a low power, high speed, 18-bit sampling ADC with no missing codes, an internal conversion clock, and a versatile serial interface port. On the CNV rising edge, it samples the voltage difference between the IN+ and IN- pins. The voltages on these pins swing in opposite phases between 0 V and REF. The reference voltage, REF, is applied externally and can be set up to the supply voltage. The power of the AD7691 scales linearly with the throughput. | [[adi>AD7691]] | | | [[adi>EVAL-AD7690SDZ]] | {{/resources/fpga/xilinx/interposer/ad7980.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7690|Analog Devices]]\\ \\ The AD7690 is an 18-bit, successive approximation, analog-to-digital converter (ADC) that operates from a single power supply, VDD. It contains a low power, high speed, 18-bit sampling ADC with no missing codes, an internal conversion clock, and a versatile serial interface port. On the CNV rising edge, it samples the voltage difference between the IN+ and IN- pins. The voltages on these pins swing in opposite phase between 0 V and REF. The reference voltage, REF, is applied externally and can be set up to the supply voltage. The power of the AD7690 scales linearly with the throughput. | [[adi>AD7690]] | |
| | [[adi>EVAL-AD7693SDZ]] | {{/resources/fpga/xilinx/interposer/ad7980.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7693|Analog Devices]]\\ \\ The AD7693 is a 16-bit, successive approximation analog-to-digital converter (ADC) that operates from a single power supply, VDD. It contains a low power, high speed, 16-bit sampling ADC with no missing codes, an internal conversion clock, and a versatile serial interface port. The reference voltage, VREF, is applied externally and can be set up to the supply voltage, VDD. On the CNV rising edge, it samples the voltage difference between the IN+ and IN- pins. The voltages on these pins swing in opposite phase between 0 V and VREF about VREF/2. Its power scales linearly with throughput. | [[adi>AD7693]] | | | [[adi>EVAL-AD7691SDZ]] | {{/resources/fpga/xilinx/interposer/ad7980.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7691|Analog Devices]]\\ \\ The AD7691 is an 18-bit, charge redistribution, successive approximation, analog-to-digital converter (ADC) that operates from a single power supply, VDD, between 2.3 V and 5 V. It contains a low power, high speed, 18-bit sampling ADC with no missing codes, an internal conversion clock, and a versatile serial interface port. On the CNV rising edge, it samples the voltage difference between the IN+ and IN- pins. The voltages on these pins swing in opposite phases between 0 V and REF. The reference voltage, REF, is applied externally and can be set up to the supply voltage. The power of the AD7691 scales linearly with the throughput. | [[adi>AD7691]] | |
| | [[adi>EVAL-AD7942SDZ]] | {{/resources/fpga/xilinx/interposer/ad7980.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7942|Analog Devices]]\\ \\ The AD7942 is a 14-bit, charge redistribution, successive approxi-mation PulSAR® ADC that operates from a single power supply, VDD, between 2.3 V to 5.5 V. It contains a low power, high speed, 14-bit sampling ADC with no missing codes, an internal conversion clock, and a versatile serial interface port. The part also contains a low noise, wide bandwidth, short aperture delay track-and-hold circuit. On the CNV rising edge, it samples an analog input, IN+, between 0 V to VREF with respect to a ground sense, IN-. The reference voltage, VREF, is applied externally and is set up to be the supply voltage. Its power scales linearly with the throughput. | [[adi>AD7942]] | | | [[adi>EVAL-AD7693SDZ]] | {{/resources/fpga/xilinx/interposer/ad7980.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7693|Analog Devices]]\\ \\ The AD7693 is a 16-bit, successive approximation analog-to-digital converter (ADC) that operates from a single power supply, VDD. It contains a low power, high speed, 16-bit sampling ADC with no missing codes, an internal conversion clock, and a versatile serial interface port. The reference voltage, VREF, is applied externally and can be set up to the supply voltage, VDD. On the CNV rising edge, it samples the voltage difference between the IN+ and IN- pins. The voltages on these pins swing in opposite phase between 0 V and VREF about VREF/2. Its power scales linearly with throughput. | [[adi>AD7693]] | |
| | [[adi>EVAL-AD7946SDZ]] | {{/resources/fpga/xilinx/interposer/ad7980.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7946|Analog Devices]]\\ \\ The AD7946 is a 14-bit, charge redistribution, successive approximation, analog-to-digital converter (ADC) that operates from a single 5 V power supply, VDD. It contains a low power, high speed, 14-bit sampling ADC with no missing codes, an internal conversion clock, and a versatile serial interface port. The part also contains a low noise, wide bandwidth, short aperture delay track-and-hold circuit. On the CNV rising edge, it samples an analog input IN+ between 0 V to REF with respect to a ground sense IN-. The reference voltage, REF, is applied externally and can be set up to the supply voltage. Its power scales linearly with throughput. | [[adi>AD7946]] | | | [[adi>EVAL-AD7942SDZ]] | {{/resources/fpga/xilinx/interposer/ad7980.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7942|Analog Devices]]\\ \\ The AD7942 is a 14-bit, charge redistribution, successive approxi-mation PulSAR® ADC that operates from a single power supply, VDD, between 2.3 V to 5.5 V. It contains a low power, high speed, 14-bit sampling ADC with no missing codes, an internal conversion clock, and a versatile serial interface port. The part also contains a low noise, wide bandwidth, short aperture delay track-and-hold circuit. On the CNV rising edge, it samples an analog input, IN+, between 0 V to VREF with respect to a ground sense, IN-. The reference voltage, VREF, is applied externally and is set up to be the supply voltage. Its power scales linearly with the throughput. | [[adi>AD7942]] | |
| | [[adi>EVAL-AD7980SDZ]] | {{/resources/fpga/xilinx/interposer/ad7980.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7980|Analog Devices]]\\ \\ The AD7980 is a 16-bit, successive approximation, analog-to-digital converter (ADC) that operates from a single power supply, VDD. It contains a low power, high speed, 16-bit sampling ADC and a versatile serial interface port. On the CNV rising edge, it samples an analog input IN+ between 0 V to REF with respect to a ground sense IN-. The reference voltage, REF, is applied externally and can be set independent of the supply voltage, VDD. Its power scales linearly with throughput. | [[adi>AD7980]] | | | [[adi>EVAL-AD7946SDZ]] | {{/resources/fpga/xilinx/interposer/ad7980.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7946|Analog Devices]]\\ \\ The AD7946 is a 14-bit, charge redistribution, successive approximation, analog-to-digital converter (ADC) that operates from a single 5 V power supply, VDD. It contains a low power, high speed, 14-bit sampling ADC with no missing codes, an internal conversion clock, and a versatile serial interface port. The part also contains a low noise, wide bandwidth, short aperture delay track-and-hold circuit. On the CNV rising edge, it samples an analog input IN+ between 0 V to REF with respect to a ground sense IN-. The reference voltage, REF, is applied externally and can be set up to the supply voltage. Its power scales linearly with throughput. | [[adi>AD7946]] | |
| | [[adi>EVAL-AD7982SDZ]] | {{/resources/fpga/xilinx/interposer/ad7982.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7982|Analog Devices]]\\ \\ The AD7982 is an 18-bit, successive approximation, analog-to-digital converter (ADC) that operates from a single power supply, VDD. It contains a low power, high speed, 18-bit sampling ADC and a versatile serial interface port. On the CNV rising edge, the AD7982 samples the voltage difference between the IN+ and IN- pins. The voltages on these pins usually swing in opposite phases between 0 V and VREF. The reference voltage, REF, is applied externally and can be set independent of the supply voltage, VDD. Its power scales linearly with throughput. | [[adi>AD7982]] | | | [[adi>EVAL-AD7980SDZ]] | {{/resources/fpga/xilinx/interposer/ad7980.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7980|Analog Devices]]\\ \\ The AD7980 is a 16-bit, successive approximation, analog-to-digital converter (ADC) that operates from a single power supply, VDD. It contains a low power, high speed, 16-bit sampling ADC and a versatile serial interface port. On the CNV rising edge, it samples an analog input IN+ between 0 V to REF with respect to a ground sense IN-. The reference voltage, REF, is applied externally and can be set independent of the supply voltage, VDD. Its power scales linearly with throughput. | [[adi>AD7980]] | |
| | [[adi>EVAL-AD7983SDZ]] | {{/resources/fpga/xilinx/interposer/ad7983.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7983|Analog Devices]]\\ \\ The AD7983 is a 16-bit, successive approximation, analog-to-digital converter (ADC) that operates from a single power supply, VDD. It contains a low power, high speed, 16-bit sampling ADC and a versatile serial interface port. On the CNV rising edge, it samples an analog input IN+ between 0 V to REF with respect to a ground sense IN-. The reference voltage, REF, is applied externally and can be set independent of the supply voltage, VDD. Its power scales linearly with throughput. | [[adi>AD7983]] | | | [[adi>EVAL-AD7982SDZ]] | {{/resources/fpga/xilinx/interposer/ad7982.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7982|Analog Devices]]\\ \\ The AD7982 is an 18-bit, successive approximation, analog-to-digital converter (ADC) that operates from a single power supply, VDD. It contains a low power, high speed, 18-bit sampling ADC and a versatile serial interface port. On the CNV rising edge, the AD7982 samples the voltage difference between the IN+ and IN- pins. The voltages on these pins usually swing in opposite phases between 0 V and VREF. The reference voltage, REF, is applied externally and can be set independent of the supply voltage, VDD. Its power scales linearly with throughput. | [[adi>AD7982]] | |
| | [[adi>EVAL-AD7984SDZ]] | {{/resources/fpga/xilinx/interposer/ad7984.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7984|Analog Devices]]\\ \\ The AD7984 is an 18-bit, successive approximation, analog-to-digital converter (ADC) that operates from a single power supply, VDD. It contains a low power, high speed, 18-bit sampling ADC and a versatile serial interface port. On the CNV rising edge, the AD7984 samples the voltage difference between the IN+ and IN- pins. The voltages on these pins usually swing in opposite phases between 0 V and VREF. The reference voltage, REF, is applied externally and can be set independent of the supply voltage, VDD. | [[adi>AD7984]] | | | [[adi>EVAL-AD7983SDZ]] | {{/resources/fpga/xilinx/interposer/ad7983.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7983|Analog Devices]]\\ \\ The AD7983 is a 16-bit, successive approximation, analog-to-digital converter (ADC) that operates from a single power supply, VDD. It contains a low power, high speed, 16-bit sampling ADC and a versatile serial interface port. On the CNV rising edge, it samples an analog input IN+ between 0 V to REF with respect to a ground sense IN-. The reference voltage, REF, is applied externally and can be set independent of the supply voltage, VDD. Its power scales linearly with throughput. | [[adi>AD7983]] | |
| | [[adi>AD7988-1 | EVAL-AD7988-5SDZ]] | {{/resources/fpga/xilinx/interposer/ad7980.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7988-1|Analog Devices]]\\ \\ The AD7988-1 is is a 16-bit, successive approximation, analog-to-digital converter (ADC) that operate from a single power supply, VDD. The AD7988-1 offers a 100kSPS throughput. It is a low power, 16-bit sampling ADC with a versatile serial interface port. On the CNV rising edge, it samples an analog input IN+ between 0 V to REF with respect to a ground sense IN-. The reference voltage, REF, is applied externally and can be set independent of the supply voltage, VDD. | [[adi>AD7988-1]] | | | [[adi>EVAL-AD7984SDZ]] | {{/resources/fpga/xilinx/interposer/ad7984.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7984|Analog Devices]]\\ \\ The AD7984 is an 18-bit, successive approximation, analog-to-digital converter (ADC) that operates from a single power supply, VDD. It contains a low power, high speed, 18-bit sampling ADC and a versatile serial interface port. On the CNV rising edge, the AD7984 samples the voltage difference between the IN+ and IN- pins. The voltages on these pins usually swing in opposite phases between 0 V and VREF. The reference voltage, REF, is applied externally and can be set independent of the supply voltage, VDD. | [[adi>AD7984]] | |
| | [[adi>AD7988-5 | EVAL-AD7988-5SDZ]] | {{/resources/fpga/xilinx/interposer/ad7980.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7988-5|Analog Devices]]\\ \\ The AD7988-5 is is a 16-bit, successive approximation, analog-to-digital converter (ADC) that operate from a single power supply, VDD. The AD7988-5 offers a 500kSPS throughput. It is a low power, 16-bit sampling ADC with a versatile serial interface port. On the CNV rising edge, it samples an analog input IN+ between 0 V to REF with respect to a ground sense IN-. The reference voltage, REF, is applied externally and can be set independent of the supply voltage, VDD. | [[adi>AD7988-5]] | | | [[adi>AD7988-1 | EVAL-AD7988-5SDZ]] | {{/resources/fpga/xilinx/interposer/ad7980.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7988-1|Analog Devices]]\\ \\ The AD7988-1 is is a 16-bit, successive approximation, analog-to-digital converter (ADC) that operate from a single power supply, VDD. The AD7988-1 offers a 100kSPS throughput. It is a low power, 16-bit sampling ADC with a versatile serial interface port. On the CNV rising edge, it samples an analog input IN+ between 0 V to REF with respect to a ground sense IN-. The reference voltage, REF, is applied externally and can be set independent of the supply voltage, VDD. | [[adi>AD7988-1]] | |
| | | [[adi>AD7988-5 | EVAL-AD7988-5SDZ]] | {{/resources/fpga/xilinx/interposer/ad7980.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad7988-5|Analog Devices]]\\ \\ The AD7988-5 is is a 16-bit, successive approximation, analog-to-digital converter (ADC) that operate from a single power supply, VDD. The AD7988-5 offers a 500kSPS throughput. It is a low power, 16-bit sampling ADC with a versatile serial interface port. On the CNV rising edge, it samples an analog input IN+ between 0 V to REF with respect to a ground sense IN-. The reference voltage, REF, is applied externally and can be set independent of the supply voltage, VDD. | [[adi>AD7988-5]] | |
| ^ ^ Digital to Analog Converters ^ ^ | ^ ^ Digital to Analog Converters ^ ^ |
| | [[adi>EVAL-AD5415SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5415.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5415|Analog Devices]]\\ \\ The AD5415 is a CMOS, 12-bit, dual channel, current output digital-to-analog converter. This device operates from a 2.5 V to 5.5 V power supply, making it suited to battery-powered applications and other applications. | [[adi>AD5415]] | | | [[adi>EVAL-AD5415SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5415.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5415|Analog Devices]]\\ \\ The AD5415 is a CMOS, 12-bit, dual channel, current output digital-to-analog converter. This device operates from a 2.5 V to 5.5 V power supply, making it suited to battery-powered applications and other applications. | [[adi>AD5415]] | |
| | [[adi>EVAL-AD5421SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5421.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5421|Analog Devices]]\\ \\ The AD5421 is a complete, loop-powered, 4 mA to 20 mA digital-to-analog converter (DAC) designed to meet the needs of smart transmitter manufacturers in the industrial control industry. The DAC provides a high precision, fully integrated, low cost solution in a compact TSSOP package. | [[adi>AD5421]] | | | [[adi>EVAL-AD5421SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5421.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5421|Analog Devices]]\\ \\ The AD5421 is a complete, loop-powered, 4 mA to 20 mA digital-to-analog converter (DAC) designed to meet the needs of smart transmitter manufacturers in the industrial control industry. The DAC provides a high precision, fully integrated, low cost solution in a compact TSSOP package. | [[adi>AD5421]] | |
| | [[adi>EVAL-AD5425SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5449.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5425|Analog Devices]]\\ \\ The AD5425 is a CMOS, 8-bit, current output digital-to-analog converter that operates from a 2.5 V to 5.5 V power supply, making it suitable for battery-powered applications and many other applications. | [[adi>AD5425]] | | | [[adi>AD5425|EVAL-AD5425SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5449.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5425|Analog Devices]]\\ \\ The AD5425 is a CMOS, 8-bit, current output digital-to-analog converter that operates from a 2.5 V to 5.5 V power supply, making it suitable for battery-powered applications and many other applications. | [[adi>en/products/ad5425.html | AD5425]] | |
| | [[adi>EVAL-AD5443SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5443.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5443|Analog Devices]]\\ \\ The AD5443 is a CMOS12-bit current output digital-to-analog converters (DACs), respectively. These devices operate from a 3 V to 5.5 V power supply, makingthem suitable for battery-powered applications and many other applications. | [[adi>AD5443]] | | | [[adi>EVAL-AD5443SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5443.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5443|Analog Devices]]\\ \\ The AD5443 is a CMOS12-bit current output digital-to-analog converters (DACs), respectively. These devices operate from a 3 V to 5.5 V power supply, makingthem suitable for battery-powered applications and many other applications. | [[adi>AD5443]] | |
| | [[adi>EVAL-AD5446SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5443.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5446|Analog Devices]]\\ \\ The AD5446 is a CMOS 14-bit current output, digital-to-analog converters (DACs). Operating from a single 2.5 V to 5.5 V power supply, these devices are suited for battery-powered and other applications. | [[adi>AD5446]] | | | [[adi>EVAL-AD5446SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5443.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5446|Analog Devices]]\\ \\ The AD5446 is a CMOS 14-bit current output, digital-to-analog converters (DACs). Operating from a single 2.5 V to 5.5 V power supply, these devices are suited for battery-powered and other applications. | [[adi>AD5446]] | |
| | [[adi>EVAL-AD5449SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5449.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5449|Analog Devices]]\\ \\ The AD5449 is CMOS, 12-bit, dual-channel, current output digital-to-analog converter (DAC). This device operates from a 2.5 V to 5.5 V power supply, making it suited to battery-powered and other applications. | [[adi>AD5449]] | | | [[adi>EVAL-AD5449SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5449.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5449|Analog Devices]]\\ \\ The AD5449 is CMOS, 12-bit, dual-channel, current output digital-to-analog converter (DAC). This device operates from a 2.5 V to 5.5 V power supply, making it suited to battery-powered and other applications. | [[adi>AD5449]] | |
| | [[adi>EVAL-AD5453SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5443.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5453|Analog Devices]]\\ \\ The AD5453 is a CMOS 14-bit current output digital-to-analog converters, respectively. These devices operate from a 2.5 V to 5.5 V power supply, making them suited to several applications, including battery- powered applications. | [[adi>AD5453]] | | | [[adi>EVAL-AD5453SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5443.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5453|Analog Devices]]\\ \\ The AD5453 is a CMOS 14-bit current output digital-to-analog converters, respectively. These devices operate from a 2.5 V to 5.5 V power supply, making them suited to several applications, including battery- powered applications. | [[adi>AD5453]] | |
| | [[adi>EVAL-AD5541ASDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5541a.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5541A|Analog Devices]]\\ \\ The AD5541A is a single, 16-bit, serial input, unbuffered voltage output digital-to-analog converter (DAC) that operate from a single 2.7 V to 5.5 V supply. | [[adi>AD5541A]] | | | [[adi>EVAL-AD5541ASDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5541a.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5541A|Analog Devices]]\\ \\ The AD5541A is a single, 16-bit, serial input, unbuffered voltage output digital-to-analog converter (DAC) that operate from a single 2.7 V to 5.5 V supply. | [[adi>AD5541A]] | |
| | [[adi>EVAL-AD5542ASDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5542a.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5542A|Analog Devices]]\\ \\ The AD5542A is single, 16-bit, serial input, unbuffered voltage output digital-to-analog converter (DAC) that operates from a single 2.7 V to 5.5 V supply. The DAC output range extends from 0 V to VREF and is guaranteed | [[adi>AD5542A]] | | | [[adi>EVAL-AD5542ASDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5542a.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5542A|Analog Devices]]\\ \\ The AD5542A is single, 16-bit, serial input, unbuffered voltage output digital-to-analog converter (DAC) that operates from a single 2.7 V to 5.5 V supply. The DAC output range extends from 0 V to VREF and is guaranteed. | [[adi>AD5542A]] | |
| | [[adi>EVAL-AD5543SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5543.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5543|Analog Devices]]\\ \\ The AD5543 is precision 16-bit, low power, current output, small form factor digital-to-analog converter (DAC). It is designed to operate from a single 5 V supply with a ±10 V multiplying reference. | [[adi>AD5543]] | | | [[adi>EVAL-AD5543SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5543.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5543|Analog Devices]]\\ \\ The AD5543 is precision 16-bit, low power, current output, small form factor digital-to-analog converter (DAC). It is designed to operate from a single 5 V supply with a ±10 V multiplying reference. | [[adi>AD5543]] | |
| | [[adi>AD5553|EVAL-AD5553SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5553.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5553|Analog Devices]]\\ \\ The AD5553 is precision 14-bit, low power, current output, small form factor digital-to-analog converter (DAC). It is designed to operate from a single 5 V supply with a ±10 V multiplying reference. | [[adi>AD5553]] | | | [[adi>AD5553|EVAL-AD5553SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5553.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5553|Analog Devices]]\\ \\ The AD5553 is precision 14-bit, low power, current output, small form factor digital-to-analog converter (DAC). It is designed to operate from a single 5 V supply with a ±10 V multiplying reference. | [[adi>AD5553]] | |
| | [[adi>AD5570|EVAL-AD5570SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5570.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5570|Analog Devices]]\\ \\ The AD5570 is a single 16-bit serial input, voltage output DAC that operates from supply voltages of ±11.4 V up to ±16.5 V. Integral linearity (INL) and differential nonlinearity (DNL) are accurate to 1 LSB. During power-up, when the supply voltages are changing, VOUT is clamped to 0 V via a low impedance path. | [[adi>AD5570]] | | | [[adi>AD5570|EVAL-AD5570SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5570.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5570|Analog Devices]]\\ \\ The AD5570 is a single 16-bit serial input, voltage output DAC that operates from supply voltages of ±11.4 V up to ±16.5 V. Integral linearity (INL) and differential nonlinearity (DNL) are accurate to 1 LSB. During power-up, when the supply voltages are changing, VOUT is clamped to 0 V via a low impedance path. | [[adi>AD5570]] | |
| | [[adi>EVAL-AD5629RSDZ]] | {{/resources/fpga/xilinx/interposer/ad5629.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5629|Analog Devices]]\\ \\ The AD5629R device is a low power, octal, 12-bit, buffered voltage-output DACs. It operates from a single 2.7 V to 5.5 V supply and is guaranteed monotonic by design. | [[adi>AD5629R]] | | | [[adi>EVAL-AD5629RSDZ]] | {{/resources/fpga/xilinx/interposer/ad5629.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5629|Analog Devices]]\\ \\ The AD5629R device is a low power, octal, 12-bit, buffered voltage-output DACs. It operates from a single 2.7 V to 5.5 V supply and is guaranteed monotonic by design. | [[adi>AD5629R]] | |
| | [[adi>EVAL-AD5668SDCZ]] | {{/resources/fpga/xilinx/interposer/img_ad5668.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5668|Analog Devices]]\\ \\ The AD5668 device is a low power, octal, 16-bit, buffered voltage-output DAC. The device operates from a single 2.7 V to 5.5 V supply and is guaranteed monotonic by design. | [[adi>AD5668]] | | | [[adi>EVAL-AD5668SDCZ]] | {{/resources/fpga/xilinx/interposer/img_ad5668.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5668|Analog Devices]]\\ \\ The AD5668 device is a low power, octal, 16-bit, buffered voltage-output DAC. The device operates from a single 2.7 V to 5.5 V supply and is guaranteed monotonic by design. | [[adi>AD5668]] | |
| | [[adi>EVAL-AD5669RSDZ]] | {{/resources/fpga/xilinx/interposer/ad5669.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5669|Analog Devices]]\\ \\ The AD5669R device is a low power, octal, 16-bit, buffered voltage-output DACs. It operates from a single 2.7 V to 5.5 V supply and is guaranteed monotonic by design. | [[adi>AD5669R]] | | | [[adi>EVAL-AD5669RSDZ]] | {{/resources/fpga/xilinx/interposer/ad5669.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5669|Analog Devices]]\\ \\ The AD5669R device is a low power, octal, 16-bit, buffered voltage-output DACs. It operates from a single 2.7 V to 5.5 V supply and is guaranteed monotonic by design. | [[adi>AD5669R]] | |
| | [[adi>EVAL-AD5684RSDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5686r.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5684R|Analog Devices]]\\ \\ The AD5684R is a low power, quad, 12-bit buffered voltage output DACs. The device includes a 2.5 V, 2 ppm/°C internal reference (enabled by default) and a gain select pin giving a full-scale output of 2.5 V (gain = 1) or 5 V (gain = 2). The device operates from a single 2.7 V to 5.5 V supply, is guaranteed monotonic by design, and exhibits less than 0.1% FSR gain error and 1.5 mV offset error performance. | [[adi>AD5684R]] | | | [[adi>EVAL-AD5684RSDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5686r.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5684R|Analog Devices]]\\ \\ The AD5684R is a low power, quad, 12-bit buffered voltage output DACs. The device includes a 2.5 V, 2 ppm/°C internal reference (enabled by default) and a gain select pin giving a full-scale output of 2.5 V (gain = 1) or 5 V (gain = 2). The device operates from a single 2.7 V to 5.5 V supply, is guaranteed monotonic by design, and exhibits less than 0.1% FSR gain error and 1.5 mV offset error performance. | [[adi>AD5684R]] | |
| | [[adi>EVAL-AD5686RSDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5686r.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5686R|Analog Devices]]\\ \\ The AD5686R is a low power, quad, 12-bit buffered voltage output DACs. The device includes a 2.5 V, 2 ppm/°C internal reference (enabled by default) and a gain select pin giving a full-scale output of 2.5 V (gain = 1) or 5 V (gain = 2). The device operates from a single 2.7 V to 5.5 V supply, is guaranteed monotonic by design, and exhibits less than 0.1% FSR gain error and 1.5 mV offset error performance. | [[adi>AD5686R]] | | | [[adi>EVAL-AD5686RSDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5686r.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5686R|Analog Devices]]\\ \\ The AD5686R is a low power, quad, 12-bit buffered voltage output DACs. The device includes a 2.5 V, 2 ppm/°C internal reference (enabled by default) and a gain select pin giving a full-scale output of 2.5 V (gain = 1) or 5 V (gain = 2). The device operates from a single 2.7 V to 5.5 V supply, is guaranteed monotonic by design, and exhibits less than 0.1% FSR gain error and 1.5 mV offset error performance. | [[adi>AD5686R]] | |
| | [[adi>EVAL-AD5694RSDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5694r.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5694r|Analog Devices]]\\ \\ The AD5694R nanoDAC is a quad, 12-bit, rail-to-rail, voltage output DAC. The device includes a 2.5V, 2ppm/°C internal reference (enabled by default) and a gain select pin giving a full-scale output of 2.5V (gain=1) or 5V (gain=2). The device operates from a single 2.7 V to 5.5 V supply, is guaranteed monotonic by design and exhibits less than 0.1% FSR gain error and 1.5mV offset error performance. | [[adi>AD5694R]] | | | [[adi>EVAL-AD5694RSDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5694r.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5694r|Analog Devices]]\\ \\ The AD5694R nanoDAC is a quad, 12-bit, rail-to-rail, voltage output DAC. The device includes a 2.5V, 2ppm/°C internal reference (enabled by default) and a gain select pin giving a full-scale output of 2.5V (gain=1) or 5V (gain=2). The device operates from a single 2.7 V to 5.5 V supply, is guaranteed monotonic by design and exhibits less than 0.1% FSR gain error and 1.5mV offset error performance. | [[adi>AD5694R]] | |
| | [[adi>EVAL-AD5696RSDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5696r.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5696r|Analog Devices]]\\ \\ The AD5696R nanodac is a quad, 16-bit, rail-to-rail, voltage output dac. the device includes a 2.5v, 2ppm/°c internal reference (enabled by default) and a gain select pin giving a full-scale output of 2.5v (gain=1) or 5v (gain=2). the device operates from a single 2.7 v to 5.5 v supply, is guaranteed monotonic by design and exhibits less than 0.1% fsr gain error and 1.5mv offset error performance. | [[adi>AD5696R]] | | | [[adi>EVAL-AD5696RSDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5696r.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5696r|Analog Devices]]\\ \\ The AD5696R nanodac is a quad, 16-bit, rail-to-rail, voltage output dac. the device includes a 2.5v, 2ppm/°c internal reference (enabled by default) and a gain select pin giving a full-scale output of 2.5v (gain=1) or 5v (gain=2). the device operates from a single 2.7 v to 5.5 v supply, is guaranteed monotonic by design and exhibits less than 0.1% fsr gain error and 1.5mv offset error performance. | [[adi>AD5696R]] | |
| | [[adi>EVAL-AD5755SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5755.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5755|Analog Devices]]\\ \\ The AD5755 is a quad, voltage and current output DAC that operates with a power supply range from -26.4 V to +33 V. On-chip dynamic power control minimizes package power dissipation in current mode. This is achieved by regulating the voltage on the output driver from 7.4 V to 29.5 V using a dc-to-dc boost converter optimized for minimum on chip power dissipation. | [[adi>AD5755]] | | | [[adi>EVAL-AD5755SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5755.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5755|Analog Devices]]\\ \\ The AD5755 is a quad, voltage and current output DAC that operates with a power supply range from -26.4 V to +33 V. On-chip dynamic power control minimizes package power dissipation in current mode. This is achieved by regulating the voltage on the output driver from 7.4 V to 29.5 V using a dc-to-dc boost converter optimized for minimum on chip power dissipation. | [[adi>AD5755]] | |
| | [[adi>EVAL-AD5755-1SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5755.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5755|Analog Devices]]\\ \\ The AD5755-1 is a quad, voltage and current output DAC, that operates with a power supply range from -26.4 V to +33 V. On chip dynamic power control minimizes package power dissipation in current mode. This is achieved by regulating the voltage on the output driver from between 7.4 V to 29.5 V using a dc-to-dc boost converter optimized for minimum on-chip power dissipation. Each channel has a corresponding CHART pin so that HART signals can be coupled onto the current output of the AD5755-1. | [[adi>AD5755-1]] | | | [[adi>EVAL-AD5755-1SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5755.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5755|Analog Devices]]\\ \\ The AD5755-1 is a quad, voltage and current output DAC, that operates with a power supply range from -26.4 V to +33 V. On chip dynamic power control minimizes package power dissipation in current mode. This is achieved by regulating the voltage on the output driver from between 7.4 V to 29.5 V using a dc-to-dc boost converter optimized for minimum on-chip power dissipation. Each channel has a corresponding CHART pin so that HART signals can be coupled onto the current output of the AD5755-1. | [[adi>AD5755-1]] | |
| | [[adi>EVAL-AD5757SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5757.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5757|Analog Devices]]\\ \\ The AD5757 is a quad, current output DAC that operates with a power supply range from 10.8 V to 33 V. On-chip dynamic power control minimizes package power dissipation by regulat-ing the voltage on the output driver from 7.4 V to 29.5 V using a dc-to-dc boost converter optimized for minimum on-chip power dissipation. | [[adi>AD5757]] | | | [[adi>EVAL-AD5757SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5757.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5757|Analog Devices]]\\ \\ The AD5757 is a quad, current output DAC that operates with a power supply range from 10.8 V to 33 V. On-chip dynamic power control minimizes package power dissipation by regulat-ing the voltage on the output driver from 7.4 V to 29.5 V using a dc-to-dc boost converter optimized for minimum on-chip power dissipation. | [[adi>AD5757]] | |
| | [[adi>EVAL-AD5780SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5780.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5760|Analog Devices]]\\ \\ The AD5760 is a true 16-bit, unbuffered voltage output DAC that operates from a bipolar supply of up to 33 V. The AD5760 accepts a positive reference input range of 5 V to VDD - 2.5 V and a negative reference input range of VSS + 2.5 V to 0 V. The AD5760 offers a relative accuracy specification of ±0.5 LSB maximum range, and operation is guaranteed monotonic with a ±0.5 LSB DNL maximum range specification. | [[adi>AD5760]] | | | [[adi>EVAL-AD5780SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5780.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5760|Analog Devices]]\\ \\ The AD5760 is a true 16-bit, unbuffered voltage output DAC that operates from a bipolar supply of up to 33 V. The AD5760 accepts a positive reference input range of 5 V to VDD - 2.5 V and a negative reference input range of VSS + 2.5 V to 0 V. The AD5760 offers a relative accuracy specification of ±0.5 LSB maximum range, and operation is guaranteed monotonic with a ±0.5 LSB DNL maximum range specification. | [[adi>AD5760]] | |
| | [[adi>EVAL-AD5780SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5780.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5780|Analog Devices]]\\ \\ The AD5780 is a true 18-bit, unbuffered voltage out DAC that operates from a bipolar supply up to 33V. Both reference inputs are buffered on chip and external buffers are not required.The AD5780 accepts a positive reference input in the range of 5V to VDD – 2.5V and a negative reference input in the range of VSS + 2.5v to 0V. The AD5780 offers relative accuracy of +/-1 LSB max and operation is guaranteed monotonic with a ±1 LSB DNL max range specification. | [[adi>AD5780]] | | | [[adi>EVAL-AD5780SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5780.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5780|Analog Devices]]\\ \\ The AD5780 is a true 18-bit, unbuffered voltage out DAC that operates from a bipolar supply up to 33V. Both reference inputs are buffered on chip and external buffers are not required.The AD5780 accepts a positive reference input in the range of 5V to VDD – 2.5V and a negative reference input in the range of VSS + 2.5v to 0V. The AD5780 offers relative accuracy of +/-1 LSB max and operation is guaranteed monotonic with a ±1 LSB DNL max range specification. | [[adi>AD5780]] | |
| | [[adi>EVAL-AD5781SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5781.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5781|Analog Devices]]\\ \\ The AD5781 is a high precision, 18-bit digital-to-analog converter (DAC), designed to meet the requirements of precision control applications. The output range of the AD5781 is configured by two reference voltage inputs. The device is specified to operate with a dual power supply of up to 33 V. | [[adi>AD5781]] | | | [[adi>EVAL-AD5781SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5781.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5781|Analog Devices]]\\ \\ The AD5781 is a high precision, 18-bit digital-to-analog converter (DAC), designed to meet the requirements of precision control applications. The output range of the AD5781 is configured by two reference voltage inputs. The device is specified to operate with a dual power supply of up to 33 V. | [[adi>AD5781]] | |
| | [[adi>EVAL-AD5790SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5790.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5790|Analog Devices]]\\ \\ The AD5790 is a single 20-bit, voltage out DAC that operates from a bipolar supply up to 33V. Reference buffers are also provided on-chip. The AD5790 accepts a positive reference input in the range of 5V to VDD – 2.5V and a negative reference input in the range of VSS + 2.5v to 0V. The AD5790 offers a relative accuracy of +/-2 LSB's max and operation is guaranteed monotonic with a -1 LSB to +3 LSB's DNL specification. | [[adi>AD5790]] | | | [[adi>EVAL-AD5790SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5790.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5790|Analog Devices]]\\ \\ The AD5790 is a single 20-bit, voltage out DAC that operates from a bipolar supply up to 33V. Reference buffers are also provided on-chip. The AD5790 accepts a positive reference input in the range of 5V to VDD – 2.5V and a negative reference input in the range of VSS + 2.5v to 0V. The AD5790 offers a relative accuracy of +/-2 LSB's max and operation is guaranteed monotonic with a -1 LSB to +3 LSB's DNL specification. | [[adi>AD5790]] | |
| | [[adi>EVAL-AD5791SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5791.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5791|Analog Devices]]\\ \\ The AD5791 is a single 20-bit, unbuffered voltage-output DAC that operates from a bipolar supply of up to 33 V. The AD5791 accepts a positive reference input in the range 5 V to VDD - 2.5 V and a negative reference input in the range VSS + 2.5 V to 0 V. It offers a relative accuracy specification of ±1 LSB max, and operation is guaranteed monotonic with a ±1 LSB DNL maximum specification. | [[adi>AD5791]] | | | [[adi>EVAL-AD5791SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5791.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5791|Analog Devices]]\\ \\ The AD5791 is a single 20-bit, unbuffered voltage-output DAC that operates from a bipolar supply of up to 33 V. The AD5791 accepts a positive reference input in the range 5 V to VDD - 2.5 V and a negative reference input in the range VSS + 2.5 V to 0 V. It offers a relative accuracy specification of ±1 LSB max, and operation is guaranteed monotonic with a ±1 LSB DNL maximum specification. | [[adi>AD5791]] | |
| ^ ^ Digital Potentiometers ^ ^ | ^ ^ Digital Potentiometers ^ ^ |
| | [[adi>EVAL-AD5110SDZ]] | {{/resources/fpga/xilinx/interposer/ad5111_kc705.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5110|Analog Devices]]\\ \\ The AD5110 provides provide a nonvolatile solution for 128-/64-/32-position adjustment applications, offering guaranteed low resistor tolerance errors of ±8% and up to ±6 mA current density in the A, B, and W pins. The low resistor tolerance, low nominal temperature coefficient and high bandwidth simplify open-loop applications, as well as tolerance matching applications. The new low wiper resistance feature minimizes the wiper resistance in the extremes of the resistor array to only 45 O, typical. The wiper settings are controllable through an I2C-compatible digital interface that is also used to readback the wiper register and EEPROM content. Resistor tolerance is stored within EEPROM, providing an end-to-end tolerance accuracy of 0.1%. | [[adi>AD5110]] | | | [[adi>EVAL-AD5110SDZ]] | {{/resources/fpga/xilinx/interposer/ad5111_kc705.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5110|Analog Devices]]\\ \\ The AD5110 provides provide a nonvolatile solution for 128-/64-/32-position adjustment applications, offering guaranteed low resistor tolerance errors of ±8% and up to ±6 mA current density in the A, B, and W pins. The low resistor tolerance, low nominal temperature coefficient and high bandwidth simplify open-loop applications, as well as tolerance matching applications. The new low wiper resistance feature minimizes the wiper resistance in the extremes of the resistor array to only 45 O, typical. The wiper settings are controllable through an I2C-compatible digital interface that is also used to readback the wiper register and EEPROM content. Resistor tolerance is stored within EEPROM, providing an end-to-end tolerance accuracy of 0.1%. | [[adi>AD5110]] | |
| | [[adi>EVAL-AD5111SDZ]] | {{/resources/fpga/xilinx/interposer/ad5111_kc705.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5111|Analog Devices]]\\ \\ The AD5111 provides a nonvolatile solution for 128-/64-/32-position adjustment applications, offering guaranteed low resistor tolerance errors of ±8% and up to ±6 mA current density in the A, B, and W pins. The low resistor tolerance, low nominal temperature coefficient, and high bandwidth simplify open-loop applications, as well as tolerance matching applications. The new low wiper resistance feature minimizes the wiper resistance in the extremes of the resistor array to only 45 O, typical. A simple 3-wire up/down interface allows manual switching or high speed digital control with clock rates up to 50 MHz. | [[adi>AD5111]] | | | [[adi>EVAL-AD5111SDZ]] | {{/resources/fpga/xilinx/interposer/ad5111_kc705.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5111|Analog Devices]]\\ \\ The AD5111 provides a nonvolatile solution for 128-/64-/32-position adjustment applications, offering guaranteed low resistor tolerance errors of ±8% and up to ±6 mA current density in the A, B, and W pins. The low resistor tolerance, low nominal temperature coefficient, and high bandwidth simplify open-loop applications, as well as tolerance matching applications. The new low wiper resistance feature minimizes the wiper resistance in the extremes of the resistor array to only 45 O, typical. A simple 3-wire up/down interface allows manual switching or high speed digital control with clock rates up to 50 MHz. | [[adi>AD5111]] | |
| | [[adi>EVAL-AD5162SDZ]] | {{/resources/fpga/xilinx/interposer/ad5162.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5162|Analog Devices]]\\ \\ The AD5162 provides a compact 3 mm x 4.9 mm packaged solution for dual 256 position adjustment applications. This device performs the same electronic adjustment function as a 3-terminal mechanical potentiometer. Available in four different end-to-end resistance values (2.5 k, 10 k, 50 k, 100 k), this low temperature coefficient device is ideal for high accuracy and stability-variable resistance adjustments.The wiper settings are controllable through the SPI compatible digital interface. | [[adi>AD5162]] | | | [[adi>EVAL-AD5162SDZ]] | {{/resources/fpga/xilinx/interposer/ad5162.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5162|Analog Devices]]\\ \\ The AD5162 provides a compact 3 mm x 4.9 mm packaged solution for dual 256 position adjustment applications. This device performs the same electronic adjustment function as a 3-terminal mechanical potentiometer. Available in four different end-to-end resistance values (2.5 k, 10 k, 50 k, 100 k), this low temperature coefficient device is ideal for high accuracy and stability-variable resistance adjustments.The wiper settings are controllable through the SPI compatible digital interface. | [[adi>AD5162]] | |
| | [[adi>EVAL-AD5172SDZ]] | {{/resources/fpga/xilinx/interposer/ad5172.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5172|Analog Devices]]\\ \\ The AD5172/AD5173 are dual-channel, 256-position, one-time programmable (OTP) digital potentiometers that employ fuse link technology to achieve memory retention of resistance settings. OTP is a cost-effective alternative to EEMEM for users who do not need to program the digital potentiometer setting in memory more than once. These devices perform the same electronic adjustment function as mechanical potentiometers or variable resistors with enhanced resolution, solid-state reliability, and superior low temperature coefficient performance. | [[adi>AD5172]] | | | [[adi>EVAL-AD5172SDZ]] | {{/resources/fpga/xilinx/interposer/ad5172.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5172|Analog Devices]]\\ \\ The AD5172/AD5173 are dual-channel, 256-position, one-time programmable (OTP) digital potentiometers that employ fuse link technology to achieve memory retention of resistance settings. OTP is a cost-effective alternative to EEMEM for users who do not need to program the digital potentiometer setting in memory more than once. These devices perform the same electronic adjustment function as mechanical potentiometers or variable resistors with enhanced resolution, solid-state reliability, and superior low temperature coefficient performance. | [[adi>AD5172]] | |
| | [[adi>EVAL-AD5232SDZ]] | {{/resources/fpga/xilinx/interposer/ad5232.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5232|Analog Devices]]\\ \\ The AD5232 provides a nonvolatile, dual-channel, digitally controlled variable resistor (VR) with 256-position resolution. This device performs the same electronic adjustment function as a mechanical potentiometer with enhanced resolution, solid state reliability, and superior low temperature coefficient performance. The versatile programming of the AD5232, performed via a microcontroller, allows multiple modes of operation and adjustment. | [[adi>AD5232]] | | | [[adi>EVAL-AD5232SDZ]] | {{/resources/fpga/xilinx/interposer/ad5232.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5232|Analog Devices]]\\ \\ The AD5232 provides a nonvolatile, dual-channel, digitally controlled variable resistor (VR) with 256-position resolution. This device performs the same electronic adjustment function as a mechanical potentiometer with enhanced resolution, solid state reliability, and superior low temperature coefficient performance. The versatile programming of the AD5232, performed via a microcontroller, allows multiple modes of operation and adjustment. | [[adi>AD5232]] | |
| | [[adi>EVAL-AD5235SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5235.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5235|Analog Devices]]\\ \\ The AD5235 is a dual-channel, 1024-position, nonvolatile memory digital potentiometer. With versatile programmability, the AD5235 allows multiple modes of operation, including read/write access in the RDAC and EEMEM registers, increment/decrement of resistance, resistance changes in ±6 dB scales, wiper setting read-back, and extra EEMEM for storing user-defined information, such as memory data for other components or a lookup table. The AD5235 supports dual-supply ±2.25 V to ±2.75 V operation and single-supply 2.7 V to 5.5 V operation, making the device suited for battery-powered applications and many other applications. In addition, the AD5235 uses a versatile SPI-compatible serial interface, allowing speeds of up to 50 MHz. | [[adi>AD5235]] | | | [[adi>EVAL-AD5235SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5235.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5235|Analog Devices]]\\ \\ The AD5235 is a dual-channel, 1024-position, nonvolatile memory digital potentiometer. With versatile programmability, the AD5235 allows multiple modes of operation, including read/write access in the RDAC and EEMEM registers, increment/decrement of resistance, resistance changes in ±6 dB scales, wiper setting read-back, and extra EEMEM for storing user-defined information, such as memory data for other components or a lookup table. The AD5235 supports dual-supply ±2.25 V to ±2.75 V operation and single-supply 2.7 V to 5.5 V operation, making the device suited for battery-powered applications and many other applications. In addition, the AD5235 uses a versatile SPI-compatible serial interface, allowing speeds of up to 50 MHz. | [[adi>AD5235]] | |
| | [[adi>EVAL-AD5252SDZ]] | {{/resources/fpga/xilinx/interposer/ad5254.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5252|Analog Devices]]\\ \\ The AD5252 is a dual channel, digitally controlled variable resistor (VR) with resolutions of 256 positions. This device performs the same electronic adjustment function as a potentiometer or variable resistor. The AD5252’s versatile programming via a Micro Controller allows multiple modes of operation and adjustment. | [[adi>AD5252]] | | | [[adi>EVAL-AD5252SDZ]] | {{/resources/fpga/xilinx/interposer/ad5254.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5252|Analog Devices]]\\ \\ The AD5252 is a dual channel, digitally controlled variable resistor (VR) with resolutions of 256 positions. This device performs the same electronic adjustment function as a potentiometer or variable resistor. The AD5252’s versatile programming via a Micro Controller allows multiple modes of operation and adjustment. | [[adi>AD5252]] | |
| | [[adi>EVAL-AD5254SDZ]] | {{/resources/fpga/xilinx/interposer/ad5254.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5254|Analog Devices]]\\ \\ The AD5254 is quad-channel, I2C, nonvolatile memory, digitally controlled potentiometers with 256 positions, respectively. This device performs the same electronic adjustment functions as mechanical potentiometers, trimmers, and variable resistors. | [[adi>AD5254]] | | | [[adi>EVAL-AD5254SDZ]] | {{/resources/fpga/xilinx/interposer/ad5254.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5254|Analog Devices]]\\ \\ The AD5254 is quad-channel, I2C, nonvolatile memory, digitally controlled potentiometers with 256 positions, respectively. This device performs the same electronic adjustment functions as mechanical potentiometers, trimmers, and variable resistors. | [[adi>AD5254]] | |
| | [[adi>EVAL-AD5270SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5270.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5270|Analog Devices]]\\ \\ The AD5270 is single-channel, 1024-position digital rheostat that combines industry leading variable resistor performance with nonvolatile memory (NVM) in a compact package. | [[adi>AD5270]] | | | [[adi>EVAL-AD5270SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad5270.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5270|Analog Devices]]\\ \\ The AD5270 is single-channel, 1024-position digital rheostat that combines industry leading variable resistor performance with nonvolatile memory (NVM) in a compact package. | [[adi>AD5270]] | |
| | [[adi>EVAL-AD5272SDZ]] | {{/resources/fpga/xilinx/interposer/ad5272.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5272|Analog Devices]]\\ \\ The AD5272 is single-channel, 1024-position digital rheostat that combines industry leading variable resistor performance with nonvolatile memory (NVM) in a compact package. | [[adi>AD5272]] | | | [[adi>EVAL-AD5272SDZ]] | {{/resources/fpga/xilinx/interposer/ad5272.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad5272|Analog Devices]]\\ \\ The AD5272 is single-channel, 1024-position digital rheostat that combines industry leading variable resistor performance with nonvolatile memory (NVM) in a compact package. | [[adi>AD5272]] | |
| | [[adi>EVAL-AD8403SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad8403.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad8403|Analog Devices]]\\ \\ The AD8403 provides a quad channel, 256 position digitally controlled variable resistor (VR) device. This device performs the same electronic adjustment function as a potentiometer or variable resistor. The AD8403 contains four independent variable resistors in 24-lead PDIP, SOIC and TSSOP packages. Each part contains a fixed resistor with a wiper contact that taps the fixed resistor value at a point determined by a digital code loaded into the controlling serial input register. The resistance between the wiper and either endpoint of the fixed resistor varies linearly with respect to the digital code transferred into the VR latch. Each variable resistor offers a completely programmable value of resistance, between the A terminal and the wiper or the B terminal and the wiper. The fixed A to B terminal resistance of 1 kO, 10 kO, 50 kO or 100 kO has a ±1% channel-to-channel matching tolerance with a nominal temperature coefficient of 500 ppm/°C. A unique switching circuit minimizes the high glitch inherent in traditional switched resistor designs avoiding any make-before-break or break-before-make operation. | [[adi>AD8403]] | | | [[adi>EVAL-AD8403SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad8403.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad8403|Analog Devices]]\\ \\ The AD8403 provides a quad channel, 256 position digitally controlled variable resistor (VR) device. This device performs the same electronic adjustment function as a potentiometer or variable resistor. The AD8403 contains four independent variable resistors in 24-lead PDIP, SOIC and TSSOP packages. Each part contains a fixed resistor with a wiper contact that taps the fixed resistor value at a point determined by a digital code loaded into the controlling serial input register. The resistance between the wiper and either endpoint of the fixed resistor varies linearly with respect to the digital code transferred into the VR latch. Each variable resistor offers a completely programmable value of resistance, between the A terminal and the wiper or the B terminal and the wiper. The fixed A to B terminal resistance of 1 kO, 10 kO, 50 kO or 100 kO has a ±1% channel-to-channel matching tolerance with a nominal temperature coefficient of 500 ppm/°C. A unique switching circuit minimizes the high glitch inherent in traditional switched resistor designs avoiding any make-before-break or break-before-make operation. | [[adi>AD8403]] | |
| | [[adi>EVAL-ADN2850SDZ]] | {{/resources/fpga/xilinx/interposer/img_adn2850.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/adn2850|Analog Devices]]\\ \\ The ADN2850 is a dual-channel, nonvolatile memory, digitally controlled resistors with 1024-step resolution, offering guaranteed maximum low resistor tolerance error of ±8%. The device performs the same electronic adjustment function as a mechanical rheostat with enhanced resolution, solid state reliability, and superior low temperature coefficient performance. The versatile programming of the ADN2850 via an SPI®-compatible serial interface allows 16 modes of operation and adjustment including scratchpad programming, memory storing and restoring, increment/decrement, ±6 dB/step log taper adjustment, wiper setting readback, and extra EEMEM for user-defined information such as memory data for other components, look-up table, or system identification information. | [[adi>ADN2850]] | | | [[adi>EVAL-ADN2850SDZ]] | {{/resources/fpga/xilinx/interposer/img_adn2850.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/adn2850|Analog Devices]]\\ \\ The ADN2850 is a dual-channel, nonvolatile memory, digitally controlled resistors with 1024-step resolution, offering guaranteed maximum low resistor tolerance error of ±8%. The device performs the same electronic adjustment function as a mechanical rheostat with enhanced resolution, solid state reliability, and superior low temperature coefficient performance. The versatile programming of the ADN2850 via an SPI®-compatible serial interface allows 16 modes of operation and adjustment including scratchpad programming, memory storing and restoring, increment/decrement, ±6 dB/step log taper adjustment, wiper setting readback, and extra EEMEM for user-defined information such as memory data for other components, look-up table, or system identification information. | [[adi>ADN2850]] | |
| ^ ^ Direct Digital Synthesis ( DDS) & Modulators ^ ^ | ^ ^ Direct Digital Synthesis ( DDS) & Modulators ^ ^ |
| | [[adi>EVAL-AD9833SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad9833.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad9833|Analog Devices]]\\ \\ The AD9833 is a low power, programmable waveform generator capable of producing sine, triangular, and square wave outputs. Waveform generation is required in various types of sensing, actuation, and time domain reflectometry (TDR) applications. The output frequency and phase are software programmable, allowing easy tuning. No external components are needed. The frequency registers are 28 bits; with a 25 MHz clock rate, resolution of 0.1 Hz can be achieved. Similarly, with a 1 MHz clock rate, the AD9833 can be tuned to 0.004 Hz resolution. | [[adi>AD9833]] | | | [[adi>EVAL-AD9833SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad9833.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad9833|Analog Devices]]\\ \\ The AD9833 is a low power, programmable waveform generator capable of producing sine, triangular, and square wave outputs. Waveform generation is required in various types of sensing, actuation, and time domain reflectometry (TDR) applications. The output frequency and phase are software programmable, allowing easy tuning. No external components are needed. The frequency registers are 28 bits; with a 25 MHz clock rate, resolution of 0.1 Hz can be achieved. Similarly, with a 1 MHz clock rate, the AD9833 can be tuned to 0.004 Hz resolution. | [[adi>AD9833]] | |
| | [[adi>EVAL-AD9834SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad9834.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad9834|Analog Devices]]\\ \\ The AD9834 is a 75 MHz low power DDS device capable of producing high performance sine and triangular outputs. It also has an on-board comparator that allows a square wave to be produced for clock generation. Consuming only 20 mW of power at 3 V makes the AD9834 an ideal candidate for power-sensitive applications. | [[adi>AD9834]] | | | [[adi>EVAL-AD9834SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad9834.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad9834|Analog Devices]]\\ \\ The AD9834 is a 75 MHz low power DDS device capable of producing high performance sine and triangular outputs. It also has an on-board comparator that allows a square wave to be produced for clock generation. Consuming only 20 mW of power at 3 V makes the AD9834 an ideal candidate for power-sensitive applications. | [[adi>AD9834]] | |
| | [[adi>EVAL-AD9837SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad9837.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad9837|Analog Devices]]\\ \\ The AD9837 is a low power, programmable waveform generator capable of producing sine, triangular, and square wave outputs. Waveform generation is required in various types of sensing, actuation, and time domain reflectometry (TDR) applications. The output frequency and phase are software programmable, allowing easy tuning. The frequency registers are 28 bits: with a 16 MHz clock rate, resolution of 0.06 Hz can be achieved; with a 5 MHz clock rate, the AD9837 can be tuned to 0.02 Hz resolution. | [[adi>AD9837]] | | | [[adi>EVAL-AD9837SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad9837.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad9837|Analog Devices]]\\ \\ The AD9837 is a low power, programmable waveform generator capable of producing sine, triangular, and square wave outputs. Waveform generation is required in various types of sensing, actuation, and time domain reflectometry (TDR) applications. The output frequency and phase are software programmable, allowing easy tuning. The frequency registers are 28 bits: with a 16 MHz clock rate, resolution of 0.06 Hz can be achieved; with a 5 MHz clock rate, the AD9837 can be tuned to 0.02 Hz resolution. | [[adi>AD9837]] | |
| | [[adi>EVAL-AD9838SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad9838.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad9838|Analog Devices]]\\ \\ The AD9838 is a low power DDS device capable of producing high performance sine and triangular outputs. It also has an on-board comparator that allows a square wave to be produced for clock generation. Consuming only 11 mW of power at 2.3 V the AD9838 is an ideal candidate for power-sensitive applications. | [[adi>AD9838]] | | | [[adi>EVAL-AD9838SDZ]] | {{/resources/fpga/xilinx/interposer/img_ad9838.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad9838|Analog Devices]]\\ \\ The AD9838 is a low power DDS device capable of producing high performance sine and triangular outputs. It also has an on-board comparator that allows a square wave to be produced for clock generation. Consuming only 11 mW of power at 2.3 V the AD9838 is an ideal candidate for power-sensitive applications. | [[adi>AD9838]] | |
| ^ ^ MEMS Microphones ^ ^ | ^ ^ MEMS Microphones ^ ^ |
| | [[adi>en/audiovideo-products/mems-microphones/admp441/products/EVAL-ADMP441Z/eb.html|EVAL-ADMP441Z]] | {{/resources/fpga/xilinx/interposer/admp441.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/admp441|Analog Devices]]\\ \\ The ADMP441 is a high performance, low power, digital output, omnidirectional MEMS microphone with a bottom port. The complete ADMP441 solution consists of a MEMS sensor, signal conditioning, an analog-to-digital converter, antialiasing filters, power management, and an industry standard 24-bit I2S inter-face. The I2S interface allows the ADMP441 to connect directly to digital processors, such as DSPs and microcontrollers, with-out the need for an audio codec in the system. The ADMP441 has a high SNR and high sensitivity, making it an excellent choice for far field applications. The ADMP441 has a flat wideband frequency response, resulting in natural sound with high intelligibility. A built-in particle filter provides high reliability. | [[adi>ADMP441]] | | | [[adi>en/audiovideo-products/mems-microphones/admp441/products/EVAL-ADMP441Z/eb.html|EVAL-ADMP441Z]] | {{/resources/fpga/xilinx/interposer/admp441.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/admp441|Analog Devices]]\\ \\ The ADMP441 is a high performance, low power, digital output, omnidirectional MEMS microphone with a bottom port. The complete ADMP441 solution consists of a MEMS sensor, signal conditioning, an analog-to-digital converter, antialiasing filters, power management, and an industry standard 24-bit I2S inter-face. The I2S interface allows the ADMP441 to connect directly to digital processors, such as DSPs and microcontrollers, with-out the need for an audio codec in the system. The ADMP441 has a high SNR and high sensitivity, making it an excellent choice for far field applications. The ADMP441 has a flat wideband frequency response, resulting in natural sound with high intelligibility. A built-in particle filter provides high reliability. | [[adi>ADMP441]] | |
| ^ ^ PLL Synthesizers / VCOs ^ ^ | ^ ^ PLL Synthesizers / VCOs ^ ^ |
| | [[adi>EVAL-ADF4001SD1Z]] | {{/resources/fpga/xilinx/interposer/img_adf4001.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/adf4001|Analog Devices]]\\ \\ The ADF4001 frequency synthesizer can be used to implement clock sources for PLLs that require very low noise, stable reference signals. It consists of a low-noise digital PFD (Phase Frequency Detector), a precision charge pump, a programmable reference divider, and a programmable 13-bit N counter. In addition, the 14-bit reference counter (R Counter), allows selectable REFIN frequencies at the PFD input. A complete PLL (Phase-Locked Loop) can be implemented if the synthesizer is used with an external loop filter and VCO (Voltage Controlled Oscillator) or VCXO (Voltage Controlled Crystal Oscillator). The N min value of 1 allows flexibility in clock generation. | [[adi>ADF4001]] | | | [[adi>EVAL-ADF4001]] | {{/resources/fpga/xilinx/interposer/img_adf4001.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/adf4001|Analog Devices]]\\ \\ The ADF4001 frequency synthesizer can be used to implement clock sources for PLLs that require very low noise, stable reference signals. It consists of a low-noise digital PFD (Phase Frequency Detector), a precision charge pump, a programmable reference divider, and a programmable 13-bit N counter. In addition, the 14-bit reference counter (R Counter), allows selectable REFIN frequencies at the PFD input. A complete PLL (Phase-Locked Loop) can be implemented if the synthesizer is used with an external loop filter and VCO (Voltage Controlled Oscillator) or VCXO (Voltage Controlled Crystal Oscillator). The N min value of 1 allows flexibility in clock generation. | [[adi>ADF4001]] | |
| | [[adi>EVAL-ADF4002SD1Z]] | {{/resources/fpga/xilinx/interposer/img_adf4001.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/adf4002|Analog Devices]]\\ \\ The ADF4002 frequency synthesizer is used to implement local oscillators in the upconversion and downconversion sections of wireless receivers and transmitters. It consists of a low noise digital phase frequency detector (PFD), a precision charge pump, a programmable reference divider, and programmable N divider. The 14-bit reference counter (R counter) allows selectable REFIN frequencies at the PFD input. A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and voltage controlled oscillator (VCO). In addition, by programming R and N to 1, the part can be used as a standalone PFD and charge pump. | [[adi>ADF4002]] | | | [[adi>EVAL-ADF4002]] | {{/resources/fpga/xilinx/interposer/img_adf4001.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/adf4002|Analog Devices]]\\ \\ The ADF4002 frequency synthesizer is used to implement local oscillators in the upconversion and downconversion sections of wireless receivers and transmitters. It consists of a low noise digital phase frequency detector (PFD), a precision charge pump, a programmable reference divider, and programmable N divider. The 14-bit reference counter (R counter) allows selectable REFIN frequencies at the PFD input. A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and voltage controlled oscillator (VCO). In addition, by programming R and N to 1, the part can be used as a standalone PFD and charge pump. | [[adi>ADF4002]] | |
| | [[adi>EVAL-ADF4106SD1Z]] | {{/resources/fpga/xilinx/interposer/img_adf4106.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/adf4106|Analog Devices]]\\ \\ The ADF4106 frequency synthesizer is used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. It consists of a low noise, digital phase frequency detector (PFD), a precision charge pump, a programmable reference divider, programmable A counter and B counter, and a dual-modulus prescaler (P/P + 1). The A (6-bit) counter and B (13-bit) counter, in conjunction with the dual-modulus prescaler (P/P + 1), implement an N divider (N = BP + A). In addition, the 14-bit reference counter (R Counter) allows selectable REFIN frequencies at the PFD input. A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and voltage controlled oscillator (VCO). Its very high bandwidth means that frequency doublers can be eliminated in many high frequency systems, simplifying system architecture and reducing cost. | [[adi>ADF4106]] | | | [[adi>EVAL-ADF4106]] | {{/resources/fpga/xilinx/interposer/img_adf4106.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/adf4106|Analog Devices]]\\ \\ The ADF4106 frequency synthesizer is used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. It consists of a low noise, digital phase frequency detector (PFD), a precision charge pump, a programmable reference divider, programmable A counter and B counter, and a dual-modulus prescaler (P/P + 1). The A (6-bit) counter and B (13-bit) counter, in conjunction with the dual-modulus prescaler (P/P + 1), implement an N divider (N = BP + A). In addition, the 14-bit reference counter (R Counter) allows selectable REFIN frequencies at the PFD input. A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and voltage controlled oscillator (VCO). Its very high bandwidth means that frequency doublers can be eliminated in many high frequency systems, simplifying system architecture and reducing cost. | [[adi>ADF4106]] | |
| | [[adi>EVAL-ADF4153SD1Z]] | {{/resources/fpga/xilinx/interposer/img_adf4156.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/adf4153|Analog Devices]]\\ \\ The ADF4153 is a fractional-N frequency synthesizer that implements local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. It consists of a low noise digital phase frequency detector (PFD), a precision charge pump, and a programmable reference divider. There is a Σ-Δ based fractional interpolator to allow programmable fractional-N division. The INT, FRAC, and MOD registers define an overall N divider (N = (INT + (FRAC/MOD))). In addition, the 4-bit reference counter (R counter) allows selectable REFIN frequencies at the PFD input. A complete phase- locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and a voltage controlled oscillator (VCO). | [[adi>ADF4153]] | | | [[adi>EVAL-ADF4153]] | {{/resources/fpga/xilinx/interposer/img_adf4156.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/adf4153|Analog Devices]]\\ \\ The ADF4153 is a fractional-N frequency synthesizer that implements local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. It consists of a low noise digital phase frequency detector (PFD), a precision charge pump, and a programmable reference divider. There is a Σ-Δ based fractional interpolator to allow programmable fractional-N division. The INT, FRAC, and MOD registers define an overall N divider (N = (INT + (FRAC/MOD))). In addition, the 4-bit reference counter (R counter) allows selectable REFIN frequencies at the PFD input. A complete phase- locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and a voltage controlled oscillator (VCO). | [[adi>ADF4153]] | |
| | [[adi>EVAL-ADF4156SD1Z]] | {{/resources/fpga/xilinx/interposer/img_adf4156.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/adf4156|Analog Devices]]\\ \\ The ADF4156 is a 6.2 GHz fractional-N frequency synthesizer that implements local oscillators in the upconversion and down-conversion sections of wireless receivers and transmitters. It consists of a low noise digital phase frequency detector (PFD), a precision charge pump, and a programmable reference divider. There is a S-? based fractional interpolator to allow programmable fractional-N division. The INT, FRAC, and MOD registers define an overall N divider (N = (INT + (FRAC/MOD))). The RF output phase is programmable for applications that require a particular phase relationship between the output and the reference. The ADF4156 also features cycle slip reduction circuitry, leading to faster lock times without the need for modifications to the loop filter. | [[adi>ADF4156]] | | | [[adi>EVAL-ADF4156]] | {{/resources/fpga/xilinx/interposer/img_adf4156.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/adf4156|Analog Devices]]\\ \\ The ADF4156 is a 6.2 GHz fractional-N frequency synthesizer that implements local oscillators in the upconversion and down-conversion sections of wireless receivers and transmitters. It consists of a low noise digital phase frequency detector (PFD), a precision charge pump, and a programmable reference divider. There is a S-? based fractional interpolator to allow programmable fractional-N division. The INT, FRAC, and MOD registers define an overall N divider (N = (INT + (FRAC/MOD))). The RF output phase is programmable for applications that require a particular phase relationship between the output and the reference. The ADF4156 also features cycle slip reduction circuitry, leading to faster lock times without the need for modifications to the loop filter. | [[adi>ADF4156]] | |
| | [[adi>EVAL-ADF4157SD1Z]] | {{/resources/fpga/xilinx/interposer/img_adf4156.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/adf4157|Analog Devices]]\\ \\ The ADF4157 is a 6 GHz fractional-N frequency synthesizer with a 25-bit fixed modulus, allowing subhertz frequency resolution at 6 GHz. It consists of a low noise digital phase frequency detector (PFD), a precision charge pump, and a programmable reference divider. There is a S-? based fractional interpolator to allow programmable fractional-N division. The INT and FRAC values define an overall N divider, N = INT + (FRAC/225). The ADF4157 features cycle slip reduction circuitry, which leads to faster lock times without the need for modifications to the loop filter. | [[adi>ADF4157]] | | | [[adi>EVAL-ADF4157]] | {{/resources/fpga/xilinx/interposer/img_adf4156.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/adf4157|Analog Devices]]\\ \\ The ADF4157 is a 6 GHz fractional-N frequency synthesizer with a 25-bit fixed modulus, allowing subhertz frequency resolution at 6 GHz. It consists of a low noise digital phase frequency detector (PFD), a precision charge pump, and a programmable reference divider. There is a S-? based fractional interpolator to allow programmable fractional-N division. The INT and FRAC values define an overall N divider, N = INT + (FRAC/225). The ADF4157 features cycle slip reduction circuitry, which leads to faster lock times without the need for modifications to the loop filter. | [[adi>ADF4157]] | |
| ^ ^ Synchro/Resolver to Digital Converters ^ ^ | ^ ^ Synchro/Resolver to Digital Converters ^ ^ |
| | [[adi>EVAL-AD2S1205]] | {{/resources/fpga/xilinx/interposer/ad2s1205.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad2s1205|Analog Devices]]\\ \\ The AD2S1205 is a complete 12-bit resolution tracking resolver-to-digital converter that contains an on-board programmable sinusoidal oscillator providing sine wave excitation for resolvers. The converter accepts 3.15 V p-p ± 27% input signals on the Sin and Cos inputs. A Type II tracking loop is employed to track the inputs and convert the input Sin and Cos information into a digital representation of the input angle and velocity. The maximum tracking rate is a function of the external clock frequency. The performance of the AD2S105 is specified across a frequency range of 8.192 MHz ± 25%, allowing a maximum tracking rate of 1250 rps. | [[adi>AD2S1205]] | | | [[adi>EVAL-AD2S1205]] | {{/resources/fpga/xilinx/interposer/ad2s1205.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/ad2s1205|Analog Devices]]\\ \\ The AD2S1205 is a complete 12-bit resolution tracking resolver-to-digital converter that contains an on-board programmable sinusoidal oscillator providing sine wave excitation for resolvers. The converter accepts 3.15 V p-p ± 27% input signals on the Sin and Cos inputs. A Type II tracking loop is employed to track the inputs and convert the input Sin and Cos information into a digital representation of the input angle and velocity. The maximum tracking rate is a function of the external clock frequency. The performance of the AD2S105 is specified across a frequency range of 8.192 MHz ± 25%, allowing a maximum tracking rate of 1250 rps. | [[adi>AD2S1205]] | |
| ^ ^ Circuits from the Lab ^ ^ | ^ ^ Circuits from the Lab ^ ^ |
| | [[adi>EVAL-CN0150A-SDPZ]] | {{/resources/fpga/xilinx/interposer/cn0150.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/cn0150|Analog Devices]]\\ \\ This circuit measures RF power at any frequency from 1 MHz to 8 GHz over a range of approximately 60 dB. The measurement result is provided as a digital code at the output of a 12-bit ADC with serial interface and integrated reference. The output of the RF detector has a glueless interface to the ADC and uses most of the ADC’s input range without further adjustment. A simple two-point system calibration is performed in the digital domain. | [[adi>CN0150]] | | | [[adi>EVAL-CN0150A-SDPZ]] | {{/resources/fpga/xilinx/interposer/cn0150.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/cn0150|Analog Devices]]\\ \\ This circuit measures RF power at any frequency from 1 MHz to 8 GHz over a range of approximately 60 dB. The measurement result is provided as a digital code at the output of a 12-bit ADC with serial interface and integrated reference. The output of the RF detector has a glueless interface to the ADC and uses most of the ADC’s input range without further adjustment. A simple two-point system calibration is performed in the digital domain. | [[adi>CN0150]] | |
| | [[adi>EVAL-CN0178-SDPZ]] | {{/resources/fpga/xilinx/interposer/cn0178.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/cn0178|Analog Devices]]\\ \\ This circuit uses the ADL5902 TruPwr™ detector to measure the rms signal strength of RF signals with varying crest factors (peak-to-average ratio) over a dynamic range of approximately 65 dB and operates at frequencies from 50 MHz up to 9 GHz. | [[adi>CN0178]] | | | [[adi>EVAL-CN0178-SDPZ]] | {{/resources/fpga/xilinx/interposer/cn0178.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/cn0178|Analog Devices]]\\ \\ This circuit uses the ADL5902 TruPwr™ detector to measure the rms signal strength of RF signals with varying crest factors (peak-to-average ratio) over a dynamic range of approximately 65 dB and operates at frequencies from 50 MHz up to 9 GHz. | [[adi>CN0178]] | |
| | [[adi>EVAL-CN0187-SDPZ]] | {{/resources/fpga/xilinx/interposer/cn0187.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/cn0187|Analog Devices]]\\ \\ This circuit measures peak and rms power at any RF frequency from 450 MHz to 6 GHz over a range of approximately 45 dB. The measurement results are converted to differential signals in order to eliminate noise and are provided as digital codes at the output of a 12-bit SAR ADC with serial interface and integrated reference. A simple twopoint calibration is performed in the digital domain. | [[adi>CN0187]] | | | [[adi>EVAL-CN0187-SDPZ]] | {{/resources/fpga/xilinx/interposer/cn0187.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/cn0187|Analog Devices]]\\ \\ This circuit measures peak and rms power at any RF frequency from 450 MHz to 6 GHz over a range of approximately 45 dB. The measurement results are converted to differential signals in order to eliminate noise and are provided as digital codes at the output of a 12-bit SAR ADC with serial interface and integrated reference. A simple twopoint calibration is performed in the digital domain. | [[adi>CN0187]] | |
| | [[adi>EVAL-CN0188-SDPZ]] | {{/resources/fpga/xilinx/interposer/cn0188.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/cn0188|Analog Devices]]\\ \\ This circuit monitors current in individual channels of -48 V to better than 1% accuracy. The load current passes through a shunt resistor, which is external to the circuit. The shunt resistor value is chosen so that the shunt voltage is approximately 50 mV at maximum load current. | [[adi>CN0188]] | | | [[adi>EVAL-CN0188-SDPZ]] | {{/resources/fpga/xilinx/interposer/cn0188.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/cn0188|Analog Devices]]\\ \\ This circuit monitors current in individual channels of -48 V to better than 1% accuracy. The load current passes through a shunt resistor, which is external to the circuit. The shunt resistor value is chosen so that the shunt voltage is approximately 50 mV at maximum load current. | [[adi>CN0188]] | |
| | [[adi>EVAL-CN0189-SDPZ]] | {{/resources/fpga/xilinx/interposer/cn0189.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/cn0189|Analog Devices]]\\ \\ The CN-0189 circuit incorporates a dual axis ADXL203 accelerometer and the AD7887 12-bit successive approximation (SAR) ADC to create a dual axis tilt measurement system. | [[adi>CN0189]] | | | [[adi>EVAL-CN0189-SDPZ]] | {{/resources/fpga/xilinx/interposer/cn0189.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/cn0189|Analog Devices]]\\ \\ The CN-0189 circuit incorporates a dual axis ADXL203 accelerometer and the AD7887 12-bit successive approximation (SAR) ADC to create a dual axis tilt measurement system. | [[adi>CN0189]] | |
| | [[adi>EVAL-CN0194-SDPZ]] | {{/resources/fpga/xilinx/interposer/cn0194.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/cn0194|Analog Devices]]\\ \\ This circuit provides galvanic isolation for high speed, high accuracy, simultaneous sampling analog-todigital conversion applications. The 16-bit AD7685 PulSAR ADC is versatile and allows monitoring of multiple channels through daisy chaining. An input circuit based on the AD8615 op amp level shifts, attenuates, and buffers a ±10 V industrial signal to match the input requirements of the ADC. The flexible circuit includes a precision ADR391 reference and two quadchannel ADuM1402 digital isolators to provide a compact and cost effective solution to a popular industrial data acquisition application. | [[adi>CN0194]] | | | [[adi>EVAL-CN0194-SDPZ]] | {{/resources/fpga/xilinx/interposer/cn0194.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/cn0194|Analog Devices]]\\ \\ This circuit provides galvanic isolation for high speed, high accuracy, simultaneous sampling analog-todigital conversion applications. The 16-bit AD7685 PulSAR ADC is versatile and allows monitoring of multiple channels through daisy chaining. An input circuit based on the AD8615 op amp level shifts, attenuates, and buffers a ±10 V industrial signal to match the input requirements of the ADC. The flexible circuit includes a precision ADR391 reference and two quadchannel ADuM1402 digital isolators to provide a compact and cost effective solution to a popular industrial data acquisition application. | [[adi>CN0194]] | |
| | [[adi>EVAL-CN0202-SDPZ]] | {{/resources/fpga/xilinx/interposer/cn0202.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/cn0202|Analog Devices]]\\ \\ This circuit provides a full function, high voltage (up to 44 V), flexible, programmable analog output solution that meets most requirements for programmable logic controller (PLC) and distributed control system (DCS) applications. | [[adi>CN0202]] | | | [[adi>EVAL-CN0202-SDPZ]] | {{/resources/fpga/xilinx/interposer/cn0202.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/cn0202|Analog Devices]]\\ \\ This circuit provides a full function, high voltage (up to 44 V), flexible, programmable analog output solution that meets most requirements for programmable logic controller (PLC) and distributed control system (DCS) applications. | [[adi>CN0202]] | |
| | [[adi>EVAL-CN0203-SDPZ]] | {{/resources/fpga/xilinx/interposer/cn0203.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/cn0203|Analog Devices]]\\ \\ This circuit provides a full function, high voltage (up to 44 V), flexible, programmable analog output solution that meets most requirements for programmable logic controller (PLC) and distributed control system (DCS) applications. | [[adi>CN0203]] | | | [[adi>EVAL-CN0203-SDPZ]] | {{/resources/fpga/xilinx/interposer/cn0203.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/cn0203|Analog Devices]]\\ \\ This circuit provides a full function, high voltage (up to 44 V), flexible, programmable analog output solution that meets most requirements for programmable logic controller (PLC) and distributed control system (DCS) applications. | [[adi>CN0203]] | |
| | [[adi>EVAL-CN0204-SDPZ]] | {{/resources/fpga/xilinx/interposer/cn0204.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/cn0204|Analog Devices]]\\ \\ This circuit provides a full function, high voltage (up to 44 V), flexible, programmable analog output solution that meets most requirements for programmable logic controller (PLC) and distributed control system (DCS). | [[adi>CN0204]] | | | [[adi>EVAL-CN0204-SDPZ]] | {{/resources/fpga/xilinx/interposer/cn0204.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/cn0204|Analog Devices]]\\ \\ This circuit provides a full function, high voltage (up to 44 V), flexible, programmable analog output solution that meets most requirements for programmable logic controller (PLC) and distributed control system (DCS). | [[adi>CN0204]] | |
| | [[adi>EVAL-CN0209-SDPZ]] | {{/resources/fpga/xilinx/interposer/cn0209.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/cn0209|Analog Devices]]\\ \\ This circuit provides a fully programmable universal analog front end (AFE) for process control applications. The following inputs are supported: 2-, 3-, and 4- wire RTD configurations, thermocouple inputs with cold junction compensation, unipolar and bipolar input voltages, and 4 mA-to-20 mA inputs. | [[adi>CN0209]] | | | [[adi>EVAL-CN0209-SDPZ]] | {{/resources/fpga/xilinx/interposer/cn0209.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/cn0209|Analog Devices]]\\ \\ This circuit provides a fully programmable universal analog front end (AFE) for process control applications. The following inputs are supported: 2-, 3-, and 4- wire RTD configurations, thermocouple inputs with cold junction compensation, unipolar and bipolar input voltages, and 4 mA-to-20 mA inputs. | [[adi>CN0209]] | |
| | [[adi>EVAL-CN0216-SDPZ]] | {{/resources/fpga/xilinx/interposer/cn0216.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/cn0216|Analog Devices]]\\ \\ This circuit is a precision weigh scale signal conditioning system. It uses the AD7791, a low power buffered 24-bit sigma-delta ADC along with two external ADA4528-1 zero-drift amplifiers. This solution allows for high dc gain with a single supply. | [[adi>CN0216]] | | | [[adi>EVAL-CN0216-SDPZ]] | {{/resources/fpga/xilinx/interposer/cn0216.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/cn0216|Analog Devices]]\\ \\ This circuit is a precision weigh scale signal conditioning system. It uses the AD7791, a low power buffered 24-bit sigma-delta ADC along with two external ADA4528-1 zero-drift amplifiers. This solution allows for high dc gain with a single supply. | [[adi>CN0216]] | |
| | [[adi>EVAL-CN0218-SDPZ]] | {{/resources/fpga/xilinx/interposer/cn0218.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/cn0218|Analog Devices]]\\ \\ This circuit monitors current in systems with high positive common-mode dc voltages of up to +500 V with less than 0.2% error. The load current passes through a shunt resistor, which is external to the circuit. The shunt resistor value is chosen so that the shunt voltage is approximately 500 mV at maximum load current. | [[adi>CN0218]] | | | [[adi>EVAL-CN0218-SDPZ]] | {{/resources/fpga/xilinx/interposer/cn0218.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/cn0218|Analog Devices]]\\ \\ This circuit monitors current in systems with high positive common-mode dc voltages of up to +500 V with less than 0.2% error. The load current passes through a shunt resistor, which is external to the circuit. The shunt resistor value is chosen so that the shunt voltage is approximately 500 mV at maximum load current. | [[adi>CN0218]] | |
| | [[adi>EVAL-CN0235-SDPZ]] | {{/resources/fpga/xilinx/interposer/cn0235.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/cn0235|Analog Devices]]\\ \\ This board is a fully isolated lithium ion battery monitoring and protection system. Lithium ion (Li-Ion) battery stacks contain a large number of individual cells that must be monitored correctly in order to enhance the battery efficiency, prolong the battery life, and ensure safety. | [[adi>CN0235]] | | | [[adi>EVAL-CN0235-SDPZ]] | {{/resources/fpga/xilinx/interposer/cn0235.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/cn0235|Analog Devices]]\\ \\ This board is a fully isolated lithium ion battery monitoring and protection system. Lithium ion (Li-Ion) battery stacks contain a large number of individual cells that must be monitored correctly in order to enhance the battery efficiency, prolong the battery life, and ensure safety. | [[adi>CN0235]] | |
| | [[adi>EVAL-CN0240-SDPZ]] | {{/resources/fpga/xilinx/interposer/cn0240.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/cn0240|Analog Devices]]\\ \\ The circuit from the EVAL-CN0240-SDPZ board monitors bidirectional current from sources with dc voltages of up to ±270V with less than 1% linearity error. The load current passes through a shunt resistor, which is external to the circuit. The shunt resistor value is chosen so that the shunt voltage is approximately 100 mV at maximum load current. | [[adi>CN0240]] | | | [[adi>EVAL-CN0240-SDPZ]] | {{/resources/fpga/xilinx/interposer/cn0240.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/cn0240|Analog Devices]]\\ \\ The circuit from the EVAL-CN0240-SDPZ board monitors bidirectional current from sources with dc voltages of up to ±270V with less than 1% linearity error. The load current passes through a shunt resistor, which is external to the circuit. The shunt resistor value is chosen so that the shunt voltage is approximately 100 mV at maximum load current. | [[adi>CN0240]] | |
| | [[adi>EVAL-CN0241-SDPZ]] | {{/resources/fpga/xilinx/interposer/cn0241.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/cn0241|Analog Devices]]\\ \\ The circuit from this board is a classic high-side current sensing circuit topology with a single sense resistor. High-side current monitors are likely to encounter overvoltage conditions from transients or when the monitoring circuits are connected, disconnected, or powered down. | [[adi>CN0241]] | | | [[adi>EVAL-CN0241-SDPZ]] | {{/resources/fpga/xilinx/interposer/cn0241.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/cn0241|Analog Devices]]\\ \\ The circuit from this board is a classic high-side current sensing circuit topology with a single sense resistor. High-side current monitors are likely to encounter overvoltage conditions from transients or when the monitoring circuits are connected, disconnected, or powered down. | [[adi>CN0241]] | |
| | [[adi>EVAL-CN0271-SDPZ]] | {{/resources/fpga/xilinx/interposer/cn0271.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/cn0271|Analog Devices]]\\ \\ The circuit from this board is a complete thermocouple signal conditioning circuit with cold junction compensation followed by a 16-bit sigma-delta (S-?) analog-to-digital converter (ADC). | [[adi>CN0271]] | | | [[adi>EVAL-CN0271-SDPZ]] | {{/resources/fpga/xilinx/interposer/cn0271.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/cn0271|Analog Devices]]\\ \\ The circuit from this board is a complete thermocouple signal conditioning circuit with cold junction compensation followed by a 16-bit sigma-delta (S-?) analog-to-digital converter (ADC). | [[adi>CN0271]] | |
| ^ ^ FMC-SDP Interposer Testing ^ ^ | ^ ^ FMC-SDP Interposer Testing ^ ^ |
| | [[adi>en/evaluation/eval-sdp-i-fmc/eb.html|SDP-FMC-IB1Z]] | {{/resources/fpga/xilinx/interposer/sdp_brkout.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/brkout|Analog Devices]]\\ \\ This project presents the steps to setup an environment for testing the FMC-SDP Interposer Board together with the ADZS-BRKOUT-EX3 SDP breakout board, the Xilinx KC705 FPGA board and the Xilinx Embedded Development Kit (EDK). | FMC-SDP Interposer, ADZS-BRKOUT-EX3 SDP breakout board | | | [[adi>en/evaluation/eval-sdp-i-fmc/eb.html|SDP-FMC-IB1Z]] | {{/resources/fpga/xilinx/interposer/sdp_brkout.jpg?150 }} **Reference Design:** [[resources/fpga/xilinx/interposer/brkout|Analog Devices]]\\ \\ This project presents the steps to setup an environment for testing the FMC-SDP Interposer Board together with the ADZS-BRKOUT-EX3 SDP breakout board, the Xilinx KC705 FPGA board and the Xilinx Embedded Development Kit (EDK). | FMC-SDP Interposer, ADZS-BRKOUT-EX3 SDP breakout board | |
