| Project Status (05/22/2013 - 10:44:56) | |||
| Project File: | system.xmp | Implementation State: | Programming File Generated |
| Module Name: | system |
|
No Errors |
| Product Version: | EDK 14.5 |
|
197 Warnings (0 new) |
| XPS Reports | [-] | ||||
| Report Name | Generated | Errors | Warnings | Infos | |
| Platgen Log File | Tue May 21 16:52:55 2013 | 0 | 17 Warnings (0 new) | 27 Infos (0 new) | |
| Simgen Log File | |||||
| BitInit Log File | Wed May 15 14:41:28 2013 | ||||
| System Log File | Tue May 21 17:45:57 2013 | ||||
| XPS Synthesis Summary (estimated values) | [-] | |||||
| Report | Generated | Flip Flops Used | LUTs Used | BRAMS Used | Errors | |
| system | Tue May 21 16:53:17 2013 | 5404 | 5790 | 17 | 0 | |
| system_adc_reader_0_wrapper | Tue May 21 16:52:50 2013 | 253 | 355 | 0 | ||
| system_clock_generator_0_wrapper | Tue May 21 16:52:41 2013 | 0 | ||||
| system_axi_dma_0_wrapper | Mon May 20 15:20:43 2013 | 1801 | 1422 | 1 | 0 | |
| system_leds_wrapper | Mon May 20 15:16:40 2013 | 32 | 44 | 0 | ||
| system_axi_s6_ddrx_0_wrapper | Mon May 20 15:16:31 2013 | 445 | 822 | 0 | ||
| system_axi4_0_wrapper | Mon May 20 15:16:13 2013 | 452 | 605 | 2 | 0 | |
| system_axi4lite_0_wrapper | Mon May 20 15:13:09 2013 | 121 | 248 | 0 | ||
| system_debug_module_wrapper | Mon May 20 15:12:51 2013 | 131 | 142 | 0 | ||
| system_microblaze_0_wrapper | Mon May 20 15:12:34 2013 | 2094 | 2085 | 10 | 0 | |
| system_microblaze_0_bram_block_wrapper | Mon May 20 15:11:48 2013 | 4 | 0 | |||
| system_microblaze_0_d_bram_ctrl_wrapper | Mon May 20 15:11:42 2013 | 2 | 6 | 0 | ||
| system_microblaze_0_dlmb_wrapper | Mon May 20 15:11:36 2013 | 1 | 0 | |||
| system_microblaze_0_i_bram_ctrl_wrapper | Mon May 20 15:11:31 2013 | 2 | 6 | 0 | ||
| system_microblaze_0_ilmb_wrapper | Mon May 20 15:11:25 2013 | 1 | 0 | |||
| system_proc_sys_reset_0_wrapper | Mon May 20 15:11:19 2013 | 69 | 55 | 0 | ||
| Device Utilization Summary (actual values) | [-] | ||||
| Slice Logic Utilization | Used | Available | Utilization | Note(s) | |
| Number of Slice Registers | 4,335 | 30,064 | 14% | ||
| Number used as Flip Flops | 4,307 | ||||
| Number used as Latches | 18 | ||||
| Number used as Latch-thrus | 0 | ||||
| Number used as AND/OR logics | 10 | ||||
| Number of Slice LUTs | 4,647 | 15,032 | 30% | ||
| Number used as logic | 4,135 | 15,032 | 27% | ||
| Number using O6 output only | 3,124 | ||||
| Number using O5 output only | 98 | ||||
| Number using O5 and O6 | 913 | ||||
| Number used as ROM | 0 | ||||
| Number used as Memory | 395 | 3,664 | 10% | ||
| Number used as Dual Port RAM | 216 | ||||
| Number using O6 output only | 124 | ||||
| Number using O5 output only | 2 | ||||
| Number using O5 and O6 | 90 | ||||
| Number used as Single Port RAM | 0 | ||||
| Number used as Shift Register | 179 | ||||
| Number using O6 output only | 62 | ||||
| Number using O5 output only | 1 | ||||
| Number using O5 and O6 | 116 | ||||
| Number used exclusively as route-thrus | 117 | ||||
| Number with same-slice register load | 67 | ||||
| Number with same-slice carry load | 44 | ||||
| Number with other load | 6 | ||||
| Number of occupied Slices | 2,174 | 3,758 | 57% | ||
| Number of MUXCYs used | 672 | 7,516 | 8% | ||
| Number of LUT Flip Flop pairs used | 6,095 | ||||
| Number with an unused Flip Flop | 2,107 | 6,095 | 34% | ||
| Number with an unused LUT | 1,448 | 6,095 | 23% | ||
| Number of fully used LUT-FF pairs | 2,540 | 6,095 | 41% | ||
| Number of unique control sets | 324 | ||||
| Number of slice register sites lost to control set restrictions |
1,282 | 30,064 | 4% | ||
| Number of bonded IOBs | 61 | 266 | 22% | ||
| Number of LOCed IOBs | 61 | 61 | 100% | ||
| IOB Flip Flops | 3 | ||||
| IOB Master Pads | 2 | ||||
| IOB Slave Pads | 2 | ||||
| Number of RAMB16BWERs | 15 | 52 | 28% | ||
| Number of RAMB8BWERs | 3 | 104 | 2% | ||
| Number of BUFIO2/BUFIO2_2CLKs | 1 | 32 | 3% | ||
| Number used as BUFIO2s | 1 | ||||
| Number used as BUFIO2_2CLKs | 0 | ||||
| Number of BUFIO2FB/BUFIO2FB_2CLKs | 0 | 32 | 0% | ||
| Number of BUFG/BUFGMUXs | 3 | 16 | 18% | ||
| Number used as BUFGs | 3 | ||||
| Number used as BUFGMUX | 0 | ||||
| Number of DCM/DCM_CLKGENs | 0 | 4 | 0% | ||
| Number of ILOGIC2/ISERDES2s | 2 | 272 | 1% | ||
| Number used as ILOGIC2s | 2 | ||||
| Number used as ISERDES2s | 0 | ||||
| Number of IODELAY2/IODRP2/IODRP2_MCBs | 24 | 272 | 8% | ||
| Number used as IODELAY2s | 0 | ||||
| Number used as IODRP2s | 2 | ||||
| Number used as IODRP2_MCBs | 22 | ||||
| Number of OLOGIC2/OSERDES2s | 44 | 272 | 16% | ||
| Number used as OLOGIC2s | 1 | ||||
| Number used as OSERDES2s | 43 | ||||
| Number of BSCANs | 1 | 4 | 25% | ||
| Number of BUFHs | 0 | 160 | 0% | ||
| Number of BUFPLLs | 0 | 8 | 0% | ||
| Number of BUFPLL_MCBs | 1 | 4 | 25% | ||
| Number of DSP48A1s | 3 | 38 | 7% | ||
| Number of ICAPs | 0 | 1 | 0% | ||
| Number of MCBs | 1 | 2 | 50% | ||
| Number of PCILOGICSEs | 0 | 2 | 0% | ||
| Number of PLL_ADVs | 1 | 2 | 50% | ||
| Number of PMVs | 0 | 1 | 0% | ||
| Number of STARTUPs | 0 | 1 | 0% | ||
| Number of SUSPEND_SYNCs | 0 | 1 | 0% | ||
| Average Fanout of Non-Clock Nets | 3.86 | ||||
| Performance Summary | [-] | |||
| Final Timing Score: | 0 (Setup: 0, Hold: 0, Component Switching Limit: 0) | Pinout Data: | Pinout Report | |
| Routing Results: | All Signals Completely Routed | Clock Data: | Clock Report | |
| Timing Constraints: | All Constraints Met | |||
| Detailed Reports | [-] | |||||
| Report Name | Status | Generated | Errors | Warnings | Infos | |
| Translation Report | Current | Tue May 21 16:54:12 2013 | 0 | 31 Warnings (0 new) | 4 Infos (0 new) | |
| Map Report | Current | Tue May 21 16:56:19 2013 | 0 | 57 Warnings (0 new) | 712 Infos (0 new) | |
| Place and Route Report | Current | Tue May 21 16:57:42 2013 | 0 | 55 Warnings (0 new) | 2 Infos (0 new) | |
| Post-PAR Static Timing Report | Current | Tue May 21 16:57:55 2013 | 0 | 1 Warning (0 new) | 4 Infos (0 new) | |
| Bitgen Report | Current | Tue May 21 16:58:22 2013 | 0 | 53 Warnings (0 new) | 1 Info (0 new) | |
| Secondary Reports | [-] | ||
| Report Name | Status | Generated | |
| WebTalk Log File | Current | Tue May 21 16:58:22 2013 | |