uC uC
1.0
2012.08.14.17:02:38 Generation Report
Output Directory D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/
Files D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/uC.v (614711 bytes VERILOG)

D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_pll.v (10361 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_onchip_mem.hex (21517 bytes HEX)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_onchip_mem.v (3881 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_leds.v (2132 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_ucprobe_uart.v (23501 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_ucprobe_uart_input_mutex.dat (3 bytes OTHER)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_ucprobe_uart_input_stream.dat (10 bytes OTHER)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_ucprobe_uart_output_stream.dat (0 bytes OTHER)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_sys_timer.v (6878 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_mm_console_master.v (15640 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_avalon_st_jtag_interface.v (2357 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_jtag_dc_streaming.v (7339 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_jtag_sld_node.v (5844 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_jtag_streaming.v (23657 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_pli_streaming.v (2285 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_avalon_st_clock_crosser.v (4900 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_avalon_st_pipeline_base.v (4716 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_avalon_st_idle_remover.v (1891 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_avalon_st_idle_inserter.v (2037 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_avalon_st_jtag_interface.sdc (140 bytes SDC)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_mm_console_master_timing_adt.v (1795 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_avalon_sc_fifo.v (32198 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_avalon_st_bytes_to_packets.v (4919 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_avalon_st_packets_to_bytes.v (7863 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_avalon_packets_to_master.v (51852 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_mm_console_master_b2p_adapter.v (1522 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_mm_console_master_p2b_adapter.v (1358 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_pwr_data.v (3324 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_i2c_int.v (2358 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_pwr_en_clk.v (2197 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_cpu.sdc (3407 bytes SDC)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_cpu.v (190093 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_cpu_jtag_debug_module_sysclk.v (6895 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_cpu_jtag_debug_module_tck.v (8109 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_cpu_jtag_debug_module_wrapper.v (9839 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_cpu_ociram_default_contents.mif (5878 bytes MIF)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_cpu_oci_test_bench.v (1426 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_cpu_rf_ram_a.mif (600 bytes MIF)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_cpu_rf_ram_b.mif (600 bytes MIF)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_cpu_test_bench.v (29784 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_sysid.v (1441 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_tri_state_bridge_0_bridge_0.sv (5451 bytes SYSTEM_VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_tri_state_bridge_0_pinSharer_0.v (4701 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_tri_state_bridge_0_pinSharer_0_pin_sharer.sv (4027 bytes SYSTEM_VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_merlin_std_arbitrator_core.sv (8985 bytes SYSTEM_VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_tri_state_bridge_0_pinSharer_0_arbiter.sv (2863 bytes SYSTEM_VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_sram.v (28074 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_tristate_controller_translator.sv (7075 bytes SYSTEM_VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_merlin_slave_translator.sv (15976 bytes SYSTEM_VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_tristate_controller_aggregator.sv (9358 bytes SYSTEM_VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/write_master.v (5448 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/Eval_Board_interface.v (15606 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/AD7689_Avalon_core.v (20599 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_merlin_master_translator.sv (16415 bytes SYSTEM_VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_merlin_master_agent.sv (8662 bytes SYSTEM_VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_merlin_slave_agent.sv (17560 bytes SYSTEM_VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_merlin_burst_uncompressor.sv (10392 bytes SYSTEM_VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_addr_router.sv (6577 bytes SYSTEM_VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_addr_router_001.sv (9189 bytes SYSTEM_VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_addr_router_002.sv (6334 bytes SYSTEM_VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_addr_router_003.sv (5989 bytes SYSTEM_VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_id_router.sv (5883 bytes SYSTEM_VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_id_router_001.sv (5978 bytes SYSTEM_VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_id_router_002.sv (6063 bytes SYSTEM_VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_id_router_003.sv (5814 bytes SYSTEM_VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_merlin_traffic_limiter.sv (13743 bytes SYSTEM_VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_merlin_burst_adapter.sv (36989 bytes SYSTEM_VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_reset_controller.v (3592 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_reset_synchronizer.v (3564 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_reset_controller.sdc (1179 bytes SDC)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_cmd_xbar_demux.sv (4743 bytes SYSTEM_VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_cmd_xbar_demux_001.sv (11168 bytes SYSTEM_VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_cmd_xbar_demux_002.sv (4114 bytes SYSTEM_VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_cmd_xbar_demux_003.sv (3477 bytes SYSTEM_VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_merlin_arbitrator.sv (9448 bytes SYSTEM_VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_cmd_xbar_mux.sv (12236 bytes SYSTEM_VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_cmd_xbar_mux_001.sv (13093 bytes SYSTEM_VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_cmd_xbar_mux_002.sv (13942 bytes SYSTEM_VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_rsp_xbar_demux.sv (4098 bytes SYSTEM_VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_rsp_xbar_demux_001.sv (4740 bytes SYSTEM_VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_rsp_xbar_demux_002.sv (5374 bytes SYSTEM_VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_rsp_xbar_demux_003.sv (3472 bytes SYSTEM_VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_rsp_xbar_mux.sv (13051 bytes SYSTEM_VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_rsp_xbar_mux_001.sv (21635 bytes SYSTEM_VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_rsp_xbar_mux_002.sv (12210 bytes SYSTEM_VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_merlin_width_adapter.sv (36187 bytes SYSTEM_VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_avalon_st_handshake_clock_crosser.v (7493 bytes VERILOG)
D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/uC_irq_mapper.sv (1903 bytes SYSTEM_VERILOG)
Instantiations
uC
uC v1.0
uC_pll as pll
uC_onchip_mem as onchip_mem
uC_leds as leds
uC_ucprobe_uart as ucprobe_uart, jtag_uart_0
uC_sys_timer as sys_timer
uC_mm_console_master as mm_console_master
uC_pwr_data as pwr_data
uC_i2c_int as i2c_int
uC_pwr_en_clk as pwr_en_clk
uC_cpu as cpu
uC_sysid as sysid
uC_tri_state_bridge_0_bridge_0 as tri_state_bridge_0_bridge_0
uC_tri_state_bridge_0_pinSharer_0 as tri_state_bridge_0_pinSharer_0
uC_sram as sram
AD7689_Avalon_core as AD7689_0
altera_merlin_master_translator as cpu_instruction_master_translator, cpu_data_master_translator, mm_console_master_master_translator, AD7689_0_avalon_master_translator
altera_merlin_slave_translator as cpu_jtag_debug_module_translator, onchip_mem_s1_translator, sram_uas_translator, pll_pll_slave_translator, leds_s1_translator, sysid_control_slave_translator, ucprobe_uart_avalon_jtag_slave_translator, jtag_uart_0_avalon_jtag_slave_translator, sys_timer_s1_translator, pwr_data_s1_translator, i2c_int_s1_translator, pwr_en_clk_s1_translator, AD7689_0_avalon_translator
altera_merlin_master_agent as cpu_instruction_master_translator_avalon_universal_master_0_agent, cpu_data_master_translator_avalon_universal_master_0_agent, mm_console_master_master_translator_avalon_universal_master_0_agent, AD7689_0_avalon_master_translator_avalon_universal_master_0_agent
altera_merlin_slave_agent as cpu_jtag_debug_module_translator_avalon_universal_slave_0_agent, onchip_mem_s1_translator_avalon_universal_slave_0_agent, sram_uas_translator_avalon_universal_slave_0_agent, pll_pll_slave_translator_avalon_universal_slave_0_agent, leds_s1_translator_avalon_universal_slave_0_agent, sysid_control_slave_translator_avalon_universal_slave_0_agent, ucprobe_uart_avalon_jtag_slave_translator_avalon_universal_slave_0_agent, jtag_uart_0_avalon_jtag_slave_translator_avalon_universal_slave_0_agent, sys_timer_s1_translator_avalon_universal_slave_0_agent, pwr_data_s1_translator_avalon_universal_slave_0_agent, i2c_int_s1_translator_avalon_universal_slave_0_agent, pwr_en_clk_s1_translator_avalon_universal_slave_0_agent, AD7689_0_avalon_translator_avalon_universal_slave_0_agent
altera_avalon_sc_fifo as cpu_jtag_debug_module_translator_avalon_universal_slave_0_agent_rsp_fifo, onchip_mem_s1_translator_avalon_universal_slave_0_agent_rsp_fifo, sram_uas_translator_avalon_universal_slave_0_agent_rsp_fifo, pll_pll_slave_translator_avalon_universal_slave_0_agent_rsp_fifo, pll_pll_slave_translator_avalon_universal_slave_0_agent_rdata_fifo, leds_s1_translator_avalon_universal_slave_0_agent_rsp_fifo, sysid_control_slave_translator_avalon_universal_slave_0_agent_rsp_fifo, ucprobe_uart_avalon_jtag_slave_translator_avalon_universal_slave_0_agent_rsp_fifo, jtag_uart_0_avalon_jtag_slave_translator_avalon_universal_slave_0_agent_rsp_fifo, sys_timer_s1_translator_avalon_universal_slave_0_agent_rsp_fifo, pwr_data_s1_translator_avalon_universal_slave_0_agent_rsp_fifo, i2c_int_s1_translator_avalon_universal_slave_0_agent_rsp_fifo, pwr_en_clk_s1_translator_avalon_universal_slave_0_agent_rsp_fifo, AD7689_0_avalon_translator_avalon_universal_slave_0_agent_rsp_fifo
uC_addr_router as addr_router
uC_addr_router_001 as addr_router_001
uC_addr_router_002 as addr_router_002
uC_addr_router_003 as addr_router_003
uC_id_router as id_router
uC_id_router_001 as id_router_001
uC_id_router_002 as id_router_002
uC_id_router_003 as id_router_003, id_router_004, id_router_005, id_router_006, id_router_007, id_router_008, id_router_009, id_router_010, id_router_011, id_router_012
altera_merlin_traffic_limiter as limiter, limiter_001, limiter_002, limiter_003
altera_merlin_burst_adapter as burst_adapter
altera_reset_controller as rst_controller, rst_controller_001
uC_cmd_xbar_demux as cmd_xbar_demux
uC_cmd_xbar_demux_001 as cmd_xbar_demux_001
uC_cmd_xbar_demux_002 as cmd_xbar_demux_002
uC_cmd_xbar_demux_003 as cmd_xbar_demux_003
uC_cmd_xbar_mux as cmd_xbar_mux
uC_cmd_xbar_mux_001 as cmd_xbar_mux_001
uC_cmd_xbar_mux_002 as cmd_xbar_mux_002
uC_rsp_xbar_demux as rsp_xbar_demux
uC_rsp_xbar_demux_001 as rsp_xbar_demux_001
uC_rsp_xbar_demux_002 as rsp_xbar_demux_002
uC_rsp_xbar_demux_003 as rsp_xbar_demux_003, rsp_xbar_demux_004, rsp_xbar_demux_005, rsp_xbar_demux_006, rsp_xbar_demux_007, rsp_xbar_demux_008, rsp_xbar_demux_009, rsp_xbar_demux_010, rsp_xbar_demux_011, rsp_xbar_demux_012
uC_rsp_xbar_mux as rsp_xbar_mux
uC_rsp_xbar_mux_001 as rsp_xbar_mux_001
uC_rsp_xbar_mux_002 as rsp_xbar_mux_002
altera_merlin_width_adapter as width_adapter, width_adapter_001, width_adapter_002, width_adapter_003, width_adapter_004, width_adapter_005
altera_avalon_st_handshake_clock_crosser as crosser, crosser_001
uC_irq_mapper as irq_mapper
uC_pll
altpll v11.0
uC_onchip_mem
altera_avalon_onchip_memory2 v11.0
uC_leds
altera_avalon_pio v11.0
uC_ucprobe_uart
altera_avalon_jtag_uart v11.0
uC_sys_timer
altera_avalon_timer v11.0
uC_mm_console_master
altera_jtag_avalon_master v11.0
altera_avalon_st_jtag_interface as jtag_phy_embedded_in_jtag_master
uC_mm_console_master_timing_adt as timing_adt
altera_avalon_sc_fifo as fifo
altera_avalon_st_bytes_to_packets as b2p
altera_avalon_st_packets_to_bytes as p2b
altera_avalon_packets_to_master as transacto
uC_mm_console_master_b2p_adapter as b2p_adapter
uC_mm_console_master_p2b_adapter as p2b_adapter
uC_pwr_data
altera_avalon_pio v11.0
uC_i2c_int
altera_avalon_pio v11.0
uC_pwr_en_clk
altera_avalon_pio v11.0
uC_cpu
altera_nios2_qsys v11.0
uC_sysid
altera_avalon_sysid_qsys v11.0
uC_tri_state_bridge_0_bridge_0
altera_tristate_conduit_bridge v11.0
uC_tri_state_bridge_0_pinSharer_0
altera_tristate_conduit_pin_sharer v11.0
uC_tri_state_bridge_0_pinSharer_0_pin_sharer as pin_sharer
uC_tri_state_bridge_0_pinSharer_0_arbiter as arbiter
uC_sram
altera_generic_tristate_controller v11.0
altera_tristate_controller_translator as tdt
altera_merlin_slave_translator as slave_translator
altera_tristate_controller_aggregator as tda
AD7689_Avalon_core
AD7689_Avalon_core v1.0
altera_merlin_master_translator
altera_merlin_master_translator v11.0
altera_merlin_slave_translator
altera_merlin_slave_translator v11.0
altera_merlin_master_agent
altera_merlin_master_agent v11.0
altera_merlin_slave_agent
altera_merlin_slave_agent v11.0
altera_avalon_sc_fifo
altera_avalon_sc_fifo v11.0
uC_addr_router
altera_merlin_router v11.0
uC_addr_router_001
altera_merlin_router v11.0
uC_addr_router_002
altera_merlin_router v11.0
uC_addr_router_003
altera_merlin_router v11.0
uC_id_router
altera_merlin_router v11.0
uC_id_router_001
altera_merlin_router v11.0
uC_id_router_002
altera_merlin_router v11.0
uC_id_router_003
altera_merlin_router v11.0
altera_merlin_traffic_limiter
altera_merlin_traffic_limiter v11.0
altera_merlin_burst_adapter
altera_merlin_burst_adapter v11.0
altera_reset_controller
altera_reset_controller v11.0
uC_cmd_xbar_demux
altera_merlin_demultiplexer v11.0
uC_cmd_xbar_demux_001
altera_merlin_demultiplexer v11.0
uC_cmd_xbar_demux_002
altera_merlin_demultiplexer v11.0
uC_cmd_xbar_demux_003
altera_merlin_demultiplexer v11.0
uC_cmd_xbar_mux
altera_merlin_multiplexer v11.0
uC_cmd_xbar_mux_001
altera_merlin_multiplexer v11.0
uC_cmd_xbar_mux_002
altera_merlin_multiplexer v11.0
uC_rsp_xbar_demux
altera_merlin_demultiplexer v11.0
uC_rsp_xbar_demux_001
altera_merlin_demultiplexer v11.0
uC_rsp_xbar_demux_002
altera_merlin_demultiplexer v11.0
uC_rsp_xbar_demux_003
altera_merlin_demultiplexer v11.0
uC_rsp_xbar_mux
altera_merlin_multiplexer v11.0
uC_rsp_xbar_mux_001
altera_merlin_multiplexer v11.0
uC_rsp_xbar_mux_002
altera_merlin_multiplexer v11.0
altera_merlin_width_adapter
altera_merlin_width_adapter v11.0
altera_avalon_st_handshake_clock_crosser
altera_avalon_st_handshake_clock_crosser v11.0
uC_irq_mapper
altera_irq_mapper v11.0
altera_avalon_st_jtag_interface
altera_jtag_dc_streaming v11.0
uC_mm_console_master_timing_adt
timing_adapter v11.0
altera_avalon_st_bytes_to_packets
altera_avalon_st_bytes_to_packets v11.0
altera_avalon_st_packets_to_bytes
altera_avalon_st_packets_to_bytes v11.0
altera_avalon_packets_to_master
altera_avalon_packets_to_master v11.0
uC_mm_console_master_b2p_adapter
channel_adapter v11.0
uC_mm_console_master_p2b_adapter
channel_adapter v11.0
uC_tri_state_bridge_0_pinSharer_0_pin_sharer
altera_tristate_conduit_pin_sharer_core v11.0
uC_tri_state_bridge_0_pinSharer_0_arbiter
altera_merlin_std_arbitrator v11.0
altera_tristate_controller_translator
altera_tristate_controller_translator v11.0
altera_tristate_controller_aggregator
altera_tristate_controller_aggregator v11.0
Generation Messages
2012.08.14.17:00:38 [Debug] uC.pll: Timing: VAL:1/0.030s ELA:1/0.003s 2012.08.14.17:00:38 [Info] uC.onchip_mem: Memory will be initialized from onchip_mem.hex 2012.08.14.17:00:37 [Debug] uC.mm_console_master.clk_src: Timing: ELA:1/0.000s 2012.08.14.17:00:37 [Debug] uC.mm_console_master.clk_rst: Timing: ELA:2/0.000s/0.001s 2012.08.14.17:00:37 [Debug] uC.mm_console_master.jtag_phy_embedded_in_jtag_master: add_interface_port: Added reset port reset_n to clock_reset instead of clock 2012.08.14.17:00:37 [Debug] uC.mm_console_master.jtag_phy_embedded_in_jtag_master: Timing: VAL:1/0.000s ELA:1/0.002s QME:2/1.306s/1.846s(0.0s) 2012.08.14.17:00:37 [Warning] uC.mm_console_master.jtag_phy_embedded_in_jtag_master.resetrequest: No synchronous edges, but has associated clock 2012.08.14.17:00:37 [Debug] uC.mm_console_master.fifo: add_interface_port: Added reset port reset to clk_reset instead of clk 2012.08.14.17:00:37 [Debug] uC.mm_console_master.fifo: Timing: VAL:1/0.001s ELA:1/0.005s 2012.08.14.17:00:37 [Debug] uC.mm_console_master.b2p: Timing: ELA:2/0.000s/0.001s QME:1/0.767s(0.0s) 2012.08.14.17:00:37 [Debug] uC.mm_console_master.p2b: Timing: ELA:2/0.000s/0.001s QME:1/0.776s(1.0s) 2012.08.14.17:00:37 [Debug] uC.mm_console_master.transacto: add_interface_port: Added reset port reset_n to clk_reset instead of clk 2012.08.14.17:00:37 [Debug] uC.mm_console_master.transacto: Timing: VAL:1/0.000s ELA:1/0.004s QME:1/0.825s(1.0s) 2012.08.14.17:00:38 [Debug] uC.mm_console_master: Timing: VAL:1/0.000s COM:1/0.056s 2012.08.14.17:00:38 [Warning] uC.mm_console_master.master_reset: No synchronous edges, but has associated clock 2012.08.14.17:00:38 [Info] uC.pwr_data: PIO inputs are not hardwired in test bench. Undefined values will be read from PIO inputs during simulation. 2012.08.14.16:57:47 [Debug] uC.altera_nios2_qsys: When a generate simulation callback is defined a synthesis generation callback should also be defined 2012.08.14.17:00:38 [Debug] uC.cpu: Timing: VAL:1/0.041s ELA:1/0.007s 2012.08.14.17:00:38 [Info] uC.sysid: System ID will no longer be automatically assigned. 2012.08.14.17:00:38 [Info] uC.sysid: Time stamp will be automatically updated when this component is generated. 2012.08.14.17:00:38 [Debug] uC.sysid: Timing: VAL:2/0.001s/0.002s 2012.08.14.17:00:38 [Debug] uC.tri_state_bridge_0_bridge_0: Timing: ELA:1/0.005s 2012.08.14.17:00:37 [Debug] uC.tri_state_bridge_0_pinSharer_0.clock: Timing: ELA:2/0.000s/0.000s 2012.08.14.17:00:37 [Debug] uC.tri_state_bridge_0_pinSharer_0.reset: Timing: ELA:2/0.000s/0.001s 2012.08.14.17:00:37 [Debug] uC.tri_state_bridge_0_pinSharer_0.pin_sharer: Timing: ELA:10/0.008s/0.018s 2012.08.14.17:00:37 [Debug] uC.tri_state_bridge_0_pinSharer_0.arbiter: Timing: ELA:2/0.001s/0.001s 2012.08.14.17:00:38 [Debug] uC.tri_state_bridge_0_pinSharer_0: Timing: COM:1/0.117s 2012.08.14.17:00:37 [Debug] uC.sram.clk: Timing: ELA:2/0.000s/0.001s 2012.08.14.17:00:37 [Debug] uC.sram.reset: Timing: ELA:2/0.001s/0.001s 2012.08.14.17:00:37 [Debug] uC.sram.tdt: Timing: ELA:4/0.002s/0.003s 2012.08.14.17:00:37 [Debug] uC.sram.slave_translator: Timing: ELA:5/0.004s/0.006s 2012.08.14.17:00:37 [Debug] uC.sram.tda: Timing: ELA:4/0.004s/0.005s 2012.08.14.17:00:38 [Debug] uC.sram: Timing: COM:1/0.010s 2012.08.14.17:00:38 [Debug] uC.AD7689_0: Timing: QME:1/0.936s(1.0s) 2012.08.14.17:00:38 [Info] uC: Generating uC "uC" for QUARTUS_SYNTH 2012.08.14.17:00:38 [Debug] uC: queue size: 0 starting:uC "uC" 2012.08.14.17:00:39 [Debug] Transform: PipelineBridgeSwap 2012.08.14.17:00:40 [Info] pipeline_bridge_swap_transform: After transform: 17 modules, 86 connections 2012.08.14.17:00:40 [Debug] Transform: ClockCrossingBridgeSwap 2012.08.14.17:00:40 [Debug] Transform: QsysBetaIPSwap 2012.08.14.17:00:41 [Debug] Transform: CustomInstructionTransform 2012.08.14.17:00:42 [Info] No custom instruction connections, skipping transform 2012.08.14.17:00:42 [Debug] Transform: TristateConduitUpgradeTransform 2012.08.14.17:00:44 [Debug] Transform: TranslatorTransform 2012.08.14.17:00:45 [Progress] min: 0 2012.08.14.17:00:45 [Progress] max: 1 2012.08.14.17:00:45 [Progress] current: 1 2012.08.14.17:00:45 [Progress] min: 0 2012.08.14.17:00:45 [Progress] max: 1 2012.08.14.17:00:45 [Progress] current: 1 2012.08.14.17:00:45 [Progress] min: 0 2012.08.14.17:00:45 [Progress] max: 1 2012.08.14.17:00:45 [Progress] current: 1 2012.08.14.17:00:45 [Progress] min: 0 2012.08.14.17:00:45 [Progress] max: 1 2012.08.14.17:00:45 [Progress] current: 1 2012.08.14.17:00:45 [Progress] min: 0 2012.08.14.17:00:45 [Progress] max: 1 2012.08.14.17:00:45 [Progress] current: 1 2012.08.14.17:00:45 [Progress] min: 0 2012.08.14.17:00:45 [Progress] max: 1 2012.08.14.17:00:45 [Progress] current: 1 2012.08.14.17:00:45 [Progress] min: 0 2012.08.14.17:00:45 [Progress] max: 1 2012.08.14.17:00:45 [Progress] current: 1 2012.08.14.17:00:45 [Progress] min: 0 2012.08.14.17:00:45 [Progress] max: 1 2012.08.14.17:00:45 [Progress] current: 1 2012.08.14.17:00:45 [Progress] min: 0 2012.08.14.17:00:45 [Progress] max: 1 2012.08.14.17:00:45 [Progress] current: 1 2012.08.14.17:00:45 [Progress] min: 0 2012.08.14.17:00:45 [Progress] max: 1 2012.08.14.17:00:45 [Progress] current: 1 2012.08.14.17:00:45 [Progress] min: 0 2012.08.14.17:00:45 [Progress] max: 1 2012.08.14.17:00:45 [Progress] current: 1 2012.08.14.17:00:45 [Progress] min: 0 2012.08.14.17:00:45 [Progress] max: 1 2012.08.14.17:00:45 [Progress] current: 1 2012.08.14.17:00:45 [Progress] min: 0 2012.08.14.17:00:45 [Progress] max: 1 2012.08.14.17:00:45 [Progress] current: 1 2012.08.14.17:00:45 [Progress] min: 0 2012.08.14.17:00:45 [Progress] max: 1 2012.08.14.17:00:45 [Progress] current: 1 2012.08.14.17:00:45 [Progress] min: 0 2012.08.14.17:00:45 [Progress] max: 1 2012.08.14.17:00:45 [Progress] current: 1 2012.08.14.17:00:45 [Progress] min: 0 2012.08.14.17:00:45 [Progress] max: 1 2012.08.14.17:00:45 [Progress] current: 1 2012.08.14.17:00:45 [Progress] min: 0 2012.08.14.17:00:45 [Progress] max: 1 2012.08.14.17:00:45 [Progress] current: 1 2012.08.14.17:00:45 [Info] merlin_translator_transform: After transform: 34 modules, 167 connections 2012.08.14.17:00:45 [Debug] Transform: DomainTransform 2012.08.14.17:00:46 [Debug] Transform merlin_domain_transform not run on matched interfaces cpu.instruction_master and cpu_instruction_master_translator.avalon_anti_master_0 2012.08.14.17:00:46 [Debug] Transform merlin_domain_transform not run on matched interfaces cpu.data_master and cpu_data_master_translator.avalon_anti_master_0 2012.08.14.17:00:46 [Debug] Transform merlin_domain_transform not run on matched interfaces mm_console_master.master and mm_console_master_master_translator.avalon_anti_master_0 2012.08.14.17:00:46 [Debug] Transform merlin_domain_transform not run on matched interfaces AD7689_0.avalon_master and AD7689_0_avalon_master_translator.avalon_anti_master_0 2012.08.14.17:00:46 [Progress] min: 0 2012.08.14.17:00:46 [Progress] max: 1 2012.08.14.17:00:46 [Progress] current: 1 2012.08.14.17:00:46 [Progress] min: 0 2012.08.14.17:00:46 [Progress] max: 1 2012.08.14.17:00:46 [Progress] current: 1 2012.08.14.17:00:46 [Progress] min: 0 2012.08.14.17:00:46 [Progress] max: 1 2012.08.14.17:00:46 [Progress] current: 1 2012.08.14.17:00:46 [Progress] min: 0 2012.08.14.17:00:46 [Progress] max: 1 2012.08.14.17:00:46 [Progress] current: 1 2012.08.14.17:00:46 [Progress] min: 0 2012.08.14.17:00:46 [Progress] max: 1 2012.08.14.17:00:46 [Progress] current: 1 2012.08.14.17:00:46 [Progress] min: 0 2012.08.14.17:00:46 [Progress] max: 1 2012.08.14.17:00:46 [Progress] current: 1 2012.08.14.17:00:46 [Progress] min: 0 2012.08.14.17:00:46 [Progress] max: 1 2012.08.14.17:00:46 [Progress] current: 1 2012.08.14.17:00:46 [Progress] min: 0 2012.08.14.17:00:46 [Progress] max: 1 2012.08.14.17:00:46 [Progress] current: 1 2012.08.14.17:00:46 [Progress] min: 0 2012.08.14.17:00:46 [Progress] max: 1 2012.08.14.17:00:46 [Progress] current: 1 2012.08.14.17:00:46 [Progress] min: 0 2012.08.14.17:00:46 [Progress] max: 1 2012.08.14.17:00:46 [Progress] current: 1 2012.08.14.17:00:46 [Progress] min: 0 2012.08.14.17:00:46 [Progress] max: 1 2012.08.14.17:00:46 [Progress] current: 1 2012.08.14.17:00:46 [Progress] min: 0 2012.08.14.17:00:46 [Progress] max: 1 2012.08.14.17:00:46 [Progress] current: 1 2012.08.14.17:00:46 [Progress] min: 0 2012.08.14.17:00:46 [Progress] max: 1 2012.08.14.17:00:46 [Progress] current: 1 2012.08.14.17:00:46 [Progress] min: 0 2012.08.14.17:00:46 [Progress] max: 1 2012.08.14.17:00:46 [Progress] current: 1 2012.08.14.17:00:46 [Progress] min: 0 2012.08.14.17:00:46 [Progress] max: 1 2012.08.14.17:00:46 [Progress] current: 1 2012.08.14.17:00:46 [Progress] min: 0 2012.08.14.17:00:46 [Progress] max: 1 2012.08.14.17:00:46 [Progress] current: 1 2012.08.14.17:00:46 [Progress] min: 0 2012.08.14.17:00:46 [Progress] max: 1 2012.08.14.17:00:46 [Progress] current: 1 2012.08.14.17:00:46 [Progress] min: 0 2012.08.14.17:00:46 [Progress] max: 1 2012.08.14.17:00:46 [Progress] current: 1 2012.08.14.17:00:46 [Progress] min: 0 2012.08.14.17:00:46 [Progress] max: 1 2012.08.14.17:00:46 [Progress] current: 1 2012.08.14.17:00:46 [Progress] min: 0 2012.08.14.17:00:46 [Progress] max: 1 2012.08.14.17:00:46 [Progress] current: 1 2012.08.14.17:00:46 [Progress] min: 0 2012.08.14.17:00:46 [Progress] max: 1 2012.08.14.17:00:46 [Progress] current: 1 2012.08.14.17:00:46 [Progress] min: 0 2012.08.14.17:00:46 [Progress] max: 1 2012.08.14.17:00:46 [Progress] current: 1 2012.08.14.17:00:46 [Progress] min: 0 2012.08.14.17:00:46 [Progress] max: 1 2012.08.14.17:00:46 [Progress] current: 1 2012.08.14.17:00:46 [Progress] min: 0 2012.08.14.17:00:46 [Progress] max: 1 2012.08.14.17:00:46 [Progress] current: 1 2012.08.14.17:00:46 [Progress] min: 0 2012.08.14.17:00:46 [Progress] max: 1 2012.08.14.17:00:46 [Progress] current: 1 2012.08.14.17:00:46 [Progress] min: 0 2012.08.14.17:00:46 [Progress] max: 1 2012.08.14.17:00:46 [Progress] current: 1 2012.08.14.17:00:46 [Progress] min: 0 2012.08.14.17:00:46 [Progress] max: 1 2012.08.14.17:00:46 [Progress] current: 1 2012.08.14.17:00:47 [Progress] min: 0 2012.08.14.17:00:47 [Progress] max: 1 2012.08.14.17:00:47 [Progress] current: 1 2012.08.14.17:00:47 [Progress] min: 0 2012.08.14.17:00:47 [Progress] max: 1 2012.08.14.17:00:47 [Progress] current: 1 2012.08.14.17:00:47 [Progress] min: 0 2012.08.14.17:00:47 [Progress] max: 1 2012.08.14.17:00:47 [Progress] current: 1 2012.08.14.17:00:47 [Progress] min: 0 2012.08.14.17:00:47 [Progress] max: 1 2012.08.14.17:00:47 [Progress] current: 1 2012.08.14.17:00:47 [Debug] Transform merlin_domain_transform not run on matched interfaces cpu_jtag_debug_module_translator.avalon_anti_slave_0 and cpu.jtag_debug_module 2012.08.14.17:00:47 [Debug] Transform merlin_domain_transform not run on matched interfaces onchip_mem_s1_translator.avalon_anti_slave_0 and onchip_mem.s1 2012.08.14.17:00:47 [Debug] Transform merlin_domain_transform not run on matched interfaces sram_uas_translator.avalon_anti_slave_0 and sram.uas 2012.08.14.17:00:47 [Debug] Transform merlin_domain_transform not run on matched interfaces pll_pll_slave_translator.avalon_anti_slave_0 and pll.pll_slave 2012.08.14.17:00:47 [Debug] Transform merlin_domain_transform not run on matched interfaces leds_s1_translator.avalon_anti_slave_0 and leds.s1 2012.08.14.17:00:47 [Debug] Transform merlin_domain_transform not run on matched interfaces sysid_control_slave_translator.avalon_anti_slave_0 and sysid.control_slave 2012.08.14.17:00:47 [Debug] Transform merlin_domain_transform not run on matched interfaces ucprobe_uart_avalon_jtag_slave_translator.avalon_anti_slave_0 and ucprobe_uart.avalon_jtag_slave 2012.08.14.17:00:47 [Debug] Transform merlin_domain_transform not run on matched interfaces jtag_uart_0_avalon_jtag_slave_translator.avalon_anti_slave_0 and jtag_uart_0.avalon_jtag_slave 2012.08.14.17:00:47 [Debug] Transform merlin_domain_transform not run on matched interfaces sys_timer_s1_translator.avalon_anti_slave_0 and sys_timer.s1 2012.08.14.17:00:47 [Debug] Transform merlin_domain_transform not run on matched interfaces pwr_data_s1_translator.avalon_anti_slave_0 and pwr_data.s1 2012.08.14.17:00:47 [Debug] Transform merlin_domain_transform not run on matched interfaces i2c_int_s1_translator.avalon_anti_slave_0 and i2c_int.s1 2012.08.14.17:00:47 [Debug] Transform merlin_domain_transform not run on matched interfaces pwr_en_clk_s1_translator.avalon_anti_slave_0 and pwr_en_clk.s1 2012.08.14.17:00:47 [Debug] Transform merlin_domain_transform not run on matched interfaces AD7689_0_avalon_translator.avalon_anti_slave_0 and AD7689_0.avalon 2012.08.14.17:00:47 [Info] merlin_domain_transform: After transform: 66 modules, 421 connections 2012.08.14.17:00:47 [Debug] Transform: RouterTransform 2012.08.14.17:00:48 [Progress] min: 0 2012.08.14.17:00:48 [Progress] max: 1 2012.08.14.17:00:48 [Progress] current: 1 2012.08.14.17:00:48 [Progress] min: 0 2012.08.14.17:00:48 [Progress] max: 1 2012.08.14.17:00:48 [Progress] current: 1 2012.08.14.17:00:48 [Progress] min: 0 2012.08.14.17:00:48 [Progress] max: 1 2012.08.14.17:00:48 [Progress] current: 1 2012.08.14.17:00:48 [Progress] min: 0 2012.08.14.17:00:48 [Progress] max: 1 2012.08.14.17:00:48 [Progress] current: 1 2012.08.14.17:00:48 [Progress] min: 0 2012.08.14.17:00:48 [Progress] max: 1 2012.08.14.17:00:48 [Progress] current: 1 2012.08.14.17:00:48 [Progress] min: 0 2012.08.14.17:00:48 [Progress] max: 1 2012.08.14.17:00:48 [Progress] current: 1 2012.08.14.17:00:48 [Progress] min: 0 2012.08.14.17:00:48 [Progress] max: 1 2012.08.14.17:00:48 [Progress] current: 1 2012.08.14.17:00:48 [Progress] min: 0 2012.08.14.17:00:48 [Progress] max: 1 2012.08.14.17:00:48 [Progress] current: 1 2012.08.14.17:00:48 [Progress] min: 0 2012.08.14.17:00:48 [Progress] max: 1 2012.08.14.17:00:48 [Progress] current: 1 2012.08.14.17:00:48 [Progress] min: 0 2012.08.14.17:00:48 [Progress] max: 1 2012.08.14.17:00:48 [Progress] current: 1 2012.08.14.17:00:48 [Progress] min: 0 2012.08.14.17:00:48 [Progress] max: 1 2012.08.14.17:00:48 [Progress] current: 1 2012.08.14.17:00:48 [Progress] min: 0 2012.08.14.17:00:48 [Progress] max: 1 2012.08.14.17:00:48 [Progress] current: 1 2012.08.14.17:00:48 [Progress] min: 0 2012.08.14.17:00:48 [Progress] max: 1 2012.08.14.17:00:48 [Progress] current: 1 2012.08.14.17:00:48 [Progress] min: 0 2012.08.14.17:00:48 [Progress] max: 1 2012.08.14.17:00:48 [Progress] current: 1 2012.08.14.17:00:48 [Progress] min: 0 2012.08.14.17:00:48 [Progress] max: 1 2012.08.14.17:00:48 [Progress] current: 1 2012.08.14.17:00:48 [Progress] min: 0 2012.08.14.17:00:48 [Progress] max: 1 2012.08.14.17:00:48 [Progress] current: 1 2012.08.14.17:00:48 [Progress] min: 0 2012.08.14.17:00:48 [Progress] max: 1 2012.08.14.17:00:48 [Progress] current: 1 2012.08.14.17:00:48 [Info] merlin_router_transform: After transform: 83 modules, 502 connections 2012.08.14.17:00:48 [Debug] Transform: TrafficLimiterTransform 2012.08.14.17:00:49 [Progress] min: 0 2012.08.14.17:00:49 [Progress] max: 1 2012.08.14.17:00:49 [Progress] current: 1 2012.08.14.17:00:49 [Progress] min: 0 2012.08.14.17:00:49 [Progress] max: 1 2012.08.14.17:00:49 [Progress] current: 1 2012.08.14.17:00:49 [Progress] min: 0 2012.08.14.17:00:49 [Progress] max: 1 2012.08.14.17:00:49 [Progress] current: 1 2012.08.14.17:00:49 [Progress] min: 0 2012.08.14.17:00:49 [Progress] max: 1 2012.08.14.17:00:49 [Progress] current: 1 2012.08.14.17:00:49 [Info] merlin_traffic_limiter_transform: After transform: 87 modules, 524 connections 2012.08.14.17:00:49 [Debug] Transform: BurstTransform 2012.08.14.17:00:51 [Progress] min: 0 2012.08.14.17:00:51 [Progress] max: 1 2012.08.14.17:00:51 [Progress] current: 1 2012.08.14.17:00:51 [Info] merlin_burst_transform: After transform: 88 modules, 529 connections 2012.08.14.17:00:51 [Debug] Transform: ResetAdaptation 2012.08.14.17:00:52 [Progress] min: 0 2012.08.14.17:00:52 [Progress] max: 1 2012.08.14.17:00:52 [Progress] current: 1 2012.08.14.17:00:52 [Progress] min: 0 2012.08.14.17:00:52 [Progress] max: 1 2012.08.14.17:00:52 [Progress] current: 1 2012.08.14.17:00:52 [Info] reset_adaptation_transform: After transform: 90 modules, 353 connections 2012.08.14.17:00:52 [Debug] Transform: NetworkToSwitchTransform 2012.08.14.17:00:53 [Progress] min: 0 2012.08.14.17:00:53 [Progress] max: 1 2012.08.14.17:00:53 [Progress] current: 1 2012.08.14.17:00:53 [Progress] min: 0 2012.08.14.17:00:53 [Progress] max: 1 2012.08.14.17:00:53 [Progress] current: 1 2012.08.14.17:00:53 [Progress] min: 0 2012.08.14.17:00:53 [Progress] max: 1 2012.08.14.17:00:53 [Progress] current: 1 2012.08.14.17:00:53 [Progress] min: 0 2012.08.14.17:00:53 [Progress] max: 1 2012.08.14.17:00:53 [Progress] current: 1 2012.08.14.17:00:53 [Progress] min: 0 2012.08.14.17:00:53 [Progress] max: 1 2012.08.14.17:00:53 [Progress] current: 1 2012.08.14.17:00:53 [Progress] min: 0 2012.08.14.17:00:53 [Progress] max: 1 2012.08.14.17:00:53 [Progress] current: 1 2012.08.14.17:00:53 [Progress] min: 0 2012.08.14.17:00:53 [Progress] max: 1 2012.08.14.17:00:53 [Progress] current: 1 2012.08.14.17:00:53 [Progress] min: 0 2012.08.14.17:00:53 [Progress] max: 1 2012.08.14.17:00:53 [Progress] current: 1 2012.08.14.17:00:53 [Progress] min: 0 2012.08.14.17:00:53 [Progress] max: 1 2012.08.14.17:00:53 [Progress] current: 1 2012.08.14.17:00:53 [Progress] min: 0 2012.08.14.17:00:53 [Progress] max: 1 2012.08.14.17:00:53 [Progress] current: 1 2012.08.14.17:00:53 [Progress] min: 0 2012.08.14.17:00:53 [Progress] max: 1 2012.08.14.17:00:53 [Progress] current: 1 2012.08.14.17:00:53 [Progress] min: 0 2012.08.14.17:00:53 [Progress] max: 1 2012.08.14.17:00:53 [Progress] current: 1 2012.08.14.17:00:53 [Progress] min: 0 2012.08.14.17:00:53 [Progress] max: 1 2012.08.14.17:00:53 [Progress] current: 1 2012.08.14.17:00:53 [Progress] min: 0 2012.08.14.17:00:53 [Progress] max: 1 2012.08.14.17:00:53 [Progress] current: 1 2012.08.14.17:00:53 [Progress] min: 0 2012.08.14.17:00:53 [Progress] max: 1 2012.08.14.17:00:53 [Progress] current: 1 2012.08.14.17:00:53 [Progress] min: 0 2012.08.14.17:00:53 [Progress] max: 1 2012.08.14.17:00:53 [Progress] current: 1 2012.08.14.17:00:53 [Progress] min: 0 2012.08.14.17:00:53 [Progress] max: 1 2012.08.14.17:00:53 [Progress] current: 1 2012.08.14.17:00:53 [Progress] min: 0 2012.08.14.17:00:53 [Progress] max: 1 2012.08.14.17:00:53 [Progress] current: 1 2012.08.14.17:00:53 [Progress] min: 0 2012.08.14.17:00:53 [Progress] max: 1 2012.08.14.17:00:53 [Progress] current: 1 2012.08.14.17:00:53 [Progress] min: 0 2012.08.14.17:00:53 [Progress] max: 1 2012.08.14.17:00:53 [Progress] current: 1 2012.08.14.17:00:53 [Progress] min: 0 2012.08.14.17:00:53 [Progress] max: 1 2012.08.14.17:00:53 [Progress] current: 1 2012.08.14.17:00:53 [Progress] min: 0 2012.08.14.17:00:53 [Progress] max: 1 2012.08.14.17:00:53 [Progress] current: 1 2012.08.14.17:00:53 [Progress] min: 0 2012.08.14.17:00:53 [Progress] max: 1 2012.08.14.17:00:53 [Progress] current: 1 2012.08.14.17:00:53 [Progress] min: 0 2012.08.14.17:00:53 [Progress] max: 1 2012.08.14.17:00:53 [Progress] current: 1 2012.08.14.17:00:53 [Progress] min: 0 2012.08.14.17:00:53 [Progress] max: 1 2012.08.14.17:00:53 [Progress] current: 1 2012.08.14.17:00:53 [Progress] min: 0 2012.08.14.17:00:53 [Progress] max: 1 2012.08.14.17:00:53 [Progress] current: 1 2012.08.14.17:00:53 [Progress] min: 0 2012.08.14.17:00:53 [Progress] max: 1 2012.08.14.17:00:53 [Progress] current: 1 2012.08.14.17:00:53 [Progress] min: 0 2012.08.14.17:00:53 [Progress] max: 1 2012.08.14.17:00:53 [Progress] current: 1 2012.08.14.17:00:53 [Progress] min: 0 2012.08.14.17:00:53 [Progress] max: 1 2012.08.14.17:00:53 [Progress] current: 1 2012.08.14.17:00:53 [Progress] min: 0 2012.08.14.17:00:53 [Progress] max: 1 2012.08.14.17:00:53 [Progress] current: 1 2012.08.14.17:00:53 [Progress] min: 0 2012.08.14.17:00:53 [Progress] max: 1 2012.08.14.17:00:53 [Progress] current: 1 2012.08.14.17:00:53 [Progress] min: 0 2012.08.14.17:00:53 [Progress] max: 1 2012.08.14.17:00:53 [Progress] current: 1 2012.08.14.17:00:53 [Progress] min: 0 2012.08.14.17:00:53 [Progress] max: 1 2012.08.14.17:00:53 [Progress] current: 1 2012.08.14.17:00:53 [Progress] min: 0 2012.08.14.17:00:53 [Progress] max: 1 2012.08.14.17:00:53 [Progress] current: 1 2012.08.14.17:00:53 [Info] merlin_network_to_switch_transform: After transform: 123 modules, 425 connections 2012.08.14.17:00:53 [Debug] Transform: WidthTransform 2012.08.14.17:00:55 [Progress] min: 0 2012.08.14.17:00:55 [Progress] max: 1 2012.08.14.17:00:55 [Progress] current: 1 2012.08.14.17:00:55 [Progress] min: 0 2012.08.14.17:00:55 [Progress] max: 1 2012.08.14.17:00:55 [Progress] current: 1 2012.08.14.17:00:55 [Progress] min: 0 2012.08.14.17:00:55 [Progress] max: 1 2012.08.14.17:00:55 [Progress] current: 1 2012.08.14.17:00:55 [Progress] min: 0 2012.08.14.17:00:55 [Progress] max: 1 2012.08.14.17:00:55 [Progress] current: 1 2012.08.14.17:00:55 [Progress] min: 0 2012.08.14.17:00:55 [Progress] max: 1 2012.08.14.17:00:55 [Progress] current: 1 2012.08.14.17:00:55 [Progress] min: 0 2012.08.14.17:00:55 [Progress] max: 1 2012.08.14.17:00:55 [Progress] current: 1 2012.08.14.17:00:55 [Info] merlin_width_transform: After transform: 129 modules, 443 connections 2012.08.14.17:00:55 [Debug] Transform: RouterTableTransform 2012.08.14.17:00:56 [Debug] Transform: ClockCrossingTransform 2012.08.14.17:00:58 [Info] Inserting clock-crossing logic between cmd_xbar_demux_001.src3 and cmd_xbar_mux_003.sink0 2012.08.14.17:00:58 [Progress] min: 0 2012.08.14.17:00:58 [Progress] max: 1 2012.08.14.17:00:58 [Progress] current: 1 2012.08.14.17:00:58 [Info] Inserting clock-crossing logic between rsp_xbar_demux_003.src0 and rsp_xbar_mux_001.sink3 2012.08.14.17:00:58 [Progress] min: 0 2012.08.14.17:00:58 [Progress] max: 1 2012.08.14.17:00:58 [Progress] current: 1 2012.08.14.17:00:58 [Info] com_altera_sopcmodel_transforms_avalon_ClockCrossingTransform: After transform: 131 modules, 453 connections 2012.08.14.17:00:58 [Debug] Transform: TrafficLimiterUpdateTransform 2012.08.14.17:00:59 [Info] limiter_update_transform: After transform: 131 modules, 457 connections 2012.08.14.17:00:59 [Debug] Transform: InterruptMapperTransform 2012.08.14.17:01:00 [Progress] min: 0 2012.08.14.17:01:00 [Progress] max: 1 2012.08.14.17:01:00 [Progress] current: 1 2012.08.14.17:01:00 [Info] merlin_interrupt_mapper_transform: After transform: 132 modules, 460 connections 2012.08.14.17:01:00 [Debug] Transform: InterruptSyncTransform 2012.08.14.17:01:02 [Debug] Transform: InterruptFanoutTransform 2012.08.14.17:01:04 [Warning] system: "No matching role found for ucprobe_uart:avalon_jtag_slave:dataavailable (dataavailable)" 2012.08.14.17:01:04 [Warning] system: "No matching role found for ucprobe_uart:avalon_jtag_slave:readyfordata (readyfordata)" 2012.08.14.17:01:04 [Warning] system: "No matching role found for jtag_uart_0:avalon_jtag_slave:dataavailable (dataavailable)" 2012.08.14.17:01:04 [Warning] system: "No matching role found for jtag_uart_0:avalon_jtag_slave:readyfordata (readyfordata)" 2012.08.14.17:01:04 [Debug] uC: "uC" reuses altpll "submodules/uC_pll" 2012.08.14.17:01:04 [Debug] uC: "uC" reuses altera_avalon_onchip_memory2 "submodules/uC_onchip_mem" 2012.08.14.17:01:04 [Debug] uC: "uC" reuses altera_avalon_pio "submodules/uC_leds" 2012.08.14.17:01:04 [Debug] uC: "uC" reuses altera_avalon_jtag_uart "submodules/uC_ucprobe_uart" 2012.08.14.17:01:04 [Debug] uC: "uC" reuses altera_avalon_jtag_uart "submodules/uC_ucprobe_uart" 2012.08.14.17:01:04 [Debug] uC: "uC" reuses altera_avalon_timer "submodules/uC_sys_timer" 2012.08.14.17:01:04 [Debug] uC: "uC" reuses altera_jtag_avalon_master "submodules/uC_mm_console_master" 2012.08.14.17:01:04 [Debug] uC: "uC" reuses altera_avalon_pio "submodules/uC_pwr_data" 2012.08.14.17:01:04 [Debug] uC: "uC" reuses altera_avalon_pio "submodules/uC_i2c_int" 2012.08.14.17:01:04 [Debug] uC: "uC" reuses altera_avalon_pio "submodules/uC_pwr_en_clk" 2012.08.14.17:01:04 [Debug] uC: "uC" reuses altera_nios2_qsys "submodules/uC_cpu" 2012.08.14.17:01:04 [Debug] uC: "uC" reuses altera_avalon_sysid_qsys "submodules/uC_sysid" 2012.08.14.17:01:04 [Debug] uC: "uC" reuses altera_tristate_conduit_bridge "submodules/uC_tri_state_bridge_0_bridge_0" 2012.08.14.17:01:04 [Debug] uC: "uC" reuses altera_tristate_conduit_pin_sharer "submodules/uC_tri_state_bridge_0_pinSharer_0" 2012.08.14.17:01:04 [Debug] uC: "uC" reuses altera_generic_tristate_controller "submodules/uC_sram" 2012.08.14.17:01:04 [Debug] uC: "uC" reuses AD7689_Avalon_core "submodules/AD7689_Avalon_core" 2012.08.14.17:01:04 [Debug] uC: "uC" reuses altera_merlin_master_translator "submodules/altera_merlin_master_translator" 2012.08.14.17:01:04 [Debug] uC: "uC" reuses altera_merlin_master_translator "submodules/altera_merlin_master_translator" 2012.08.14.17:01:04 [Debug] uC: "uC" reuses altera_merlin_master_translator "submodules/altera_merlin_master_translator" 2012.08.14.17:01:04 [Debug] uC: "uC" reuses altera_merlin_master_translator "submodules/altera_merlin_master_translator" 2012.08.14.17:01:04 [Debug] uC: "uC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2012.08.14.17:01:04 [Debug] uC: "uC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2012.08.14.17:01:04 [Debug] uC: "uC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2012.08.14.17:01:04 [Debug] uC: "uC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2012.08.14.17:01:04 [Debug] uC: "uC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2012.08.14.17:01:04 [Debug] uC: "uC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2012.08.14.17:01:04 [Debug] uC: "uC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2012.08.14.17:01:04 [Debug] uC: "uC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_master_agent "submodules/altera_merlin_master_agent" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_master_agent "submodules/altera_merlin_master_agent" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_master_agent "submodules/altera_merlin_master_agent" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_master_agent "submodules/altera_merlin_master_agent" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_router "submodules/uC_addr_router" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_router "submodules/uC_addr_router_001" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_router "submodules/uC_addr_router_002" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_router "submodules/uC_addr_router_003" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_router "submodules/uC_id_router" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_router "submodules/uC_id_router_001" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_router "submodules/uC_id_router_002" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_router "submodules/uC_id_router_003" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_router "submodules/uC_id_router_003" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_router "submodules/uC_id_router_003" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_router "submodules/uC_id_router_003" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_router "submodules/uC_id_router_003" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_router "submodules/uC_id_router_003" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_router "submodules/uC_id_router_003" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_router "submodules/uC_id_router_003" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_router "submodules/uC_id_router_003" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_router "submodules/uC_id_router_003" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_traffic_limiter "submodules/altera_merlin_traffic_limiter" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_traffic_limiter "submodules/altera_merlin_traffic_limiter" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_traffic_limiter "submodules/altera_merlin_traffic_limiter" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_traffic_limiter "submodules/altera_merlin_traffic_limiter" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_burst_adapter "submodules/altera_merlin_burst_adapter" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_reset_controller "submodules/altera_reset_controller" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_reset_controller "submodules/altera_reset_controller" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_demultiplexer "submodules/uC_cmd_xbar_demux" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_demultiplexer "submodules/uC_cmd_xbar_demux_001" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_demultiplexer "submodules/uC_cmd_xbar_demux_002" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_demultiplexer "submodules/uC_cmd_xbar_demux_003" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_multiplexer "submodules/uC_cmd_xbar_mux" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_multiplexer "submodules/uC_cmd_xbar_mux_001" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_multiplexer "submodules/uC_cmd_xbar_mux_002" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_demultiplexer "submodules/uC_rsp_xbar_demux" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_demultiplexer "submodules/uC_rsp_xbar_demux_001" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_demultiplexer "submodules/uC_rsp_xbar_demux_002" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_demultiplexer "submodules/uC_rsp_xbar_demux_003" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_demultiplexer "submodules/uC_rsp_xbar_demux_003" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_demultiplexer "submodules/uC_rsp_xbar_demux_003" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_demultiplexer "submodules/uC_rsp_xbar_demux_003" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_demultiplexer "submodules/uC_rsp_xbar_demux_003" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_demultiplexer "submodules/uC_rsp_xbar_demux_003" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_demultiplexer "submodules/uC_rsp_xbar_demux_003" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_demultiplexer "submodules/uC_rsp_xbar_demux_003" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_demultiplexer "submodules/uC_rsp_xbar_demux_003" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_demultiplexer "submodules/uC_rsp_xbar_demux_003" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_multiplexer "submodules/uC_rsp_xbar_mux" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_multiplexer "submodules/uC_rsp_xbar_mux_001" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_multiplexer "submodules/uC_rsp_xbar_mux_002" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_width_adapter "submodules/altera_merlin_width_adapter" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_width_adapter "submodules/altera_merlin_width_adapter" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_width_adapter "submodules/altera_merlin_width_adapter" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_width_adapter "submodules/altera_merlin_width_adapter" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_width_adapter "submodules/altera_merlin_width_adapter" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_merlin_width_adapter "submodules/altera_merlin_width_adapter" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_avalon_st_handshake_clock_crosser "submodules/altera_avalon_st_handshake_clock_crosser" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_avalon_st_handshake_clock_crosser "submodules/altera_avalon_st_handshake_clock_crosser" 2012.08.14.17:01:05 [Debug] uC: "uC" reuses altera_irq_mapper "submodules/uC_irq_mapper" 2012.08.14.17:01:05 [Debug] uC: queue size: 119 starting:altpll "submodules/uC_pll" 2012.08.14.17:01:05 [Debug] set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files 2012.08.14.17:01:05 [Debug] Command: C:/altera/11.0/quartus/bin/quartus_map.exe not_a_project --generate_hdl_interface=C:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0007_sopcgen/uC_pll.v --source=C:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0007_sopcgen/uC_pll.v --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0008_sopcqmap/ 2012.08.14.17:01:06 [Debug] Command took 1.142s 2012.08.14.17:01:06 [Info] pll: "uC" instantiated altpll "pll" 2012.08.14.17:01:06 [Debug] uC: queue size: 118 starting:altera_avalon_onchip_memory2 "submodules/uC_onchip_mem" 2012.08.14.17:01:07 [Info] Starting classic module elaboration. 2012.08.14.17:01:09 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0009_sopclgen --no_splash --refresh C:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0009_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2012.08.14.17:01:12 [Info] Finished elaborating classic module. 2012.08.14.17:01:12 [Progress] Executing: C:/altera/11.0/quartus//sopc_builder/bin/sopc_builder --classic --generate C:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0009_sopclgen/yysystem.ptf 2012.08.14.17:01:12 [Info] Running sopc_builder... 2012.08.14.17:01:13 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0009_sopclgen --generate C:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0009_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2012.08.14.17:01:15 [Progress] No .sopc_builder configuration file(!) 2012.08.14.17:01:15 [Progress] . 2012.08.14.17:01:17 [Progress] # 2012.08.14 17:01:17 (*) Success: sopc_builder finished. 2012.08.14.17:01:17 [Info] onchip_mem: "uC" instantiated altera_avalon_onchip_memory2 "onchip_mem" 2012.08.14.17:01:17 [Debug] uC: queue size: 117 starting:altera_avalon_pio "submodules/uC_leds" 2012.08.14.17:01:17 [Info] Starting classic module elaboration. 2012.08.14.17:01:19 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0010_sopclgen --no_splash --refresh C:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0010_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2012.08.14.17:01:21 [Info] Finished elaborating classic module. 2012.08.14.17:01:21 [Progress] Executing: C:/altera/11.0/quartus//sopc_builder/bin/sopc_builder --classic --generate C:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0010_sopclgen/yysystem.ptf 2012.08.14.17:01:21 [Info] Running sopc_builder... 2012.08.14.17:01:23 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0010_sopclgen --generate C:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0010_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2012.08.14.17:01:25 [Progress] No .sopc_builder configuration file(!) 2012.08.14.17:01:25 [Progress] . 2012.08.14.17:01:26 [Progress] # 2012.08.14 17:01:26 (*) Success: sopc_builder finished. 2012.08.14.17:01:27 [Info] leds: "uC" instantiated altera_avalon_pio "leds" 2012.08.14.17:01:27 [Debug] uC: queue size: 116 starting:altera_avalon_jtag_uart "submodules/uC_ucprobe_uart" 2012.08.14.17:01:27 [Info] Starting classic module elaboration. 2012.08.14.17:01:29 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0011_sopclgen --no_splash --refresh C:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0011_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2012.08.14.17:01:31 [Info] Finished elaborating classic module. 2012.08.14.17:01:31 [Progress] Executing: C:/altera/11.0/quartus//sopc_builder/bin/sopc_builder --classic --generate C:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0011_sopclgen/yysystem.ptf 2012.08.14.17:01:31 [Info] Running sopc_builder... 2012.08.14.17:01:32 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0011_sopclgen --generate C:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0011_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2012.08.14.17:01:34 [Progress] No .sopc_builder configuration file(!) 2012.08.14.17:01:34 [Progress] . 2012.08.14.17:01:36 [Progress] # 2012.08.14 17:01:36 (*) Success: sopc_builder finished. 2012.08.14.17:01:36 [Info] ucprobe_uart: "uC" instantiated altera_avalon_jtag_uart "ucprobe_uart" 2012.08.14.17:01:36 [Debug] uC: queue size: 114 starting:altera_avalon_timer "submodules/uC_sys_timer" 2012.08.14.17:01:36 [Info] Starting classic module elaboration. 2012.08.14.17:01:38 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0012_sopclgen --no_splash --refresh C:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0012_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2012.08.14.17:01:40 [Info] Finished elaborating classic module. 2012.08.14.17:01:40 [Progress] Executing: C:/altera/11.0/quartus//sopc_builder/bin/sopc_builder --classic --generate C:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0012_sopclgen/yysystem.ptf 2012.08.14.17:01:40 [Info] Running sopc_builder... 2012.08.14.17:01:42 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0012_sopclgen --generate C:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0012_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2012.08.14.17:01:44 [Progress] No .sopc_builder configuration file(!) 2012.08.14.17:01:44 [Progress] . 2012.08.14.17:01:45 [Progress] # 2012.08.14 17:01:45 (*) Success: sopc_builder finished. 2012.08.14.17:01:46 [Info] sys_timer: "uC" instantiated altera_avalon_timer "sys_timer" 2012.08.14.17:01:46 [Debug] uC: queue size: 113 starting:altera_jtag_avalon_master "submodules/uC_mm_console_master" 2012.08.14.17:01:46 [Info] mm_console_master: Running transform AvalonTransform 2012.08.14.17:01:46 [Debug] Transform: PipelineBridgeSwap 2012.08.14.17:01:46 [Info] pipeline_bridge_swap_transform: After transform: 10 modules, 25 connections 2012.08.14.17:01:46 [Debug] Transform: ClockCrossingBridgeSwap 2012.08.14.17:01:46 [Debug] Transform: QsysBetaIPSwap 2012.08.14.17:01:46 [Debug] Transform: CustomInstructionTransform 2012.08.14.17:01:46 [Info] No custom instruction connections, skipping transform 2012.08.14.17:01:46 [Debug] Transform: TristateConduitUpgradeTransform 2012.08.14.17:01:47 [Debug] Transform: TranslatorTransform 2012.08.14.17:01:47 [Info] No Avalon connections, skipping transform 2012.08.14.17:01:47 [Debug] Transform: DomainTransform 2012.08.14.17:01:47 [Debug] Transform: RouterTransform 2012.08.14.17:01:47 [Debug] Transform: TrafficLimiterTransform 2012.08.14.17:01:47 [Debug] Transform: BurstTransform 2012.08.14.17:01:47 [Debug] Transform: ResetAdaptation 2012.08.14.17:01:47 [Debug] Transform: NetworkToSwitchTransform 2012.08.14.17:01:47 [Debug] Transform: WidthTransform 2012.08.14.17:01:48 [Debug] Transform: RouterTableTransform 2012.08.14.17:01:48 [Debug] Transform: ClockCrossingTransform 2012.08.14.17:01:48 [Debug] Transform: TrafficLimiterUpdateTransform 2012.08.14.17:01:48 [Debug] Transform: InterruptMapperTransform 2012.08.14.17:01:48 [Debug] Transform: InterruptSyncTransform 2012.08.14.17:01:48 [Debug] Transform: InterruptFanoutTransform 2012.08.14.17:01:48 [Info] mm_console_master: Running transform AvalonTransform took 2.943s 2012.08.14.17:01:49 [Debug] mm_console_master: "mm_console_master" reuses altera_jtag_dc_streaming "submodules/altera_avalon_st_jtag_interface" 2012.08.14.17:01:49 [Debug] mm_console_master: "mm_console_master" reuses timing_adapter "submodules/uC_mm_console_master_timing_adt" 2012.08.14.17:01:49 [Debug] mm_console_master: "mm_console_master" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2012.08.14.17:01:49 [Debug] mm_console_master: "mm_console_master" reuses altera_avalon_st_bytes_to_packets "submodules/altera_avalon_st_bytes_to_packets" 2012.08.14.17:01:49 [Debug] mm_console_master: "mm_console_master" reuses altera_avalon_st_packets_to_bytes "submodules/altera_avalon_st_packets_to_bytes" 2012.08.14.17:01:49 [Debug] mm_console_master: "mm_console_master" reuses altera_avalon_packets_to_master "submodules/altera_avalon_packets_to_master" 2012.08.14.17:01:49 [Debug] mm_console_master: "mm_console_master" reuses channel_adapter "submodules/uC_mm_console_master_b2p_adapter" 2012.08.14.17:01:49 [Debug] mm_console_master: "mm_console_master" reuses channel_adapter "submodules/uC_mm_console_master_p2b_adapter" 2012.08.14.17:01:49 [Info] mm_console_master: "uC" instantiated altera_jtag_avalon_master "mm_console_master" 2012.08.14.17:01:49 [Debug] uC: queue size: 120 starting:altera_avalon_pio "submodules/uC_pwr_data" 2012.08.14.17:01:49 [Info] Starting classic module elaboration. 2012.08.14.17:01:51 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0013_sopclgen --no_splash --refresh C:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0013_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2012.08.14.17:01:53 [Info] Finished elaborating classic module. 2012.08.14.17:01:53 [Progress] Executing: C:/altera/11.0/quartus//sopc_builder/bin/sopc_builder --classic --generate C:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0013_sopclgen/yysystem.ptf 2012.08.14.17:01:53 [Info] Running sopc_builder... 2012.08.14.17:01:55 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0013_sopclgen --generate C:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0013_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2012.08.14.17:01:56 [Progress] No .sopc_builder configuration file(!) 2012.08.14.17:01:57 [Progress] . 2012.08.14.17:01:58 [Progress] # 2012.08.14 17:01:58 (*) Success: sopc_builder finished. 2012.08.14.17:01:58 [Info] pwr_data: "uC" instantiated altera_avalon_pio "pwr_data" 2012.08.14.17:01:58 [Debug] uC: queue size: 119 starting:altera_avalon_pio "submodules/uC_i2c_int" 2012.08.14.17:01:58 [Info] Starting classic module elaboration. 2012.08.14.17:02:00 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0014_sopclgen --no_splash --refresh C:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0014_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2012.08.14.17:02:02 [Info] Finished elaborating classic module. 2012.08.14.17:02:02 [Progress] Executing: C:/altera/11.0/quartus//sopc_builder/bin/sopc_builder --classic --generate C:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0014_sopclgen/yysystem.ptf 2012.08.14.17:02:02 [Info] Running sopc_builder... 2012.08.14.17:02:04 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0014_sopclgen --generate C:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0014_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2012.08.14.17:02:06 [Progress] No .sopc_builder configuration file(!) 2012.08.14.17:02:06 [Progress] . 2012.08.14.17:02:08 [Progress] # 2012.08.14 17:02:08 (*) Success: sopc_builder finished. 2012.08.14.17:02:08 [Info] i2c_int: "uC" instantiated altera_avalon_pio "i2c_int" 2012.08.14.17:02:08 [Debug] uC: queue size: 118 starting:altera_avalon_pio "submodules/uC_pwr_en_clk" 2012.08.14.17:02:08 [Info] Starting classic module elaboration. 2012.08.14.17:02:10 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0015_sopclgen --no_splash --refresh C:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0015_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2012.08.14.17:02:12 [Info] Finished elaborating classic module. 2012.08.14.17:02:12 [Progress] Executing: C:/altera/11.0/quartus//sopc_builder/bin/sopc_builder --classic --generate C:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0015_sopclgen/yysystem.ptf 2012.08.14.17:02:12 [Info] Running sopc_builder... 2012.08.14.17:02:14 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0015_sopclgen --generate C:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0015_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2012.08.14.17:02:16 [Progress] No .sopc_builder configuration file(!) 2012.08.14.17:02:16 [Progress] . 2012.08.14.17:02:17 [Progress] # 2012.08.14 17:02:17 (*) Success: sopc_builder finished. 2012.08.14.17:02:18 [Info] pwr_en_clk: "uC" instantiated altera_avalon_pio "pwr_en_clk" 2012.08.14.17:02:18 [Debug] uC: queue size: 117 starting:altera_nios2_qsys "submodules/uC_cpu" 2012.08.14.17:02:18 [Info] cpu: Starting RTL generation for module 'uC_cpu' 2012.08.14.17:02:18 [Info] cpu: Generation command is [exec C:/altera/11.0/quartus/../ip/altera/nios2_ip/altera_nios2/eperl.exe -I C:/altera/11.0/quartus/common/ip/altera/common/perl/5.8.3 -I C:/altera/11.0/quartus/sopc_builder/bin/europa -I C:/altera/11.0/quartus/sopc_builder/bin/perl_lib -I C:/altera/11.0/quartus/sopc_builder/bin -I C:/altera/11.0/quartus/../ip/altera/nios2_ip/altera_nios2/cpu_lib -I C:/altera/11.0/quartus/../ip/altera/nios2_ip/altera_nios2/nios_lib -I C:/altera/11.0/quartus/../ip/altera/nios2_ip/altera_nios2 -I C:/altera/11.0/quartus/../ip/altera/nios2_ip/altera_nios2 -- C:/altera/11.0/quartus/../ip/altera/nios2_ip/altera_nios2/generate_rtl.epl --name=uC_cpu --dir=C:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0016_cpu_gen/ --quartus_dir=C:/altera/11.0/quartus --verilog --config=C:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0016_cpu_gen//uC_cpu_processor_configuration.pl --do_build_sim=0 --bogus ] 2012.08.14.17:02:22 [Info] cpu: # 2012.08.14 17:02:19 (*) Starting Nios II generation 2012.08.14.17:02:22 [Info] cpu: # 2012.08.14 17:02:19 (*) No license required to generate encrypted Nios II/e. 2012.08.14.17:02:22 [Info] cpu: # 2012.08.14 17:02:19 (*) Elaborating CPU configuration settings 2012.08.14.17:02:22 [Info] cpu: # 2012.08.14 17:02:19 (*) Creating all objects for CPU 2012.08.14.17:02:22 [Info] cpu: # 2012.08.14 17:02:20 (*) Generating RTL from CPU objects 2012.08.14.17:02:22 [Info] cpu: # 2012.08.14 17:02:20 (*) Creating plain-text RTL 2012.08.14.17:02:22 [Info] cpu: # 2012.08.14 17:02:22 (*) Done Nios II generation 2012.08.14.17:02:22 [Info] cpu: Done RTL generation for module 'uC_cpu' 2012.08.14.17:02:22 [Info] cpu: "uC" instantiated altera_nios2_qsys "cpu" 2012.08.14.17:02:22 [Debug] uC: queue size: 116 starting:altera_avalon_sysid_qsys "submodules/uC_sysid" 2012.08.14.17:02:22 [Info] sysid: "uC" instantiated altera_avalon_sysid_qsys "sysid" 2012.08.14.17:02:22 [Debug] uC: queue size: 115 starting:altera_tristate_conduit_bridge "submodules/uC_tri_state_bridge_0_bridge_0" 2012.08.14.17:02:22 [Info] tri_state_bridge_0_bridge_0: "uC" instantiated altera_tristate_conduit_bridge "tri_state_bridge_0_bridge_0" 2012.08.14.17:02:22 [Debug] uC: queue size: 114 starting:altera_tristate_conduit_pin_sharer "submodules/uC_tri_state_bridge_0_pinSharer_0" 2012.08.14.17:02:22 [Info] tri_state_bridge_0_pinSharer_0: Running transform AvalonTransform 2012.08.14.17:02:22 [Debug] Transform: PipelineBridgeSwap 2012.08.14.17:02:23 [Info] pipeline_bridge_swap_transform: After transform: 4 modules, 7 connections 2012.08.14.17:02:23 [Debug] Transform: ClockCrossingBridgeSwap 2012.08.14.17:02:23 [Debug] Transform: QsysBetaIPSwap 2012.08.14.17:02:23 [Debug] Transform: CustomInstructionTransform 2012.08.14.17:02:23 [Info] No custom instruction connections, skipping transform 2012.08.14.17:02:23 [Debug] Transform: TristateConduitUpgradeTransform 2012.08.14.17:02:23 [Debug] Transform: TranslatorTransform 2012.08.14.17:02:23 [Info] No Avalon connections, skipping transform 2012.08.14.17:02:23 [Debug] Transform: DomainTransform 2012.08.14.17:02:24 [Debug] Transform: RouterTransform 2012.08.14.17:02:24 [Debug] Transform: TrafficLimiterTransform 2012.08.14.17:02:24 [Debug] Transform: BurstTransform 2012.08.14.17:02:24 [Debug] Transform: ResetAdaptation 2012.08.14.17:02:24 [Debug] Transform: NetworkToSwitchTransform 2012.08.14.17:02:24 [Debug] Transform: WidthTransform 2012.08.14.17:02:24 [Debug] Transform: RouterTableTransform 2012.08.14.17:02:24 [Debug] Transform: ClockCrossingTransform 2012.08.14.17:02:25 [Debug] Transform: TrafficLimiterUpdateTransform 2012.08.14.17:02:25 [Debug] Transform: InterruptMapperTransform 2012.08.14.17:02:25 [Debug] Transform: InterruptSyncTransform 2012.08.14.17:02:25 [Debug] Transform: InterruptFanoutTransform 2012.08.14.17:02:25 [Info] tri_state_bridge_0_pinSharer_0: Running transform AvalonTransform took 2.846s 2012.08.14.17:02:25 [Debug] tri_state_bridge_0_pinSharer_0: "tri_state_bridge_0_pinSharer_0" reuses altera_tristate_conduit_pin_sharer_core "submodules/uC_tri_state_bridge_0_pinSharer_0_pin_sharer" 2012.08.14.17:02:25 [Debug] tri_state_bridge_0_pinSharer_0: "tri_state_bridge_0_pinSharer_0" reuses altera_merlin_std_arbitrator "submodules/uC_tri_state_bridge_0_pinSharer_0_arbiter" 2012.08.14.17:02:25 [Info] tri_state_bridge_0_pinSharer_0: "uC" instantiated altera_tristate_conduit_pin_sharer "tri_state_bridge_0_pinSharer_0" 2012.08.14.17:02:25 [Debug] uC: queue size: 115 starting:altera_generic_tristate_controller "submodules/uC_sram" 2012.08.14.17:02:25 [Info] sram: Running transform AvalonTransform 2012.08.14.17:02:25 [Debug] Transform: PipelineBridgeSwap 2012.08.14.17:02:25 [Info] pipeline_bridge_swap_transform: After transform: 5 modules, 10 connections 2012.08.14.17:02:25 [Debug] Transform: ClockCrossingBridgeSwap 2012.08.14.17:02:26 [Debug] Transform: QsysBetaIPSwap 2012.08.14.17:02:26 [Debug] Transform: CustomInstructionTransform 2012.08.14.17:02:26 [Info] No custom instruction connections, skipping transform 2012.08.14.17:02:26 [Debug] Transform: TristateConduitUpgradeTransform 2012.08.14.17:02:26 [Debug] Transform: TranslatorTransform 2012.08.14.17:02:26 [Debug] Transform merlin_translator_transform not run on matched interfaces tdt.avalon_universal_master_0 and slave_translator.avalon_universal_slave_0 2012.08.14.17:02:26 [Debug] Transform merlin_translator_transform not run on matched interfaces slave_translator.avalon_anti_slave_0 and tda.avalon_slave_0 2012.08.14.17:02:26 [Debug] Transform: DomainTransform 2012.08.14.17:02:27 [Debug] Transform merlin_domain_transform not run on matched interfaces tdt.avalon_universal_master_0 and slave_translator.avalon_universal_slave_0 2012.08.14.17:02:27 [Debug] Transform merlin_domain_transform not run on matched interfaces slave_translator.avalon_anti_slave_0 and tda.avalon_slave_0 2012.08.14.17:02:27 [Debug] Transform: RouterTransform 2012.08.14.17:02:27 [Debug] Transform: TrafficLimiterTransform 2012.08.14.17:02:27 [Debug] Transform: BurstTransform 2012.08.14.17:02:27 [Debug] Transform: ResetAdaptation 2012.08.14.17:02:27 [Debug] Transform: NetworkToSwitchTransform 2012.08.14.17:02:27 [Debug] Transform: WidthTransform 2012.08.14.17:02:27 [Debug] Transform: RouterTableTransform 2012.08.14.17:02:28 [Debug] Transform: ClockCrossingTransform 2012.08.14.17:02:28 [Debug] Transform: TrafficLimiterUpdateTransform 2012.08.14.17:02:28 [Debug] Transform: InterruptMapperTransform 2012.08.14.17:02:28 [Debug] Transform: InterruptSyncTransform 2012.08.14.17:02:28 [Debug] Transform: InterruptFanoutTransform 2012.08.14.17:02:28 [Info] sram: Running transform AvalonTransform took 3.246s 2012.08.14.17:02:28 [Debug] sram: "sram" reuses altera_tristate_controller_translator "submodules/altera_tristate_controller_translator" 2012.08.14.17:02:28 [Debug] sram: "sram" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2012.08.14.17:02:28 [Debug] sram: "sram" reuses altera_tristate_controller_aggregator "submodules/altera_tristate_controller_aggregator" 2012.08.14.17:02:28 [Info] sram: "uC" instantiated altera_generic_tristate_controller "sram" 2012.08.14.17:02:28 [Debug] uC: queue size: 117 starting:AD7689_Avalon_core "submodules/AD7689_Avalon_core" 2012.08.14.16:57:48 [Debug] set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files 2012.08.14.16:57:48 [Debug] Command: C:/altera/11.0/quartus/bin/quartus_map.exe not_a_project --generate_hdl_interface=D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/IP/AD7689/hdl/src/AD7689_Avalon_core.v --source=D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/ip/AD7689/hdl/src/write_master.v --source=D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/IP/AD7689/hdl/src/Eval_Board_interface.v --source=D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/IP/AD7689/hdl/src/AD7689_Avalon_core.v --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0001_sopcqmap/ 2012.08.14.16:57:49 [Debug] Command took 0.866s 2012.08.14.17:02:28 [Debug] set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files 2012.08.14.17:02:28 [Debug] Command: C:/altera/11.0/quartus/bin/quartus_map.exe "not_a_project" "--generate_hdl_interface=D:\\AD\\AnalogSVN\\CED1Z\\AD7689\\NiosCpu\\IP\\AD7689\\hdl\\src\\AD7689_Avalon_core.v" "--source=D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/ip/AD7689/hdl/src/write_master.v" "--source=D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/IP/AD7689/hdl/src/Eval_Board_interface.v" "--source=D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/IP/AD7689/hdl/src/AD7689_Avalon_core.v" "--set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0019_sopcqmap/" "--set=HDL_INTERFACE_INSTANCE_NAME=inst" "--set=HDL_INTERFACE_INSTANCE_ENTITY=AD7689_Avalon_core" "--set=HDL_INTERFACE_INSTANCE_PARAMETERS=DATAWIDTH=D\"16\";BYTEENABLEWIDTH=D\"2\";ADDRESSWIDTH=D\"32\";FIFODEPTH=D\"32\";FIFODEPTH_LOG2=D\"5\";FIFOUSEMEMORY=D\"1\";" 2012.08.14.17:02:29 [Debug] Command took 0.833s 2012.08.14.17:02:29 [Info] AD7689_0: "uC" instantiated AD7689_Avalon_core "AD7689_0" 2012.08.14.17:02:29 [Debug] uC: queue size: 116 starting:altera_merlin_master_translator "submodules/altera_merlin_master_translator" 2012.08.14.17:02:29 [Info] cpu_instruction_master_translator: "uC" instantiated altera_merlin_master_translator "cpu_instruction_master_translator" 2012.08.14.17:02:29 [Debug] uC: queue size: 112 starting:altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2012.08.14.17:02:29 [Info] cpu_jtag_debug_module_translator: "uC" instantiated altera_merlin_slave_translator "cpu_jtag_debug_module_translator" 2012.08.14.17:02:29 [Debug] uC: queue size: 99 starting:altera_merlin_master_agent "submodules/altera_merlin_master_agent" 2012.08.14.17:02:29 [Info] cpu_instruction_master_translator_avalon_universal_master_0_agent: "uC" instantiated altera_merlin_master_agent "cpu_instruction_master_translator_avalon_universal_master_0_agent" 2012.08.14.17:02:29 [Debug] uC: queue size: 95 starting:altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2012.08.14.17:02:29 [Info] cpu_jtag_debug_module_translator_avalon_universal_slave_0_agent: "uC" instantiated altera_merlin_slave_agent "cpu_jtag_debug_module_translator_avalon_universal_slave_0_agent" 2012.08.14.17:02:29 [Debug] uC: queue size: 94 starting:altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2012.08.14.17:02:29 [Info] cpu_jtag_debug_module_translator_avalon_universal_slave_0_agent_rsp_fifo: "uC" instantiated altera_avalon_sc_fifo "cpu_jtag_debug_module_translator_avalon_universal_slave_0_agent_rsp_fifo" 2012.08.14.17:02:29 [Debug] uC: queue size: 68 starting:altera_merlin_router "submodules/uC_addr_router" 2012.08.14.17:02:30 [Info] addr_router: "uC" instantiated altera_merlin_router "addr_router" 2012.08.14.17:02:30 [Debug] uC: queue size: 67 starting:altera_merlin_router "submodules/uC_addr_router_001" 2012.08.14.17:02:30 [Info] addr_router_001: "uC" instantiated altera_merlin_router "addr_router_001" 2012.08.14.17:02:30 [Debug] uC: queue size: 66 starting:altera_merlin_router "submodules/uC_addr_router_002" 2012.08.14.17:02:30 [Info] addr_router_002: "uC" instantiated altera_merlin_router "addr_router_002" 2012.08.14.17:02:30 [Debug] uC: queue size: 65 starting:altera_merlin_router "submodules/uC_addr_router_003" 2012.08.14.17:02:30 [Info] addr_router_003: "uC" instantiated altera_merlin_router "addr_router_003" 2012.08.14.17:02:30 [Debug] uC: queue size: 64 starting:altera_merlin_router "submodules/uC_id_router" 2012.08.14.17:02:30 [Info] id_router: "uC" instantiated altera_merlin_router "id_router" 2012.08.14.17:02:30 [Debug] uC: queue size: 63 starting:altera_merlin_router "submodules/uC_id_router_001" 2012.08.14.17:02:30 [Info] id_router_001: "uC" instantiated altera_merlin_router "id_router_001" 2012.08.14.17:02:30 [Debug] uC: queue size: 62 starting:altera_merlin_router "submodules/uC_id_router_002" 2012.08.14.17:02:30 [Info] id_router_002: "uC" instantiated altera_merlin_router "id_router_002" 2012.08.14.17:02:30 [Debug] uC: queue size: 61 starting:altera_merlin_router "submodules/uC_id_router_003" 2012.08.14.17:02:30 [Info] id_router_003: "uC" instantiated altera_merlin_router "id_router_003" 2012.08.14.17:02:30 [Debug] uC: queue size: 51 starting:altera_merlin_traffic_limiter "submodules/altera_merlin_traffic_limiter" 2012.08.14.17:02:30 [Info] limiter: "uC" instantiated altera_merlin_traffic_limiter "limiter" 2012.08.14.17:02:30 [Debug] uC: queue size: 47 starting:altera_merlin_burst_adapter "submodules/altera_merlin_burst_adapter" 2012.08.14.17:02:30 [Info] burst_adapter: "uC" instantiated altera_merlin_burst_adapter "burst_adapter" 2012.08.14.17:02:30 [Debug] uC: queue size: 46 starting:altera_reset_controller "submodules/altera_reset_controller" 2012.08.14.17:02:30 [Info] rst_controller: "uC" instantiated altera_reset_controller "rst_controller" 2012.08.14.17:02:30 [Debug] uC: queue size: 44 starting:altera_merlin_demultiplexer "submodules/uC_cmd_xbar_demux" 2012.08.14.17:02:30 [Info] cmd_xbar_demux: "uC" instantiated altera_merlin_demultiplexer "cmd_xbar_demux" 2012.08.14.17:02:30 [Debug] uC: queue size: 43 starting:altera_merlin_demultiplexer "submodules/uC_cmd_xbar_demux_001" 2012.08.14.17:02:31 [Info] cmd_xbar_demux_001: "uC" instantiated altera_merlin_demultiplexer "cmd_xbar_demux_001" 2012.08.14.17:02:31 [Debug] uC: queue size: 42 starting:altera_merlin_demultiplexer "submodules/uC_cmd_xbar_demux_002" 2012.08.14.17:02:31 [Info] cmd_xbar_demux_002: "uC" instantiated altera_merlin_demultiplexer "cmd_xbar_demux_002" 2012.08.14.17:02:31 [Debug] uC: queue size: 41 starting:altera_merlin_demultiplexer "submodules/uC_cmd_xbar_demux_003" 2012.08.14.17:02:31 [Info] cmd_xbar_demux_003: "uC" instantiated altera_merlin_demultiplexer "cmd_xbar_demux_003" 2012.08.14.17:02:31 [Debug] uC: queue size: 40 starting:altera_merlin_multiplexer "submodules/uC_cmd_xbar_mux" 2012.08.14.17:02:31 [Info] cmd_xbar_mux: "uC" instantiated altera_merlin_multiplexer "cmd_xbar_mux" 2012.08.14.17:02:31 [Debug] uC: queue size: 39 starting:altera_merlin_multiplexer "submodules/uC_cmd_xbar_mux_001" 2012.08.14.17:02:31 [Info] cmd_xbar_mux_001: "uC" instantiated altera_merlin_multiplexer "cmd_xbar_mux_001" 2012.08.14.17:02:31 [Info] Reusing file D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_merlin_arbitrator.sv 2012.08.14.17:02:31 [Debug] uC: queue size: 38 starting:altera_merlin_multiplexer "submodules/uC_cmd_xbar_mux_002" 2012.08.14.17:02:32 [Info] cmd_xbar_mux_002: "uC" instantiated altera_merlin_multiplexer "cmd_xbar_mux_002" 2012.08.14.17:02:32 [Info] Reusing file D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_merlin_arbitrator.sv 2012.08.14.17:02:32 [Debug] uC: queue size: 37 starting:altera_merlin_demultiplexer "submodules/uC_rsp_xbar_demux" 2012.08.14.17:02:32 [Info] rsp_xbar_demux: "uC" instantiated altera_merlin_demultiplexer "rsp_xbar_demux" 2012.08.14.17:02:32 [Debug] uC: queue size: 36 starting:altera_merlin_demultiplexer "submodules/uC_rsp_xbar_demux_001" 2012.08.14.17:02:32 [Info] rsp_xbar_demux_001: "uC" instantiated altera_merlin_demultiplexer "rsp_xbar_demux_001" 2012.08.14.17:02:32 [Debug] uC: queue size: 35 starting:altera_merlin_demultiplexer "submodules/uC_rsp_xbar_demux_002" 2012.08.14.17:02:32 [Info] rsp_xbar_demux_002: "uC" instantiated altera_merlin_demultiplexer "rsp_xbar_demux_002" 2012.08.14.17:02:32 [Debug] uC: queue size: 34 starting:altera_merlin_demultiplexer "submodules/uC_rsp_xbar_demux_003" 2012.08.14.17:02:32 [Info] rsp_xbar_demux_003: "uC" instantiated altera_merlin_demultiplexer "rsp_xbar_demux_003" 2012.08.14.17:02:32 [Debug] uC: queue size: 24 starting:altera_merlin_multiplexer "submodules/uC_rsp_xbar_mux" 2012.08.14.17:02:32 [Info] rsp_xbar_mux: "uC" instantiated altera_merlin_multiplexer "rsp_xbar_mux" 2012.08.14.17:02:32 [Info] Reusing file D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_merlin_arbitrator.sv 2012.08.14.17:02:32 [Debug] uC: queue size: 23 starting:altera_merlin_multiplexer "submodules/uC_rsp_xbar_mux_001" 2012.08.14.17:02:32 [Info] rsp_xbar_mux_001: "uC" instantiated altera_merlin_multiplexer "rsp_xbar_mux_001" 2012.08.14.17:02:32 [Info] Reusing file D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_merlin_arbitrator.sv 2012.08.14.17:02:32 [Debug] uC: queue size: 22 starting:altera_merlin_multiplexer "submodules/uC_rsp_xbar_mux_002" 2012.08.14.17:02:33 [Info] rsp_xbar_mux_002: "uC" instantiated altera_merlin_multiplexer "rsp_xbar_mux_002" 2012.08.14.17:02:33 [Info] Reusing file D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_merlin_arbitrator.sv 2012.08.14.17:02:33 [Debug] uC: queue size: 21 starting:altera_merlin_width_adapter "submodules/altera_merlin_width_adapter" 2012.08.14.17:02:33 [Info] width_adapter: "uC" instantiated altera_merlin_width_adapter "width_adapter" 2012.08.14.17:02:33 [Info] Reusing file D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_merlin_burst_uncompressor.sv 2012.08.14.17:02:33 [Debug] uC: queue size: 15 starting:altera_avalon_st_handshake_clock_crosser "submodules/altera_avalon_st_handshake_clock_crosser" 2012.08.14.17:02:33 [Info] crosser: "uC" instantiated altera_avalon_st_handshake_clock_crosser "crosser" 2012.08.14.17:02:33 [Info] Reusing file D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_avalon_st_pipeline_base.v 2012.08.14.17:02:33 [Debug] uC: queue size: 13 starting:altera_irq_mapper "submodules/uC_irq_mapper" 2012.08.14.17:02:33 [Info] irq_mapper: "uC" instantiated altera_irq_mapper "irq_mapper" 2012.08.14.17:02:33 [Debug] uC: queue size: 12 starting:altera_jtag_dc_streaming "submodules/altera_avalon_st_jtag_interface" 2012.08.14.16:57:50 [Debug] set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files 2012.08.14.16:57:50 [Debug] Command: C:/altera/11.0/quartus/bin/quartus_sh.exe -t C:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0003_sopcqmap/not_a_project_setup.tcl 2012.08.14.16:57:50 [Debug] Command: C:/altera/11.0/quartus/bin/quartus_map.exe not_a_project --generate_hdl_interface=C:/altera/11.0/ip/altera/sopc_builder_ip/altera_avalon_jtag_phy/altera_avalon_st_jtag_interface.v --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0003_sopcqmap/ 2012.08.14.16:57:52 [Debug] Command took 1.172s 2012.08.14.16:57:52 [Debug] Command took 0.662s 2012.08.14.17:02:33 [Debug] set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files 2012.08.14.17:02:33 [Debug] Command: C:/altera/11.0/quartus/bin/quartus_sh.exe -t C:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0043_sopcqmap/not_a_project_setup.tcl 2012.08.14.17:02:33 [Debug] Command: C:/altera/11.0/quartus/bin/quartus_map.exe "not_a_project" "--generate_hdl_interface=C:\\altera\\11.0\\ip\\altera\\sopc_builder_ip\\altera_avalon_jtag_phy\\altera_avalon_st_jtag_interface.v" "--set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0043_sopcqmap/" "--set=HDL_INTERFACE_INSTANCE_NAME=inst" "--set=HDL_INTERFACE_INSTANCE_ENTITY=altera_avalon_st_jtag_interface" "--set=HDL_INTERFACE_INSTANCE_PARAMETERS=PURPOSE=D\"1\";UPSTREAM_FIFO_SIZE=D\"0\";DOWNSTREAM_FIFO_SIZE=D\"0\";USE_PLI=D\"0\";PLI_PORT=D\"50000\";" 2012.08.14.17:02:34 [Debug] Command took 0.966s 2012.08.14.17:02:34 [Debug] Command took 0.712s 2012.08.14.17:02:34 [Info] jtag_phy_embedded_in_jtag_master: "mm_console_master" instantiated altera_jtag_dc_streaming "jtag_phy_embedded_in_jtag_master" 2012.08.14.17:02:34 [Info] Reusing file D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_avalon_st_clock_crosser.v 2012.08.14.17:02:34 [Info] Reusing file D:/AD/AnalogSVN/CED1Z/AD7689/NiosCpu/uC/synthesis/submodules/altera_avalon_st_pipeline_base.v 2012.08.14.17:02:34 [Debug] uC: queue size: 11 starting:timing_adapter "submodules/uC_mm_console_master_timing_adt" 2012.08.14.17:02:34 [Info] timing_adt: Starting generation. 2012.08.14.17:02:34 [Info] timing_adt: "mm_console_master" instantiated timing_adapter "timing_adt" 2012.08.14.17:02:34 [Debug] uC: queue size: 9 starting:altera_avalon_st_bytes_to_packets "submodules/altera_avalon_st_bytes_to_packets" 2012.08.14.16:57:52 [Debug] set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files 2012.08.14.16:57:52 [Debug] Command: C:/altera/11.0/quartus/bin/quartus_map.exe not_a_project --generate_hdl_interface=C:/altera/11.0/ip/altera/sopc_builder_ip/altera_avalon_st_bytes_to_packets/altera_avalon_st_bytes_to_packets.v --source=C:/altera/11.0/ip/altera/sopc_builder_ip/altera_avalon_st_bytes_to_packets/altera_avalon_st_bytes_to_packets.v --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0004_sopcqmap/ 2012.08.14.16:57:53 [Debug] Command took 0.761s 2012.08.14.17:02:34 [Debug] set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files 2012.08.14.17:02:34 [Debug] Command: C:/altera/11.0/quartus/bin/quartus_map.exe "not_a_project" "--generate_hdl_interface=C:\\altera\\11.0\\ip\\altera\\sopc_builder_ip\\altera_avalon_st_bytes_to_packets\\altera_avalon_st_bytes_to_packets.v" "--source=C:/altera/11.0/ip/altera/sopc_builder_ip/altera_avalon_st_bytes_to_packets/altera_avalon_st_bytes_to_packets.v" "--set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0044_sopcqmap/" "--set=HDL_INTERFACE_INSTANCE_NAME=inst" "--set=HDL_INTERFACE_INSTANCE_ENTITY=altera_avalon_st_bytes_to_packets" "--set=HDL_INTERFACE_INSTANCE_PARAMETERS=CHANNEL_WIDTH=D\"8\";ENCODING=D\"0\";" 2012.08.14.17:02:35 [Debug] Command took 0.824s 2012.08.14.17:02:35 [Info] b2p: "mm_console_master" instantiated altera_avalon_st_bytes_to_packets "b2p" 2012.08.14.17:02:35 [Debug] uC: queue size: 8 starting:altera_avalon_st_packets_to_bytes "submodules/altera_avalon_st_packets_to_bytes" 2012.08.14.16:57:53 [Debug] set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files 2012.08.14.16:57:53 [Debug] Command: C:/altera/11.0/quartus/bin/quartus_map.exe not_a_project --generate_hdl_interface=C:/altera/11.0/ip/altera/sopc_builder_ip/altera_avalon_st_packets_to_bytes/altera_avalon_st_packets_to_bytes.v --source=C:/altera/11.0/ip/altera/sopc_builder_ip/altera_avalon_st_packets_to_bytes/altera_avalon_st_packets_to_bytes.v --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0005_sopcqmap/ 2012.08.14.16:57:54 [Debug] Command took 0.772s 2012.08.14.17:02:35 [Debug] set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files 2012.08.14.17:02:35 [Debug] Command: C:/altera/11.0/quartus/bin/quartus_map.exe "not_a_project" "--generate_hdl_interface=C:\\altera\\11.0\\ip\\altera\\sopc_builder_ip\\altera_avalon_st_packets_to_bytes\\altera_avalon_st_packets_to_bytes.v" "--source=C:/altera/11.0/ip/altera/sopc_builder_ip/altera_avalon_st_packets_to_bytes/altera_avalon_st_packets_to_bytes.v" "--set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0045_sopcqmap/" "--set=HDL_INTERFACE_INSTANCE_NAME=inst" "--set=HDL_INTERFACE_INSTANCE_ENTITY=altera_avalon_st_packets_to_bytes" "--set=HDL_INTERFACE_INSTANCE_PARAMETERS=CHANNEL_WIDTH=D\"8\";ENCODING=E\"\'0\'\";" 2012.08.14.17:02:36 [Debug] Command took 0.845s 2012.08.14.17:02:36 [Info] p2b: "mm_console_master" instantiated altera_avalon_st_packets_to_bytes "p2b" 2012.08.14.17:02:36 [Debug] uC: queue size: 7 starting:altera_avalon_packets_to_master "submodules/altera_avalon_packets_to_master" 2012.08.14.16:57:54 [Debug] set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files 2012.08.14.16:57:54 [Debug] Command: C:/altera/11.0/quartus/bin/quartus_map.exe not_a_project --generate_hdl_interface=C:/altera/11.0/ip/altera/sopc_builder_ip/altera_avalon_packets_to_master/altera_avalon_packets_to_master.v --source=C:/altera/11.0/ip/altera/sopc_builder_ip/altera_avalon_packets_to_master/altera_avalon_packets_to_master.v --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0006_sopcqmap/ 2012.08.14.16:57:55 [Debug] Command took 0.812s 2012.08.14.17:02:36 [Debug] set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files 2012.08.14.17:02:36 [Debug] Command: C:/altera/11.0/quartus/bin/quartus_map.exe "not_a_project" "--generate_hdl_interface=C:\\altera\\11.0\\ip\\altera\\sopc_builder_ip\\altera_avalon_packets_to_master\\altera_avalon_packets_to_master.v" "--source=C:/altera/11.0/ip/altera/sopc_builder_ip/altera_avalon_packets_to_master/altera_avalon_packets_to_master.v" "--set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/COSTIN~1/AppData/Local/Temp/alt5566_5706488927584680067.dir/0046_sopcqmap/" "--set=HDL_INTERFACE_INSTANCE_NAME=inst" "--set=HDL_INTERFACE_INSTANCE_ENTITY=altera_avalon_packets_to_master" "--set=HDL_INTERFACE_INSTANCE_PARAMETERS=EXPORT_MASTER_SIGNALS=D\"0\";FAST_VER=D\"0\";FIFO_DEPTHS=D\"2\";FIFO_WIDTHU=D\"1\";" 2012.08.14.17:02:37 [Debug] Command took 0.853s 2012.08.14.17:02:37 [Info] transacto: "mm_console_master" instantiated altera_avalon_packets_to_master "transacto" 2012.08.14.17:02:37 [Debug] uC: queue size: 6 starting:channel_adapter "submodules/uC_mm_console_master_b2p_adapter" 2012.08.14.17:02:37 [Info] b2p_adapter: Starting generation. 2012.08.14.17:02:37 [Info] b2p_adapter: "mm_console_master" instantiated channel_adapter "b2p_adapter" 2012.08.14.17:02:37 [Debug] uC: queue size: 5 starting:channel_adapter "submodules/uC_mm_console_master_p2b_adapter" 2012.08.14.17:02:37 [Info] p2b_adapter: Starting generation. 2012.08.14.17:02:37 [Info] p2b_adapter: "mm_console_master" instantiated channel_adapter "p2b_adapter" 2012.08.14.17:02:37 [Debug] uC: queue size: 4 starting:altera_tristate_conduit_pin_sharer_core "submodules/uC_tri_state_bridge_0_pinSharer_0_pin_sharer" 2012.08.14.17:02:37 [Info] pin_sharer: "tri_state_bridge_0_pinSharer_0" instantiated altera_tristate_conduit_pin_sharer_core "pin_sharer" 2012.08.14.17:02:37 [Debug] uC: queue size: 3 starting:altera_merlin_std_arbitrator "submodules/uC_tri_state_bridge_0_pinSharer_0_arbiter" 2012.08.14.17:02:37 [Info] arbiter: "tri_state_bridge_0_pinSharer_0" instantiated altera_merlin_std_arbitrator "arbiter" 2012.08.14.17:02:37 [Debug] uC: queue size: 2 starting:altera_tristate_controller_translator "submodules/altera_tristate_controller_translator" 2012.08.14.17:02:37 [Info] tdt: "sram" instantiated altera_tristate_controller_translator "tdt" 2012.08.14.17:02:37 [Debug] uC: queue size: 0 starting:altera_tristate_controller_aggregator "submodules/altera_tristate_controller_aggregator" 2012.08.14.17:02:37 [Info] tda: "sram" instantiated altera_tristate_controller_aggregator "tda" 2012.08.14.17:02:37 [Info] uC: Done uC" with 60 modules, 190 files, 3085647 bytes