This shows you the differences between two versions of the page.
Next revision | Previous revision | ||
resources:quick-start:ad5791 [12 Feb 2013 15:58] – created Estibaliz Sanz | resources:quick-start:ad5791 [16 Apr 2013 16:18] (current) – text edits throughout Yuet Ng | ||
---|---|---|---|
Line 1: | Line 1: | ||
+ | ====== AD5781/ | ||
+ | ** Single, 18-/20-Bit, Voltage Output DACs, SPI Interface ** | ||
+ | ===== Features ===== | ||
+ | * High relative accuracy (INL): ±0.5 LSB maximum (18-bit [[adi> | ||
+ | * 1 ppm resolution, 1 ppm INL (20-bit [[adi> | ||
+ | * 7.5 nV/√Hz output noise spectral density | ||
+ | * 0.19 LSB long-term linearity error stability (20-bit [[adi> | ||
+ | * <0.05 ppm/°C temperature drift | ||
+ | * 1 μs output voltage settling time | ||
+ | * 1.4 nV-sec midscale glitch impulse | ||
+ | * Operating temperature range: −40°C to +125°C | ||
+ | * 20-lead TSSOP package | ||
+ | * Wide power supply range of up to ±16.5 V | ||
+ | * 35 MHz Schmitt triggered digital interface | ||
+ | * 1.8 V compatible digital interface | ||
+ | |||
+ | ===== Functional Block Diagram ===== | ||
+ | {{ : | ||
+ | <WRAP CENTERALIGN>// | ||
+ | <WRAP clear></ | ||
+ | \\ | ||
+ | ===== Pin Configuration ===== | ||
+ | <WRAP CENTERALIGN> | ||
+ | <WRAP CENTERALIGN>// | ||
+ | <WRAP clear></ | ||
+ | \\ | ||
+ | \\ | ||
+ | |||
+ | **Table 1. Function Descriptions for Quick Start** | ||
+ | \\ | ||
+ | ^ | ||
+ | |INV | Inverting input connection for external amplifier.| | ||
+ | |V< | ||
+ | |V< | ||
+ | |V< | ||
+ | |V< | ||
+ | |< | ||
+ | |< | ||
+ | |< | ||
+ | |V< | ||
+ | |IOV< | ||
+ | |SDO | ||
+ | |SDIN | Serial data input. | ||
+ | |SCLK | Serial clock input. Data can be transferred at clock rates of up to 35 MHz. | | ||
+ | |< | ||
+ | |DGND | Ground reference for digital circuitry. | ||
+ | |V< | ||
+ | |V< | ||
+ | |V< | ||
+ | |AGND | Ground reference for analog circuitry. | ||
+ | |R< | ||
+ | |||
+ | |||
+ | \\ | ||
+ | \\ | ||
+ | ===== Hardware Control Pins Truth Table ===== | ||
+ | \\ | ||
+ | **Table 2. Hardware Control Pins Truth Table** | ||
+ | ^/ | ||
+ | |X< | ||
+ | |X< | ||
+ | |0 |0 | ||
+ | |0 |1 | ||
+ | |1 |0 | ||
+ | |⇓< | ||
+ | |⇓< | ||
+ | |⇑< | ||
+ | |⇑< | ||
+ | |1 |⇓< | ||
+ | |0 |⇓< | ||
+ | |1 |⇑< | ||
+ | |0 |⇑< | ||
+ | |||
+ | < | ||
+ | \\ | ||
+ | < | ||
+ | \\ | ||
+ | < | ||
+ | \\ | ||
+ | \\ | ||
+ | ===== Input Shift Register Contents ===== | ||
+ | |||
+ | \\ | ||
+ | {{ : | ||
+ | <WRAP CENTERALIGN>// | ||
+ | |||
+ | \\ | ||
+ | \\ | ||
+ | **Table 3. Register Address Definitions** | ||
+ | ^::: | ||
+ | ^Read/Write (R/ | ||
+ | |X< | ||
+ | |0 |0 |0 |1 |Write to the DAC register| | ||
+ | |0 |0 |1 |0 |Write to the control register| | ||
+ | |0 |0 |1 |1 |Write to the clearcode register| | ||
+ | |0 |1 |0 |0 |Write to the software control register | | ||
+ | |1 |0 |0 |1 |Read from the DAC register | | ||
+ | |1 |0 |1 |0 |Read from the control register| | ||
+ | |1 |0 |1 |1 |Read from the clearcode register| | ||
+ | < | ||
+ | \\ | ||
+ | \\ | ||
+ | |||
+ | |||
+ | |||
+ | ====Control Register==== | ||
+ | |||
+ | \\ | ||
+ | {{ : | ||
+ | <WRAP CENTERALIGN>// | ||
+ | \\ | ||
+ | \\ | ||
+ | **Table 4. Control Register Functions** | ||
+ | ^Bit Name ^Description | ||
+ | |RBUF |Output amplifier configuration control. | ||
+ | |::: | ||
+ | |::: | ||
+ | |:::|1 (default)|Internal amplifier powered down. | | ||
+ | |OPGND | ||
+ | |::: | ||
+ | |::: | ||
+ | |:::|1 (default) | ||
+ | |DACTRI | ||
+ | |::: | ||
+ | |::: | ||
+ | |:::|1 (default) | ||
+ | |BIN/ | ||
+ | |::: | ||
+ | |:::|0 (default) | ||
+ | |::: | ||
+ | |SDODIS | ||
+ | |::: | ||
+ | |:::|0 (default) | ||
+ | |::: | ||
+ | |LIN COMP |Linearity error compensation for varying reference input spans. Note that the reference input span options for the [[adi> | ||
+ | |::: | ||
+ | |:::|0000 (default) | ||
+ | |::: | ||
+ | |::: | ||
+ | |::: | ||
+ | |::: | ||
+ | |R/< | ||
+ | |::: | ||
+ | |::: | ||
+ | |::: | ||
+ | \\ | ||
+ | \\ | ||
+ | ====Software Control Register==== | ||
+ | |||
+ | \\ | ||
+ | {{ : | ||
+ | <WRAP CENTERALIGN>// | ||
+ | \\ | ||
+ | \\ | ||
+ | **Table 5. Software Control Register Functions** | ||
+ | ^Bit Name ^Description | ||
+ | |LDAC< | ||
+ | |CLR< | ||
+ | |RESET | ||
+ | < | ||
+ | < | ||
+ | |||
+ | \\ | ||
+ | \\ | ||
+ | \\ | ||
+ | ===== Transfer Function ===== | ||
+ | \\ | ||
+ | < | ||
+ | \\ | ||
+ | where: | ||
+ | // | ||
+ | // | ||
+ | //D// is the 18-bit ([[adi> | ||
+ | //N// is the number of bits. \\ | ||
+ | \\ | ||
+ | \\ | ||
+ | ===== Example 1: Initializing and Writing to the DAC Register ===== | ||
+ | \\ | ||
+ | === Initializing the DAC === | ||
+ | <WRAP tip> | ||
+ | |||
+ | To initialize the part, | ||
+ | * Because this initialization is a write to the part, set the R/< | ||
+ | * Keep the default mode for LIN COMP, SDODIS, and RBUF. | ||
+ | * To write in binary coding, select BIN/2sC = 1. | ||
+ | * Set DACTRI = 0 and OPGND = 0 to place the DAC in normal operating mode and remove the DAC output clamp to ground, respectively. | ||
+ | |||
+ | Write the following over the serial interface: 0010 0000 0000 0000 0001 0010 (R/< | ||
+ | \\ | ||
+ | \\ | ||
+ | See Table 6 and Figure 6. | ||
+ | \\ | ||
+ | \\ | ||
+ | **Table 6. Bit Settings to Initialize and Write to the Part** | ||
+ | ^Bit(s) | ||
+ | |23 |R/< | ||
+ | |[22: | ||
+ | |[9: | ||
+ | |5 |SDODIS | ||
+ | |4 |BIN/ | ||
+ | |3 |DACTRI | ||
+ | |2 |OPGND | ||
+ | |1 |RBUF | 1 |Internal amplifier powered down | | ||
+ | |||
+ | <WRAP center round important 60%> | ||
+ | To write in offset binary coding, set BIN/2sC = 1. | ||
+ | \\ | ||
+ | \\ | ||
+ | The default coding is twos complement. The same 24-bit data impacts the values that the user writes to or reads from the part in a different way depending on the coding selected. The user must verify the coding used by writing to the control register or reading | ||
+ | </ | ||
+ | </ | ||
+ | \\ | ||
+ | \\ | ||
+ | |||
+ | {{ : | ||
+ | <WRAP CENTERALIGN>// | ||
+ | \\ | ||
+ | \\ | ||
+ | === Writing to the DAC Register === | ||
+ | <WRAP tip>To write a midscale code to the DAC register, | ||
+ | * Set R/< | ||
+ | * Set C[2:0] = 001 for the correspondent register address. | ||
+ | * Set D[19:0], the data bits, for a midscale code. | ||
+ | The 24-bit data to write over the serial interface is as follows: | ||
+ | \\ | ||
+ | \\ | ||
+ | 18-bit [[adi> | ||
+ | \\ | ||
+ | 20-bit [[adi> | ||
+ | \\ | ||
+ | \\ | ||
+ | where X = don't care. | ||
+ | \\ | ||
+ | \\ | ||
+ | See Table 7 and Figure 7. | ||
+ | \\ | ||
+ | \\ | ||
+ | **Table 7. Bit Settings to Write to DAC Register** | ||
+ | ^Bit(s) | ||
+ | |23 |R/< | ||
+ | |[22: | ||
+ | </ | ||
+ | \\ | ||
+ | {{ : | ||
+ | <WRAP CENTERALIGN>// | ||
+ | \\ | ||
+ | |||
+ | \\ | ||
+ | \\ | ||
+ | ===== Example 2: Clearing the DAC to a Defined Value ===== | ||
+ | \\ | ||
+ | \\ | ||
+ | === Writing to the Clearcode Register === | ||
+ | <WRAP tip>To define the value at which the DAC output is set when the < | ||
+ | \\ | ||
+ | \\ | ||
+ | For a full-scale clear code, write the following over the serial interface: | ||
+ | \\ | ||
+ | \\ | ||
+ | 18-bit [[adi> | ||
+ | \\ | ||
+ | 20-bit [[adi> | ||
+ | \\ | ||
+ | \\ | ||
+ | where X = don't care. | ||
+ | \\ | ||
+ | \\ | ||
+ | See Figure 8. | ||
+ | \\ | ||
+ | \\ | ||
+ | </ | ||
+ | \\ | ||
+ | \\ | ||
+ | {{ : | ||
+ | <WRAP CENTERALIGN>// | ||
+ | \\ | ||
+ | \\ | ||
+ | === Writing to the Software Control Register === | ||
+ | <WRAP tip>Set the CLR bit to a Logic 1 to set the DAC register to a user defined value and update the DAC output. | ||
+ | \\ | ||
+ | \\ | ||
+ | Write the following over the serial interface: 0100 0000 0000 0000 0000 0010 | ||
+ | \\ | ||
+ | \\ | ||
+ | The user should see the DAC output value change to full-scale code. | ||
+ | \\ | ||
+ | \\ | ||
+ | See Figure 9. | ||
+ | </ | ||
+ | \\ | ||
+ | \\ | ||
+ | {{ : | ||
+ | <WRAP CENTERALIGN>// | ||
+ | \\ | ||
+ | \\ | ||
+ | === Reading From the Clearcode Register === | ||
+ | <WRAP tip>To confirm the clearcode value written to the part, read the data from the clearcode register (full scale for this example). | ||
+ | \\ | ||
+ | \\ | ||
+ | Write the following over the serial interface: | ||
+ | \\ | ||
+ | \\ | ||
+ | 1011 XXXX XXXX XXXX XXXX XXXX | ||
+ | \\ | ||
+ | \\ | ||
+ | where X = don't care. | ||
+ | \\ | ||
+ | \\ | ||
+ | See Figure 10. | ||
+ | \\ | ||
+ | \\ | ||
+ | <WRAP center round important 60%> | ||
+ | Note that this action is a read function. Therefore, set the R/< | ||
+ | \\ | ||
+ | \\ | ||
+ | D19 to D0, the data bits, are don't care bits because the intention is to read from the part, and not to write to the part. | ||
+ | </ | ||
+ | |||
+ | </ | ||
+ | \\ | ||
+ | \\ | ||
+ | {{ : | ||
+ | <WRAP CENTERALIGN>// | ||
+ | \\ |