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resources:fpga:xilinx:pmod:adxrs453 [25 May 2012 12:51]
ACozma [More information] 		resources:fpga:xilinx:pmod:adxrs453 [12 Apr 2013 15:42] (current)
LucianS [Downloads]
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 Two reference designs are available for this part: Two reference designs are available for this part:
   * A design which shows how to acquire data from the ADXRS453 Gyroscope.   * A design which shows how to acquire data from the ADXRS453 Gyroscope.
-    * **HW Platform(s):** [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]] [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,401,940&Prod=PMODGYRO2|PmodGYRO2 (Digilent)]] \\+    * **HW Platform(s):**  
 +       * [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]]  
 +       * [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3|Nexys™3 Spartan-6 FPGA Board (Digilent)]]  
 +       * [[http://www.digilentinc.com/Products/Detail.cfm?Prod=PMOD-GYRO2|PmodGYRO2 (Digilent)]] \\
     * **System:** Microblaze, AXI, UART \\     * **System:** Microblaze, AXI, UART \\
  
   * A design which demonstrates how to acquire data and display it using Digilent PmodGYRO2 and PmodACL. Data acquired from PmodGYRO2 is displayed in Degrees per Second, and data acquired from PmodACL is displayed in g. Data is formatted in 4 columns.   * A design which demonstrates how to acquire data and display it using Digilent PmodGYRO2 and PmodACL. Data acquired from PmodGYRO2 is displayed in Degrees per Second, and data acquired from PmodACL is displayed in g. Data is formatted in 4 columns.
-    * **HW Platform(s):** [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]] [[http://www.digilentinc.com/Products/Detail.cfm?Prod=PMOD-ACL|Pmod-ACL (Digilent)]] [[http://www.digilentinc.com/Products/Detail.cfm?Prod=PMOD-GYRO2|Pmod-GYRO2 (Digilent)]] \\+    * **HW Platform(s):** [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]] [[http://www.digilentinc.com/Products/Detail.cfm?Prod=PMOD-ACL|PmodACL (Digilent)]] [[http://www.digilentinc.com/Products/Detail.cfm?Prod=PMOD-GYRO2|PmodGYRO2 (Digilent)]] \\
     * **System:** Microblaze, AXI, UART \\     * **System:** Microblaze, AXI, UART \\
  
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 ==== Required Hardware ==== ==== Required Hardware ====
   * [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]]   * [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]]
-  * [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,401,940&Prod=PMODGYRO2|PmodGYRO2 (Digilent)]]+  * [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3|Nexys™3 Spartan-6 FPGA Board (Digilent)]]  
 +  * [[http://www.digilentinc.com/Products/Detail.cfm?Prod=PMOD-GYRO2|PmodGYRO2 (Digilent)]]
  
  
 ==== Required Software ==== ==== Required Software ====
   * Xilinx ISE 13.2 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack).   * Xilinx ISE 13.2 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack).
-  * A UART terminal (Tera Term/Hyperterminal), Baud rate 9600.+  * A UART terminal (Tera Term/Hyperterminal), Baud rate 115200 for the Avnet LX-9 Microboard or 9600 for the Digilent Nexys™3 Board. 
  
  
 ==== Running Demo (SDK) Program ==== ==== Running Demo (SDK) Program ====
  
-<note tip>If you are not familiar with LX9 and/or Xilix tools, please visit\\ [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm]] for details. +<WRAP round 80% tip>If you are not familiar with LX9 and/or Xilix tools, please visit\\ [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm]] for details.\\ 
-</note> +If you are not familiar with Nexys™3 and/or Xilix tools, please visit\\ [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3]] for details. 
-Extract the project from the archive file (ADXRS453.zip) to the location you desire. +</WRAP>
  
-To begin, connect the PmodGYRO2 to J5 connector of LX9 board, pins 7 to 12 (see image below). You can use an extension cable for ease of use. Connect the USB cables from the PC to the board.+Extract the project from the archive file (ADXRS453_<board_name>.zip) to the location you desire.  
 + 
 +==== Avnet LX9 MicroBoard Setup ==== 
 + 
 +To begin, connect the PmodGYRO2 to J5 connector of LX9 board, pins 7 to 12 (see image below). You can use an extension cable for ease of use. Connect the USB cable from the PC to the USB-UART female connector of the board for the UART terminal. The board will be programmed through its USB male connector.
  
 {{:resources:fpga:xilinx:pmod:pmodgyro2_lx9.jpg?300|PmodGYRO2 and LX-9}} {{:resources:fpga:xilinx:pmod:pmodgyro2_lx9.jpg?300|PmodGYRO2 and LX-9}}
  
-Start IMPACT, and double click "Boundary Scan". Right click and select Initialize Chain. The program should recognize the Spartan 6 device (see screenshot below). Start a UART terminal (set to 9600 baud rate) and then program the device using the bit file provided in the project *.zip archive, located in the "sw" folder (../adxrs453/sw/ADXRS453.bit).+==== Digilent Nexys™3 Spartan-6 FPGA Board ==== 
 + 
 +To begin, connect the PmodGYRO2 to JA connector of Nexys™3 board, pins JA1 to JA6 (see image below). You can use an extension cable for ease of use. Connect the USB cables from the PC to the board, one for programming (Digilent USB device) and one for the UART terminal (FT232R USB UART). 
 + 
 +{{:resources:fpga:xilinx:pmod:pmodgyro2_nexys3.jpg?300|PmodGYRO2 and Nexys™3}} 
 + 
 +==== FPGA Configuration ==== 
 + 
 +Start IMPACT, and double click "Boundary Scan". Right click and select Initialize Chain. The program should recognize the Spartan 6 device (see screenshot below). Start a UART terminal (set to appropiate baud rate) and then program the device using the bit file provided in the project *.zip archive, located in the "sw" folder (../adxrs453/sw/ADXRS453.bit).
  
 {{:resources:fpga:xilinx:pmod:adxrs453.jpg?300|Programming FPGA in IMPACT}} {{:resources:fpga:xilinx:pmod:adxrs453.jpg?300|Programming FPGA in IMPACT}}
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 {{:resources:fpga:xilinx:pmod:adxrs453uart.jpg?300|UART messeges}} {{:resources:fpga:xilinx:pmod:adxrs453uart.jpg?300|UART messeges}}
  
-<note important>Information displayed in the Terminal Screen is in Degrees/Second, representing the rotation described by the Pmod around the marked Axis in the past second. If you rotate the Pmod slowly, you will see a smaller value (e.g. 30 Degrees/Second), while rotating the Pmod at a higher speed will result in a higher value (e.g. 300 Degrees/Second). Afterwards the device will auto calibrate according to its new position, thus displaying a value close to 0 Degrees/Second.</note>+<WRAP round 80% important>Information displayed in the Terminal Screen is in Degrees/Second, representing the rotation described by the Pmod around the marked Axis in the past second. If you rotate the Pmod slowly, you will see a smaller value (e.g. 30 Degrees/Second), while rotating the Pmod at a higher speed will result in a higher value (e.g. 300 Degrees/Second). Afterwards the device will auto calibrate according to its new position, thus displaying a value close to 0 Degrees/Second.</WRAP>
  
 ===== Using the reference design ===== ===== Using the reference design =====
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-<note important>Connecting the PmodGYRO2 to the LX-9 Board using an extension cable provides ease of use. \\ +<WRAP round 80% important> 
-UART must be set to 9600 baudrate.</note>+\\ 
 +Connecting the PmodGYRO2 to the boards using an extension cable provides ease of use. \\ 
 +UART must be set to 115200 Baud Rate for the Avnet LX-9 Microboard or 9600 Baud Rate for the Digilent Nexys™3 Board.</WRAP>
  
  
 ===== Downloads ===== ===== Downloads =====
-{{:resources:fpga:xilinx:pmod:adxrs453.zip|Reference design source code}}+<WRAP round download 80%> 
 +\\ 
 +{{:resources:fpga:xilinx:pmod:adxrs453_lx9.zip|Reference design source code for Avnet LX9 MicroBoard.}}\\ 
 +{{:resources:fpga:xilinx:pmod:adxrs453_nexys3.zip|Reference design source code for Digilent Nexys™3 Spartan-6 FPGA Board.}}\\ 
 +</WRAP>
  
 ====== ADXRS453 Pmod and ADXL345 Pmod Reference Design ====== ====== ADXRS453 Pmod and ADXL345 Pmod Reference Design ======
-{{page>adxrs453_adxl345_lx9}}+{{page>resources:fpga:xilinx:pmod:adxrs453_adxl345_lx9}}
  
 ====== More information ====== ====== More information ======
   * [[ez>community/fpga|ask questions about the FPGA reference design]]   * [[ez>community/fpga|ask questions about the FPGA reference design]]
   * Example questions: {{rss>http://ez.analog.com/community/feeds/allcontent/atom?community=2061 5 author 1d}}   * Example questions: {{rss>http://ez.analog.com/community/feeds/allcontent/atom?community=2061 5 author 1d}}

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