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resources:fpga:xilinx:pmod:adxl345 [25 May 2012 12:45]
ACozma [More information]
resources:fpga:xilinx:pmod:adxl345 [12 Apr 2013 15:26] (current)
LucianS [Downloads]
Line 3: Line 3:
 ===== Introduction ===== ===== Introduction =====
  
-The [[adi>ADXL345]] is a high resolution (13-bits)3-axis accelerometer for measurements at and up to __+__16gThis reference design allows full programming of the device and reports the measurements along the axes as well as single tap, double tap and free fall.+The [[adi>ADXL345]] is a small, thin, ultralow power, 3-axis accelerometer with high resolution (13-bitmeasurement at up to ±16 gDigital output data is formatted as 16-bit twos complement and is accessible through either a SPI (3- or 4-wire) or I2C digital interface. The ADXL345 is well suited for mobile device applications. It measures the static acceleration of gravity in tilt-sensing applications, as well as dynamic acceleration resulting from motion or shock. Its high resolution (3.9 mg/LSB) enables measurement of inclination changes less than 1.0°.
  
-Two reference designs are available for this part: +**HW Platform(s):**  
-  * A design which shows how to acquire data from the ADXL345 Accelerometer. +   * [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]]  
-    * **HW Platform(s):** [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]] [[http://www.digilentinc.com/Products/Detail.cfm?Prod=PMOD-ACL|Pmod-ACL (Digilent)]] \\ +   * [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3|Nexys™3 Spartan-6 FPGA Board (Digilent)]]  
-    **System:** Microblaze, AXI, UART \\+   [[http://www.digilentinc.com/Products/Detail.cfm?Prod=PMOD-ACL|PmodACL (Digilent)]] \\
  
-  * A design which demonstrates how to acquire data and display it using Digilent PmodGYRO2 and PmodACL. Data acquired from PmodGYRO2 is displayed in Degrees per Second, and data acquired from PmodACL is displayed in g. Data is formatted in 4 columns. +**System:** Microblaze, AXI, UART \\
-    * **HW Platform(s):** [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]] [[http://www.digilentinc.com/Products/Detail.cfm?Prod=PMOD-ACL|Pmod-ACL (Digilent)]] [[http://www.digilentinc.com/Products/Detail.cfm?Prod=PMOD-GYRO2|Pmod-GYRO2 (Digilent)]] \\ +
-    * **System:** Microblaze, AXI, UART \\ +
- +
-====== ADXL345 Pmod Reference Design ======+
 ===== Quick Start Guide ===== ===== Quick Start Guide =====
  
-The bit file provided in the project *.tar.gz file combines the FPGA bit file and the SDK elf files. It may be used for a quick check on the system. All you need is the hardware and a PC running a UART terminal and the programmer (IMPACT).+The bit file provided in the project *.zip file combines the FPGA bit file and the SDK elf files. It may be used for a quick check on the system. All you need is the hardware and a PC running a UART terminal and the programmer (IMPACT). 
  
 ==== Required Hardware ==== ==== Required Hardware ====
   * [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]]   * [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]]
-  * [[http://www.digilentinc.com/Products/Detail.cfm?Prod=PMOD-ACL|Pmod-ACL (Digilent)]] +  * [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3|Nexys™3 Spartan-6 FPGA Board (Digilent)]]   
 +  * [[http://www.digilentinc.com/Products/Detail.cfm?Prod=PMOD-ACL|PmodACL (Digilent)]]
  
 ==== Required Software ==== ==== Required Software ====
   * Xilinx ISE 13.2 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack).   * Xilinx ISE 13.2 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack).
-  * A UART terminal (Tera Term/Hyperterminal), Baud rate 115200.+  * A UART terminal (Tera Term/Hyperterminal), Baud rate 115200 for the Avnet LX-9 Microboard or 9600 for the Digilent Nexys™3 Board.
  
  
 ==== Running Demo (SDK) Program ==== ==== Running Demo (SDK) Program ====
  
-<note tip>If you are not familiar with LX9 and/or Xilix tools, please visit\\ [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm]] for details.+<note tip>If you are not familiar with LX9 and/or Xilix tools, please visit\\ [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm]] for details.\\ 
 +If you are not familiar with Nexys™3 and/or Xilix tools, please visit\\ [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3]] for details.
 </note> </note>
  
-Extract the project from the archive file (cf_adxl345.tar.gz) to the location you desire.+Extract the project from the archive file (ADXL345_<board_name>.zip) to the location you desire. 
  
-To begin, connect the PmodACL board to J4 connector of LX9 board (see image below). You may use a extension cable so that you could move the ADXL345 around/along various axes. Also both 12 pin and 6 pin connections are supported. Only the interrupt driven mode requires the 12 pin connection. Connect the USB cables from the PC to the board. +==== Avnet LX9 MicroBoard Setup ====
-  +
-{{:resources:fpga:xilinx:pmod:cf_adxl345_setup.jpg?200|Hardware setup}}+
  
-Start IMPACTand initialze the JTAG chain. The program should recognize the Spartan 6 device (see screenshot below). Start a UART terminal (set to 115200 baud rate) and then program the device using the bit file provided in the project *.tar.gz archive, located in the “sw” folder (../cf_adxl345/sw/cf_adxl345.bit).+To beginconnect the PmodACL to J5 connector of LX9 board (see image below). You can use an extension cable for ease of use. Connect the USB cable from the PC to the USB-UART female connector of the board for the UART terminalThe board will be programmed through its USB male connector.
  
-{{:resources:fpga:xilinx:pmod:cf_adxl345_impact.jpg?200|IMPACT}}+{{:resources:fpga:xilinx:pmod:pmodACL.jpg?200|PmodACL and LX-9}}
  
-If programming was successful, you should be seeing messages appear on the terminal as shown in figure below. After programming the ADXL345 device, the program continously monitors the X, Y and Z axes values as well as single tap, double tap and free fall detection. You may quit the program any time by pressing 'q' and then the 'Enter' key.+==== Digilent Nexys™3 Spartan-6 FPGA Board ====
  
-{{:resources:fpga:xilinx:pmod:cf_adxl345_uart_1.jpg?200|Terminal Main}} +To begin, connect the PmodACL to JA connector of NEXYS3 board (see image below)You can use an extension cable for ease of useConnect the USB cables from the PC to the board, one for programming (Digilent USB device) and one for the UART terminal (FT232R USB UART).
-{{:resources:fpga:xilinx:pmod:cf_adxl345_uart_2.jpg?200|Terminal Axes}} +
-{{:resources:fpga:xilinx:pmod:cf_adxl345_uart_3.jpg?200|Terminal ST/DT/FF}}+
  
-===== Using the reference design =====+{{:resources:fpga:xilinx:pmod:pmodacl_nexys3.jpg?200|PmodACL and Nexys™3}}
  
-==== Functional Description ====+==== FPGA Configuration ====
  
-The reference design is a simple SPI interface for the ADXL345. The software programs the device, monitors and reports the axessingle tap, double tap and free fallThe information is displayed on UART.+Start IMPACT, and double click "Boundary Scan". Right click and select Initialize Chain. The program should recognize the Spartan 6 device (see screenshot below). Start a UART terminal (set to appropiate baud rate) and then program the device using the bit file provided in the project *.zip archivelocated in the "sw" folder (../adxl345/sw/ADXL345.bit).
  
-The hardware supports both 12 pin and 6 pin connections.+{{:resources:fpga:xilinx:pmod:PmodACLImpact.jpg?200|Programming FPGA in IMPACT}}
  
-The hardware SPI access allows read or write of any ADXL345 registers via the addresswrite and read data registersA status output is connected to the 4 LED(son board as follows :-+If programming was successful, the **Main Menu** will apear in your UART terminalas seen in the picture belowThere are 7 options. Pressing [e], [d], [a], [s], [r], [t] or [q] key will allow you to select the desired option. 
 +After the end of every option, all the possible options (the Menuwill be shown again, allowing the user to make a new choice.
  
-STATUS_FF_ST Free fall/single tap \\ +{{:resources:fpga:xilinx:pmod:pmodacl_menu1.jpg?600|Main Menu}}\\
-STATUS_FF_DT Free fall/double tap \\ +
-STATUS_XY X/Y axis change \\ +
-STATUS_ZZ axis change \\+
  
-In most cases, a simple SPI access is all the software needHowever, in order to reduce the overhead on software running on Microblaze SDK (to keep I/D BRAM small), a hardware assisted mode is provided. In this mode, hardware mirrors a few key registers of ADXL345 in it's own address space.+**Enable Measurement** sets the ADXL345 into measurement modeAny measurement that takes place from that moment on will be valid data.
  
-The hardware supports three modes of operation:+{{:resources:fpga:xilinx:pmod:pmodacl_menu2.jpg?600|Enable Measurement}}\\
  
-Software triggered: In this mode, software must initiate the read to update the mirrored registers. \\ +**Disable Measurement** sets the ADXL345 into standby mode. Any measurement that takes place from that moment will not be valid data (usually 0).
-Interrupt triggered: In this mode, ADXL345's INT1, INT2 pins trigger update of the mirrored registers\\ +
-Free run: In this mode, hardware free runs and continously updates the mirrored registers\\+
  
-==== Registers ==== +{{:resources:fpga:xilinx:pmod:pmodacl_menu3.jpg?600|Disable Measurement}}\\
-^ QW Address<sup>1</sup> ^ Bits ^ Default ^ Name ^ Description ^ +
-| 0x00 | 7 | 0 | mode | Free run (0x1) or sw/hw controlled (0x0). | +
-|      | 6 | 0 | int_inv | Invert (0x1) interrupt pins. | +
-|      | 5 | 0 | access  | SPI access sw (0x1) or hw (0x0). | +
-|      | 4 | 0 | trigger | Software trigger, requires a 0x0 to 0x1 transition. | +
-|      | 3:0 | 0 | status | Software status, ignored if hardware is active. | +
-| 0x01 | 31 | 0 | rwn | SPI access, read (0x1) or write (0x0). | +
-|      | 29:24 | 0 | addr | SPI access, address. | +
-|      | 23:16 | 0 | wdata | SPI access, write data. | +
-|      | 15 | 0 | done | SPI access, complete (0x1) or busy (0x0). | +
-|      | 7:0 | 0 | rdata | SPI access, read data. | +
-| The following registers are provided for simultaneous access in free run and interrupt triggered modes ||||| +
-| 0x03 | 15:0 | 0 | x_axis | X Axis data. | +
-| 0x04 | 15:0 | 0 | y_axis | Y Axis data. | +
-| 0x05 | 15:0 | 0 | z_axis | Z Axis data. | +
-| 0x06 | 15:0 | 0 | x_axis | ACT/TAP data. | +
-| 0x07 | 15:0 | 0 | x_axis | INT source data. | +
-| 0x08 | 15:0 | 0 | x_axis | FIFO status data. | +
-| 0x09 | 3:0 | 0 | state | Hw state (for debug purposes only). | +
-| 1. For AXI-Lite byte addresses, multiply by 4. |||||+
  
 +**Display Acceleration** displays acceleration data on all 3 Axes.
  
 +{{:resources:fpga:xilinx:pmod:pmodacl_menu4.jpg?600|Acceleration on all 3 Axes}}\\
  
-==== Notes ====+**Select Measurement Range** allows choosing between 4 options: ±2g, ±4g, ±8g and ±16g. Desired measurement range is selected by pressing [1] to [4].
  
-PmodACL must be connected to J4, with pin 1 matching up on both the connectors. \\ +{{:resources:fpga:xilinx:pmod:pmodacl_menu5.jpg?600|Selecting Measurement Range}}\\
-UART must be set to 115200 baudrate. \\+
  
-**A debug data and trigger port is provided for internal monitoring of all the signals in the design.**+**Change Acquisition Rate** allows choosing different Acquisition rates for the ADXL345. Desired option is selected by pressing [1] to [9]
  
-===== Downloads =====+{{:resources:fpga:xilinx:pmod:pmodacl_menu6.jpg?600|Acquisition Rate}}\\
  
-{{:resources:fpga:xilinx:pmod:cf_adxl345.tar.gz|Reference design source code}}+**Select Tap Interrupts** allows enabling or disabling tap interrupts. Desired option is selected by pressing [1] to [4]. If the tap option selected is [1] or [3], after a single tap, D2 (LX9) / LD0 (Nexys3) will be ON. If the tap option selected is [2] or [3], after two consecutive taps, D3 and D2 (LX9) / LD1 and LD0 (Nexys3) will both be on at the same time. If the tap option selected is [4], no LEDs will be ON after a single or double tap. 
 + 
 +{{:resources:fpga:xilinx:pmod:pmodacl_menu7.jpg?600|Select Tap Interrupts}}\\ 
 + 
 +**Stop any ongoing action** will stop any display of measurements and afterwards display the Main Menu. 
 + 
 +{{:resources:fpga:xilinx:pmod:pmodacl_menu1.jpg?600|Stop actions}}\\ 
 + 
 +===== Using the reference design ===== 
 + 
 +==== Functional Description ==== 
 + 
 +The reference design is a SPI interface used to communicate with the device. The software programs the ADXL345s internal registers, and afterwards reads desired data from the device and prints it via UART. Three Interrupt signals are used in the design: one coming from the ADXL345, one from the UART and a timer interrupt (used for single and double tap LED signaling). 
 + 
 +<note important> 
 +  * Connecting the PmodACL to the boards using an extension cable provides ease of use. 
 +  * UART must be set to 115200 Baud Rate for the Avnet LX-9 Microboard or 9600 Baud Rate for the Digilent Nexys™3 Board. 
 +</note> 
 + 
 + 
 +===== Downloads ===== 
 +<WRAP round download 80%> 
 +\\ 
 +{{:resources:fpga:xilinx:pmod:adxl345_lx9.zip|Reference design source code for Avnet LX9 MicroBoard.}}\\ 
 +{{:resources:fpga:xilinx:pmod:adxl345_nexys3.zip|Reference design source code for Digilent Nexys™3 Spartan-6 FPGA Board.}} 
 +</WRAP>
  
-====== ADXRS453 Pmod and ADXL345 Pmod Reference Design ====== 
-{{page>adxrs453_adxl345_lx9}} 
  
-====== More information ======+===== More information =====
   * [[ez>community/fpga|ask questions about the FPGA reference design]]   * [[ez>community/fpga|ask questions about the FPGA reference design]]
   * Example questions: {{rss>http://ez.analog.com/community/feeds/allcontent/atom?community=2061 5 author 1d}}   * Example questions: {{rss>http://ez.analog.com/community/feeds/allcontent/atom?community=2061 5 author 1d}}