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resources:fpga:xilinx:pmod:ad7476a [25 May 2012 12:44]
ACozma [More information]
resources:fpga:xilinx:pmod:ad7476a [12 Apr 2013 15:28] (current)
LucianS [Downloads]
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 Two reference designs are available for this part: Two reference designs are available for this part:
   * A design which shows how to program the **AD7476A ADC** and acquire data from it.   * A design which shows how to program the **AD7476A ADC** and acquire data from it.
-    * **HW Platform(s):** [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]] [[http://www.digilentinc.com/Products/Detail.cfm?Prod=PMOD-AD1|PmodAD1 (Digilent)]] \\+    * **HW Platform(s):**  
 +        * [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]] 
 +        * [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3|Nexys™3 Spartan-6 FPGA Board (Digilent)]]  
 +        * [[http://www.digilentinc.com/Products/Detail.cfm?Prod=PMOD-AD1|PmodAD1 (Digilent)]] \\
     * **System:** Microblaze, AXI, UART \\     * **System:** Microblaze, AXI, UART \\
  
-  * A design which demonstrates how to acquire a signal and reproduce it using Digilent PmodAD1 and PmodDA1. Four types of waveforms (Square, Sine, Sawtooth and Triangle) are generated using the **AD7303 DAC** present on the PmodDA1 board. Each waveform has a period of 25 ms, and lasts for 25 s (1000 periods). A loopback cable is connected between the output of the **AD7303 DAC** and the input of the **AD7476 ADC** present on the PmodAD1 board. The Xilinx ChipScope Analyzer tool is used to verify the digitized waveforms.+  * A design which demonstrates how to acquire a signal and reproduce it using Digilent PmodAD1 and PmodDA1. Four types of waveforms (Square, Sine, Sawtooth and Triangle) are generated using the **AD7303 DAC** present on the PmodDA1 board. Each waveform has a period of 25 ms, and lasts for 25 s (1000 periods). A loopback cable is connected between the output of the **AD7303 DAC** (A1 Output) and the input of the **AD7476 ADC** (A0 input) present on the PmodAD1 board. The Xilinx ChipScope Analyzer tool is used to verify the digitized waveforms.
     * **HW Platform(s):** [[http://digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3|Nexys™3 Spartan-6 FPGA Board (Digilent)]] [[http://www.digilentinc.com/Products/Detail.cfm?Prod=PMOD-AD1|PmodAD1 (Digilent)]] [[http://www.digilentinc.com/Products/Detail.cfm?Prod=PMOD-DA1|PmodDA1 (Digilent)]] \\     * **HW Platform(s):** [[http://digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3|Nexys™3 Spartan-6 FPGA Board (Digilent)]] [[http://www.digilentinc.com/Products/Detail.cfm?Prod=PMOD-AD1|PmodAD1 (Digilent)]] [[http://www.digilentinc.com/Products/Detail.cfm?Prod=PMOD-DA1|PmodDA1 (Digilent)]] \\
     * **System:** Microblaze, AXI, UART \\     * **System:** Microblaze, AXI, UART \\
- 
 ====== AD7476A Pmod Reference Design ====== ====== AD7476A Pmod Reference Design ======
 ===== Quick Start Guide ===== ===== Quick Start Guide =====
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 ==== Required Hardware ==== ==== Required Hardware ====
   * [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]]    * [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]] 
 +  * [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3|Nexys™3 Spartan-6 FPGA Board (Digilent)]]
   * [[http://www.digilentinc.com/Products/Detail.cfm?Prod=PMOD-AD1|PmodAD1 (Digilent)]]   * [[http://www.digilentinc.com/Products/Detail.cfm?Prod=PMOD-AD1|PmodAD1 (Digilent)]]
  
 ==== Required Software ==== ==== Required Software ====
-  * Xilinx ISE 13.(Programmer (IMPACT) is sufficient for the demo and is available on Webpack). +  * Xilinx ISE 14.(Programmer (IMPACT) is sufficient for the demo and is available on Webpack). 
-  * A UART terminal (Tera Term/Hyperterminal), Baud rate 57600. +  * A UART terminal (Tera Term/Hyperterminal), Baud rate 115200 for the Avnet LX-9 Microboard or 9600 for the Digilent Nexys™3 Board.
  
 ==== Running Demo (SDK) Program ==== ==== Running Demo (SDK) Program ====
  
-<note tip>If you are not familiar with LX9 and/or Xilix tools, please visit\\ [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm]] for details. +<WRAP round 80% tip>If you are not familiar with LX9 and/or Xilix tools, please visit\\ [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm]] for details.\\ 
-</note+If you are not familiar with Nexys™3 and/or Xilix tools, please visit\\ [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3]] for details. 
-Extract the project from the archive file (AD7476A.zip) to the location you desire. +</WRAP
 +Extract the project from the archive file (AD7476A_<board_name>.zip) to the location you desire. 
  
-To begin, connect the PmodAD1 to J5 connector of LX9 board, pins 1 to 6 (see image below). You can use an extension cable for ease of use. Connect the USB cables from the PC to the board.+==== Avnet LX9 MicroBoard Setup ==== 
 +To begin, connect the PmodAD1 to J5 connector of LX9 board, pins 1 to 6 (see image below). You can use an extension cable for ease of use. Connect the USB cable from the PC to the USB-UART female connector of the board for the UART terminal. The board will be programmed through its USB male connector.
  
 {{:resources:fpga:xilinx:pmod:pmodad1.jpg?200|PmodAD1 and LX-9}} {{:resources:fpga:xilinx:pmod:pmodad1.jpg?200|PmodAD1 and LX-9}}
  
-Start IMPACT, and double click "Boundary Scan". Right click and select Initialize Chain. The program should recognize the Spartan 6 device (see screenshot below). Start a UART terminal (set to 57600 baud rate) and then program the device using the bit file provided in the project *.zip archive, located in the "sw" folder (../ad7476a/sw/AD7476A.bit).+==== Digilent Nexys™3 Spartan-6 FPGA Board ==== 
 +To begin, connect the PmodAD1 to JA connector of Nexys™3 board, pins JA1 to JA6 (see image below). You can use an extension cable for ease of use. Connect the USB cables from the PC to the board, one for programming (Digilent USB device) and one for the UART terminal (FT232R USB UART). 
 + 
 +{{:resources:fpga:xilinx:pmod:pmodad1_nexys3.jpg?200|PmodAD1 and Nexys™3}} 
 + 
 +==== FPGA Configuration ==== 
 + 
 +Start IMPACT, and double click "Boundary Scan". Right click and select Initialize Chain. The program should recognize the Spartan 6 device (see screenshot below). Start a UART terminal (set to appropiate baud rate) and then program the device using the bit file provided in the project *.zip archive, located in the "sw" folder (../ad7476a/sw/AD7476A.bit).
  
 {{:resources:fpga:xilinx:pmod:PmodAD1Impact.jpg?200|Programming FPGA in IMPACT}} {{:resources:fpga:xilinx:pmod:PmodAD1Impact.jpg?200|Programming FPGA in IMPACT}}
  
-If programming was successful, you should be seeing messages appear on the terminal window as shown in the figure below. After programming the AD7476A device, the program will automatically read the values of the analog voltage inputs, Vin1 and Vin2, and print them via UART. Pressing [Enter] will initialize another conversion.+If programming was successful, you should be seeing messages appear on the terminal window as shown in the figure below. After programming the AD7476A device, the program will automatically read the values of the analog voltage inputs, Vin1 and Vin2, and print them via UART. Pressing any key will initialize another conversion.
  
 {{:resources:fpga:xilinx:pmod:pmodad1hyper.jpg?200|UART messeges}} {{:resources:fpga:xilinx:pmod:pmodad1hyper.jpg?200|UART messeges}}
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 The hardware SPI access allows reading the data sent by the AD7476A, using a single CS and SCLK pins, and a multiplexed MISO pin (PmodAD1 contains two AD7476A Integrated Circuits, which share the same CS and SCLK pins, but have separate MISO pins, which need to be multiplexed). The hardware SPI access allows reading the data sent by the AD7476A, using a single CS and SCLK pins, and a multiplexed MISO pin (PmodAD1 contains two AD7476A Integrated Circuits, which share the same CS and SCLK pins, but have separate MISO pins, which need to be multiplexed).
  
-<note important> +<WRAP round 80% important> 
-  * Connecting the PmodAD1 to the LX-9 Board using an extension cable provides ease of use. +  * Connecting the PmodAD1 to the LX-9 Board or Nexys™3 Board using an extension cable provides ease of use. 
-  * UART must be set to 57600 baudrate+  * UART must be set to 115200 Baud Rate for the Avnet LX-9 Microboard or 9600 Baud Rate for the Digilent Nexys™3 Board
-  * The reference voltage for the AD7476A is 3.3V (if using LX-9 Board)+  * The reference voltage for the AD7476A is 3.3V. 
-</note> +</WRAP>
  
 ===== Downloads ===== ===== Downloads =====
-{{:resources:fpga:xilinx:pmod:ad7476a.zip|Reference design source code.}} +<WRAP round download 80%> 
 +\\ 
 +{{:resources:fpga:xilinx:pmod:ad7476a_lx9.zip|Reference design source code for Avnet LX9 MicroBoard.}}\\ 
 +{{:resources:fpga:xilinx:pmod:ad7476a_nexys3.zip|Reference design source code for Digilent Nexys™3 Spartan-6 FPGA Board.}} 
 +</WRAP>
 ====== AD7476A Pmod and AD7303 Pmod Reference Design ====== ====== AD7476A Pmod and AD7303 Pmod Reference Design ======
 {{page>ad7476a_ad7303_nexys3}} {{page>ad7476a_ad7303_nexys3}}