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--- resources:fpga:xilinx:pmod:ad5933 [25 May 2012 12:52]
ACozma [More information]
+++ resources:fpga:xilinx:pmod:ad5933 [12 Apr 2013 15:44] (current)
LucianS [Downloads]
@@ Line 6: / Line 6: @@
 Once calibrated, the magnitude of the impedance and relative phase of the impedance at each frequency point along the sweep is easily calculated. This is done off chip using the real and imaginary register contents, which can be read from the serial I2C interface.
-**HW Platform(s):** [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]] [[http://www.digilentinc.com/Products/Detail.cfm?Prod=PMOD-IA|Pmod-IA (Digilent)]] \\
+**HW Platform(s):**
+   * [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]]
+   * [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3|Nexys™3 Spartan-6 FPGA Board (Digilent)]]
+   * [[http://www.digilentinc.com/Products/Detail.cfm?Prod=PMOD-IA|Pmod-IA (Digilent)]] \\
 **System:** Microblaze, AXI, UART \\
@@ Line 15: / Line 18: @@
 ==== Required Hardware ====
   * [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm|Spartan-6 LX9 Microboard (Avnet)]]
+  * [[http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3|Nexys™3 Spartan-6 FPGA Board (Digilent)]]
   * [[http://www.digilentinc.com/Products/Detail.cfm?Prod=PMOD-IA|Pmod-IA (Digilent)]]
 ==== Required Software ====
   * Xilinx ISE 13.2 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack).
-  * A UART terminal (Tera Term/Hyperterminal), Baud rate 57600.
+  * A UART terminal (Tera Term/Hyperterminal), Baud rate 115200 for the Avnet LX-9 Microboard or 9600 for the Digilent Nexys™3 Board.
 ==== Running Demo (SDK) Program ====
-<note tip>If you are not familiar with LX9 and/or Xilix tools, please visit\\ [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm]] for details.
+<WRAP round 80% tip>
-</note>
+\\
-Extract the project from the archive file (AD5933.zip) to the location you desire.
+If you are not familiar with LX9 and/or Xilix tools, please visit\\ [[http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm]] for details.
+</WRAP>
+Extract the project from the archive file (AD5933_<board_name>.zip) to the location you desire.
-To begin, connect the Pmod-IA to J5 connector of LX9 board, pins 3 to 6 (see image below). You must use an extension cable. Connect the USB cables from the PC to the board.
+==== Avnet LX9 MicroBoard Setup ====
+To begin, connect the Pmod-IA to J5 connector of LX9 board, pins 3 to 6 (see image below). You must use an extension cable. . Connect the USB cable from the PC to the USB-UART female connector of the board for the UART terminal. The board will be programmed through its USB male connector.
 {{:resources:fpga:xilinx:pmod:pmodia.jpg?200|Pmod-IA and LX-9}}
-Start IMPACT, and double click "Boundary Scan". Right click and select Initialize Chain. The program should recognize the Spartan 6 device (see screenshot below). Start a UART terminal (set to 57600 baud rate) and then program the device using the bit file provided in the project *.zip archive, located in the "sw" folder (../ad5933/sw/AD5933.bit).
+==== Digilent Nexys™3 Spartan-6 FPGA Board ====
+To begin, connect the Pmod-IA to JA connector of Nexys™3 board, pins JA3 to JA6 (see image below). You must use an extension cable. Connect the USB cables from the PC to the board, one for programming (Digilent USB device) and one for the UART terminal (FT232R USB UART).
+{{:resources:fpga:xilinx:pmod:pmodia_nexys3.jpg?200|Pmod-IA and Nexys™3}}
+==== FPGA Configuration ====
+Start IMPACT, and double click "Boundary Scan". Right click and select Initialize Chain. The program should recognize the Spartan 6 device (see screenshot below). Start a UART terminal (set to appropiate baud rate) and then program the device using the bit file provided in the project *.zip archive, located in the "sw" folder (../ad5933/sw/AD5933.bit).
 {{:resources:fpga:xilinx:pmod:PmodIAImpact.jpg?200|Programming FPGA in IMPACT}}
@@ Line 38: / Line 55: @@
 If programming was successful, you should be seeing messages appear on the terminal window as shown in the figures below. After programming the AD5933 device, the program will automatically read the temperature value of the AD5933. Afterwards it will start a calibration process. Use a 47 Kohm resistor for this purpose. After calibration is complete, the user will be promped to change the 47 Kohm resistor with the desired component for measurement, and press [Enter] afterwards. The result of the measurement will be printed on the terminal window both in ohms and Kohms.
-{{:resources:fpga:xilinx:pmod:pmodiahyper.jpg?200|UART messeges}}
+{{:resources:fpga:xilinx:pmod:pmodia_menu1.jpg?200|UART messeges}}
-{{:resources:fpga:xilinx:pmod:pmodiahyper2.jpg?200|UART messeges}}
+{{:resources:fpga:xilinx:pmod:pmodia_menu2.jpg?200|UART messeges}}
-{{:resources:fpga:xilinx:pmod:pmodiahyper3.jpg?200|UART messeges}}
+{{:resources:fpga:xilinx:pmod:pmodia_menu3.jpg?200|UART messeges}}
@@ Line 50: / Line 67: @@
 The reference design is a consists of an IIC interface between the FPGA and the Pmod-IA. Functions for setting the frequency sweeps and other parameters can be found in AD5933.c, in the "sw" folder (../ad5933/sw/AD5933.c). If you desire to use another resistor for calibration purposes, you must change the "47000" parameter for the **AD5933_CalculateGainFactor** function in main.c with the value of your resistor.
-<note important>
+<WRAP round 80% important>
-  * Connecting the Pmod-IA to the LX-9 Board using an extension cable is mandatory.
+  * Connecting the Pmod-IA to the boards using an extension cable is mandatory.
-  * UART must be set to 57600 baudrate.
+  * UART must be set to 115200 Baud Rate for the Avnet LX-9 Microboard or 9600 Baud Rate for the Digilent Nexys™3 Board.
   * The default value for the calibration resistor is 47 Kohms. If another resistor is used for calibration, please modify the parameter value in main.c, **AD5933_CalculateGainFactor** function.
-</note>
+</WRAP>
 ===== Downloads =====
-{{:resources:fpga:xilinx:pmod:ad5933.zip|Reference design source code}}
+<WRAP round download 80%>
+\\
+{{:resources:fpga:xilinx:pmod:ad5933_lx9.zip|Reference design source code for Avnet LX9 MicroBoard.}}\\
+{{:resources:fpga:xilinx:pmod:ad5933_nexys3.zip|Reference design source code for Digilent Nexys™3 Spartan-6 FPGA Board.}}
+</WRAP>
 ===== More information =====
   * [[ez>community/fpga|ask questions about the FPGA reference design]]
   * Example questions: {{rss>http://ez.analog.com/community/feeds/allcontent/atom?community=2061 5 author 1d}}