This version is outdated by a newer approved version.
This version (08 Jun 2012 16:56) was approved by Alexandru.Tofan.The Previously approved version (25 May 2012 12:51) is available.
This version (08 Jun 2012 16:56) was approved by Alexandru.Tofan.The Previously approved version (25 May 2012 12:51) is available.This is an old revision of the document!
Table of Contents
AD5628 Pmod Xilinx FPGA Reference Design
Introduction
The AD5628 The AD5628 is a low power, octal, 12 bit, buffered voltage-output DAC. The device operates from a single 2.7 V to 5.5 V supply and is guaranteed monotonic by design. The AD5628 is available in both a 4 mm × 4 mm LFCSP and a 16-lead TSSOP. The AD5628 has an on-chip reference with an internal gain of 2. The AD5628 has a 1.25 V 5 ppm/°C reference, giving a full-scale output range of 2.5 V; the AD5628-2 has a 2.5 V 5 ppm/°C reference, giving a full-scale output range of 5 V. The on-board reference is off at power-up, allowing the use of an external reference. The internal reference is enabled via a software write.
HW Platform(s):
System: Microblaze, AXI, UART
Quick Start Guide
The bit file provided in the project *.zip file combines the FPGA bit file and the SDK elf files. It may be used for a quick check on the system. All you need is the hardware and a PC running a UART terminal and the programmer (IMPACT).
Required Hardware
Required Software
- Xilinx ISE 13.2 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack).
- A UART terminal (Tera Term/Hyperterminal), Baud rate 57600.
Running Demo (SDK) Program
If you are not familiar with LX9 and/or Xilix tools, please visit
http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm for details.
If you are not familiar with Nexys™3 and/or Xilix tools, please visit
http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3 for details.
http://www.xilinx.com/products/boards-and-kits/AES-S6MB-LX9.htm for details.
If you are not familiar with Nexys™3 and/or Xilix tools, please visit
http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,897&Prod=NEXYS3 for details.
Extract the project from the archive file (AD5628_<board_name>.zip) to the location you desire.
Avnet LX9 MicroBoard Setup
To begin, connect the PmodDA4 to J4 connector of LX9 board, pins 1 to 6 (see image below). You can use an extension cable for ease of use. Connect the USB cables from the PC to the board.
Digilent Nexys™3 Spartan-6 FPGA Board
To begin, connect the PmodDA4 to JA connector of Nexys™3 board, pins JA1 to JA6 (see image below). You can use an extension cable for ease of use. Connect the USB cables from the PC to the board.
FPGA Configuration
Start IMPACT, and double click “Boundary Scan”. Right click and select Initialize Chain. The program should recognize the Spartan 6 device (see screenshot below). Connect an oscilloscope to the following outputs of PmodDA4: A,C,E,G. Program the device using the bit file provided in the project *.zip archive, located in the “sw” folder (../ad5628/sw/AD5628.bit).
If programming was successful, you should be seeing messages appear on the terminal window as shown in the figures below. After programming the AD5628 device, the program will prompt you to select a waveform type from 4 available waveforms: Square, Triangle, Sawtooth or Sine waveform. Pressing a number between 1 and 4 will select a certain waveform. If you press another key again, the waveform will change to the selected one for each of the 4 channels (A, C, E and G).
Using the reference design
Functional Description
The reference design is a simple SPI interface used to communicate with the PmodDA4. The software enables the internal voltage reference, programs the device sending 12-bit data values read from predefined look up tables. The user has the ability to change between 4 different look up tables, each one representing a different waveform. Communication between the user and the board is done via UART.
- Connecting the PmodDA4 to the boards using an extension cable provides ease of use.
- UART must be set to 57600 baudrate.
Downloads
Reference design source code for Avnet LX9 MicroBoard.
Reference design source code for Digilent Nexys™3 Spartan-6 FPGA Board.
More information
- Example questions:
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resources/fpga/xilinx/pmod/ad5628.1339167385.txt.gz · Last modified: 08 Jun 2012 16:56 by Alexandru.Tofan