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| resources:fpga:xilinx:kc705:adv7511 [02 Aug 2013 18:17] – [Downloads] New release Lars-Peter Clausen | resources:fpga:xilinx:kc705:adv7511 [04 Apr 2014 10:42] – Updated the download links. Dragos Bogdan |
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| ===== Introduction ===== | ===== Introduction ===== |
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| The [[adi>ADV7511]] is a 225 MHz High-Definition Multimedia Interface (HDMI®) transmitter. It is part of the [[http://www.xilinx.com/kc705|Kintex-7 KC705]], [[http://www.xilinx.com/vc707|Virtex-7 VC707]], [[http://www.xilinx.com/zc702|Zynq ZC702]] and the [[http://www.xilinx.com/zed|Zynq ZED]] evaluation boards. This reference design provides the video and audio interface between the FPGA and ADV7511 on board. The video uses a 16bit 422 YCbCr interface (except VC707 which uses 36bit 444 RGB interface) and the audio uses a single bit SPDIF interface. | The [[adi>ADV7511]] is a 225 MHz High-Definition Multimedia Interface (HDMI®) transmitter. It is part of the [[http://www.xilinx.com/ac701|Artix-7 AC701]], [[http://www.xilinx.com/kc705|Kintex-7 KC705]], [[http://www.xilinx.com/vc707|Virtex-7 VC707]], [[http://www.xilinx.com/zc702|Zynq ZC702]], [[http://www.xilinx.com/zc706|Zynq ZC706]] and the [[http://www.xilinx.com/zed|Zynq ZED]] evaluation boards. This reference design provides the video and audio interface between the FPGA and ADV7511 on board. The video uses a 16bit 422 YCbCr interface (except VC707 which uses 36bit 444 RGB interface) and the audio uses a single bit SPDIF interface. |
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| ===== Supported Carriers ===== | ===== Supported Carriers ===== |
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| | * [[xilinx>AC701]] |
| * [[xilinx>KC705]] | * [[xilinx>KC705]] |
| * [[xilinx>VC707]] | * [[xilinx>VC707]] |
| ==== Required Hardware ==== | ==== Required Hardware ==== |
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| * KC705/VC707/ZC702/ZC706/Zed board. | * AC701/KC705/VC707/ZC702/ZC706/Zed board. |
| * HDMI Monitor. | * HDMI Monitor. |
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| ==== Required Software ==== | ==== Required Software ==== |
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| * Xilinx ISE 14.4 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack). | * Xilinx ISE 14.6 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack). |
| * A UART terminal (Tera Term/Hyperterminal), Baud rate 57600 for KC705/VC707 or 115200 for ZC702/ZC706/Zed. | * A UART terminal (Tera Term/Hyperterminal), Baud rate 57600 for AC701/KC705/VC707 or 115200 for ZC702/ZC706/Zed. |
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| ==== Running Demo (SDK) Program ==== | ==== Running Demo (SDK) Program ==== |
| To begin, connect an HDMI cable between the board HDMI out and the HDMI monitor. After the hardware setup, turn the power on to the board. | To begin, connect an HDMI cable between the board HDMI out and the HDMI monitor. After the hardware setup, turn the power on to the board. |
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| Run the **//download.bat//** script located in the "//SDK/SDK_Workspace/bin//" folder provided within the HDL Reference Design. This script uses XMD to program the FPGA with the HDL Reference Design and download the Software Reference Design into the DDR. | Run the **//evaluate.bat//** script. This script uses XMD to program the FPGA with the HDL Reference Design and download the Software Reference Design into the DDR. |
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| **Note:** The //download.bat// script assumes that the //Xilinx ISE Design Suite 14.4// is installed at this path: //C:/Xilinx/14.4//. If the installation path on your computer is different please modify the script accordingly. | **Note:** The //evaluate.bat// script assumes that the //Xilinx ISE Design Suite 14.6// is installed at this path: //C:/Xilinx/14.6//. If the installation path on your computer is different please modify the script accordingly. |
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| If programming was successful, you should be seeing messages appear on the terminal as shown in figure below. | If programming was successful, you should be seeing messages appear on the terminal as shown in figure below. |
| </WRAP> | </WRAP> |
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| **HDL Reference Designs:** | **Evaluation Scripts:** |
| <WRAP round download 80%> | <WRAP round download 80%> |
| * https://github.com/analogdevicesinc/fpgahdl_xilinx/archive/edk_14_4_2013_08_02.tar.gz | * **AC701 Evaluation Script: ** [[https://github.com/analogdevicesinc/no-OS/tree/master/adv7511/evaluate/ac701]] |
| * https://github.com/analogdevicesinc/fpgahdl_xilinx/archive/edk_14_4_2013_08_02.zip | * **KC705 Evaluation Script: ** [[https://github.com/analogdevicesinc/no-OS/tree/master/adv7511/evaluate/kc705]] |
| * https://github.com/analogdevicesinc/fpgahdl_xilinx.git | * **VC707 Evaluation Script: ** [[https://github.com/analogdevicesinc/no-OS/tree/master/adv7511/evaluate/vc707]] |
| * https://github.com/analogdevicesinc/fpgahdl_xilinx/tags | * **ZC702 Evaluation Script: ** [[https://github.com/analogdevicesinc/no-OS/tree/master/adv7511/evaluate/zc702]] |
| * **ZC702 HDL Reference Design: ** [[https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/edk_14_4_2013_08_02/cf_adv7511_zc702|cf_adv7511_zc702]] | * **ZC706 Evaluation Script: ** [[https://github.com/analogdevicesinc/no-OS/tree/master/adv7511/evaluate/zc706]] |
| * **ZC706 HDL Reference Design: ** [[https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/edk_14_4_2013_08_02/cf_adv7511_zc706|cf_adv7511_zc706]] | * **Zed Evaluation Script: ** [[https://github.com/analogdevicesinc/no-OS/tree/master/adv7511/evaluate/zed]] |
| * **Zed HDL Reference Design: ** [[https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/edk_14_4_2013_08_02/cf_adv7511_zed|cf_adv7511_zed]] | </WRAP> |
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| * **KC705 HDL Reference Design: ** {{:resources:fpga:xilinx:kc705:cf_adv7511_edk_14_4_2013_02_05.tar.gz}} | **HDL Reference Designs:** |
| * **VC707 HDL Reference Design: ** {{:resources:fpga:xilinx:kc705:cf_adv7511_vc707_edk_14_4_2013_02_05.tar.gz}} | <WRAP round download 80%> |
| | * **AC701 HDL Reference Design: ** [[https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_adv7511_ac701]] |
| | * **KC705 HDL Reference Design: ** [[https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_adv7511_kc705]] |
| | * **VC707 HDL Reference Design: ** [[https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_adv7511_vc707]] |
| | * **ZC702 HDL Reference Design: ** [[https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_adv7511_zc702]] |
| | * **ZC706 HDL Reference Design: ** [[https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_adv7511_zc706]] |
| | * **Zed HDL Reference Design: ** [[https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_adv7511_zed]] |
| </WRAP> | </WRAP> |
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| **no-OS Software:** | **no-OS Software:** |
| <WRAP round download 80%> | <WRAP round download 80%> |
| * **ADV7511 MicroBlaze Library: ** https://github.com/analogdevicesinc/no-OS/tree/master/ADV7511_Library/MicroBlaze\\ | * **ADV7511 MicroBlaze Library: ** https://github.com/analogdevicesinc/no-OS/tree/master/adv7511/library/microblaze |
| * **ADV7511 KC705 Reference Design: ** https://github.com/analogdevicesinc/no-OS/tree/master/ADV7511_KC705 | * **ADV7511 AC701 Reference Design: ** https://github.com/analogdevicesinc/no-OS/tree/master/adv7511/ac701 |
| * **ADV7511 VC707 Reference Design: ** https://github.com/analogdevicesinc/no-OS/tree/master/ADV7511_VC707 | * **ADV7511 KC705 Reference Design: ** https://github.com/analogdevicesinc/no-OS/tree/master/adv7511/kc705 |
| * **ADV7511 ZC Library: ** https://github.com/analogdevicesinc/no-OS/tree/master/ADV7511_Library/ZC | * **ADV7511 VC707 Reference Design: ** https://github.com/analogdevicesinc/no-OS/tree/master/adv7511/vc707 |
| * **ADV7511 ZC702 Reference Design: ** https://github.com/analogdevicesinc/no-OS/tree/master/ADV7511_ZC702 | * **ADV7511 ZC Library: ** https://github.com/analogdevicesinc/no-OS/tree/master/adv7511/library/zc |
| * **ADV7511 ZC706 Reference Design: ** https://github.com/analogdevicesinc/no-OS/tree/master/ADV7511_ZC706 | * **ADV7511 ZC702 Reference Design: ** https://github.com/analogdevicesinc/no-OS/tree/master/adv7511/zc702 |
| * **ADV7511 ZedBoard Library: ** https://github.com/analogdevicesinc/no-OS/tree/master/ADV7511_Library/ZedBoard | * **ADV7511 ZC706 Reference Design: ** https://github.com/analogdevicesinc/no-OS/tree/master/adv7511/zc706 |
| * **ADV7511 ZedBoard Reference Design: ** https://github.com/analogdevicesinc/no-OS/tree/master/ADV7511_ZedBoard | * **ADV7511 ZedBoard Library: ** https://github.com/analogdevicesinc/no-OS/tree/master/adv7511/library/zed |
| | * **ADV7511 ZedBoard Reference Design: ** https://github.com/analogdevicesinc/no-OS/tree/master/adv7511/zed |
| </WRAP> | </WRAP> |
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