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CN0271 FMC-SDP Interposer & Evaluation Board / Xilinx KC705 Reference Design
This document presents the steps to setup an environment for using the EVAL-CN0271-SDPZ evaluation board together with the Xilinx KC705 FPGA board and the Xilinx Embedded Development Kit (EDK). Below is presented a picture of the EVAL-CN0271-SDPZ Evaluation Board with the Xilinx KC705 board.
For component evaluation and performance purposes, as opposed to quick prototyping, the user is directed to use the part evaluation setup. This consists of:
- 1. A controller board like the SDP-B ( EVAL-SDP-CS1Z)
- 2. The component SDP compatible product evaluation board
- 3. Corresponding PC software ( shipped with the product evaluation board)
The SDP-B controller board is part of Analog Devices System Demonstration Platform (SDP). It provides a high speed USB 2.0 connection from the PC to the component evaluation board. The PC runs the evaluation software. Each evaluation board, which is an SDP compatible daughter board, includes the necessary installation file required for performance testing.
Note: it is expected that the analog performance on the two platforms may differ.
Below is presented a picture of SDP-B Controller Board with the EVAL-CN0271-SDPZ Evaluation Board.
The circuit from the EVAL-CN0271-SDPZ board is a complete thermocouple signal conditioning circuit with cold junction compensation followed by a 16-bit sigma-delta (Σ-Δ) analog-to-digital converter (ADC). The AD8495 thermocouple amplifier provides a simple, low cost solution for measuring K type thermocouple temperatures, including cold junction compensation. A fixed gain instrumentation amplifier in the AD8495 amplifies the small thermocouple voltage to provide a 5 mV/°C output. The high common-mode rejection of the amplifier blocks commonmode noise that the long thermocouple leads can pick up. For additional protection, the high impedance inputs of the amplifier make it easy to add extra filtering. The AD8476 differential amplifier provides the correct signal levels and common-mode voltage to drive the AD7790 16-bit, Σ-Δ ADC. The circuit provides a compact low cost solution for thermocouple signal conditioning and high resolution analog-to-digital conversion.
The AD7790 is a low power, complete analog front end for low frequency measurement applications. It contains a low noise 16-bit Σ-Δ ADC with one differential input that can be buffered or unbuffered along with a digital PGA, which allows gains of 1, 2, 4, and 8.
The first objective is to ensure that you have all of the items needed and to install the software tools so that you are ready to create and run the evaluation project.
- FMC-SDP adapter board
- EVAL-CN0271-SDPZ evaluation board
- Xilinx ISE 14.6.
- UART Terminal (Termite/Tera Term/Hyperterminal), baud rate 115200.
- The EVAL-CN0271 reference project for Xilinx KC705 FPGA.
- Xilinx Boards Common Drivers: https://github.com/analogdevicesinc/no-OS/tree/master/platform_drivers/Xilinx/SDP_Common
- EDK KC705 Reference project: https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_sdp_kc705
Run the Demonstration Project
Before connecting the ADI evaluation board to the Xilinx KC705 make sure that the VADJ_FPGA voltage of the KC705 is set to 3.3V. For more details on how to change the setting for VADJ_FPGA visit the Xilinx KC705 product page.
- Use the FMC-SDP interposer to connect the ADI evaluation board to the Xilinx KC705 board on the FMC LPC connector.
- Connect the JTAG and UART cables to the KC705 and power up the FPGA board.
Reference Project Overview
The following commands were implemented in this version of EVAL-CN0271 reference project for Xilinx KC705 FPGA board.
|help?||Displays all available commands.|
|adcCode?||Displays the ADC Code.|
|temperature?||Displays the temperature measured by the thermocouple.|
|reset!||Resets the serial interface with AD7790.|
Commands can be executed using a serial terminal connected to the UART peripheral of Xilinx KC705 FPGA.
Software Project Setup
The hardware platform for each reference projects with FMC-SDP interposer and KC705 evaluation board is common. The next steps should be followed to recreate the software project of the reference design:
- First download the KC705 Reference project from Github on your computer. You can do this by clonning this repository: https://github.com/analogdevicesinc/fpgahdl_xilinx.
- From this entire repository you will use cf_sdp_kc705 folder. This is common for all KC705 projects.
- Open the Xilinx SDK. When the SDK starts, it asks you to provide a folder where to store the workspace. Any folder can be provided. Make sure that the path where it is located does not contain any spaces.
- In the SDK select the File→Import menu option to import the software projects into the workspace.
- In the Import window select the General→Existing Projects into Workspace option.
- In the Import Projects window select the cf_sdp_kc705 folder as root directory and check the Copy projects into workspace option. After the root directory is chosen the projects that reside in that directory will appear in the Projects list. Press Finish to finalize the import process.
- The Project Explorer window now shows the projects that exist in the workspace without software files.
- Now the software must be added in your project. For downloading the software, you must use 3 links from Github given in Downloads section. From there you'll download the specific driver, the specific commands and the Xilinx Boards Common Drivers(which are commons for all Xilinx boards). All the software files downloaded must be copied in src folder from sw folder.
- Before compilation in the file called Communication.h you have to uncomment the name of the device that you currently use. In the picture below there is an example of this, which works only with AD5629R project. For another device, uncomment only the respective name. You can have one driver working on multiple devices, so the drivers's name and the uncommented name may not be the same for every project.
- The SDK should automatically build the project and the Console window will display the result of the build. If the build is not done automatically, select the Project→Build Automatically menu option.
- If the project was built without any errors, you can program the FPGA and run the software application.