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This version (28 Sep 2012 11:32) was approved by AdrianC.The Previously approved version (28 May 2012 15:52) is available.Diff

ADN2850 FMC-SDP Interposer & Evaluation Board / Xilinx KC705 Reference Design

Supported Devices

Evaluation Boards

Overview

This document presents the steps to setup an environment for using the EVAL-ADN2850SDZ evaluation board together with the Xilinx KC705 FPGA board, the Xilinx Embedded Development Kit (EDK) and the Micrium µC-Probe run-time monitoring tool. Below is presented a picture of the EVAL-ADN2850SDZ Evaluation Board with the Xilinx KC705 board.

img_adn2850.jpg

For component evaluation and performance purposes, as opposed to quick prototyping, the user is directed to use the part evaluation setup. This consists of:

  • 1. A controller board like the SDP-B ( EVAL-SDP-CS1Z)
  • 2. The component SDP compatible product evaluation board
  • 3. Corresponding PC software ( shipped with the product evaluation board)

The SDP-B controller board is part of Analog Devices System Demonstration Platform (SDP). It provides a high speed USB 2.0 connection from the PC to the component evaluation board. The PC runs the evaluation software. Each evaluation board, which is an SDP compatible daughter board, includes the necessary installation file required for performance testing.

Note: it is expected that the analog performance on the two platforms may differ.

28 Sep 2012 10:32 · Adrian Costina

Below is presented a picture of SDP-B Controller Board with the EVAL-ADN2850SDZ Evaluation Board.

The ADN2850 is a dual-channel, nonvolatile memory, digitally controlled resistors with 1024-step resolution, offering guaranteed maximum low resistor tolerance error of ±8%. The device performs the same electronic adjustment function as a mechanical rheostat with enhanced resolution, solid state reliability, and superior low temperature coefficient performance. The versatile programming of the ADN2850 via an SPI®-compatible serial interface allows 16 modes of operation and adjustment including scratchpad programming, memory storing and restoring, increment/decrement, ±6 dB/step log taper adjustment, wiper setting readback, and extra EEMEM for user-defined information such as memory data for other components, look-up table, or system identification information.

The EVAL-ADN2850SDZ evaluation board is a member of a growing number of boards available for the SDP. Designed to help customers evaluate performance or quickly prototype new ADN2850 circuits and reduce design time, the EVAL-ADN2850SDZ evaluation board can operate in single-supply and dual-supply mode and incorporates an internal power supply powered from the USB.

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Getting Started

The first objective is to ensure that you have all of the items needed and to install the software tools so that you are ready to create and run the evaluation project.

Required Hardware

Required Software

  • Xilinx ISE 13.4 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack).
  • uC-Probe run-time monitoring tool

Downloads

The following table presents a short description the reference design archive contents.

Folder Description
Bit Contains the KC705 configuration file that can be used to program the system for quick evaluation.
Microblaze Contains the EDK 13.4 project for the Microblaze softcore that will be implemented in the KC705 FPGA.
Software Contains the source files of the software project that will be run by the Microblaze processor.
uCProbeInterface Contains the uCProbe interface and the .elf symbols file used by uC-Probe to access data from the Microblaze memory.

Run the Demonstration Project

Hardware Setup

Before connecting the ADI evaluation board to the Xilinx KC705 make sure that the VADJ_FPGA voltage of the KC705 is set to 3.3V. For more details on how to change the setting for VADJ_FPGA visit the Xilinx KC705 product page.

  • Use the FMC-SDP interposer to connect the ADI evaluation board to the Xilinx KC705 board on the FMC LPC connector.
  • Connect the JTAG and UART cables to the KC705 and power up the FPGA board.
  • Start IMPACT, and double click “Boundary Scan”. Right click and select Initialize Chain. The program should recognize the Kintex 7 device (see screenshot below).

  • Program the KC705 FPGA using the ”Bit/download.bit” file provided in the reference design archive.
  • Power the ADI evaluation board.

At this point everything is set up and it is possible to start the evaluation of the ADI hardware through the controls in the uC-Probe application provided in the reference design.

Configure uC-Probe

Launch uC-Probe from the Start → All Programs → Micrium → uC-Probe.

Select uC-Probe options.

  • Click on the uC-Probe icon on the top left portion of the screen.
  • Click on the Options button to open the dialog box.

Set target board communication protocol as RS-232

  • Click on the Communication tab icon on the top left portion of the dialog box
  • Select the RS-232 option.

Setup RS-232 communication settings

  • Select the RS-232 option from the Communication tab.
  • Select the COM port to which the KC705 board is connected.
  • Set the Baud Rate to 115200 bps.

  • Press Apply and OK to exit the options menu.

Load and Run the Demonstration Project

  • Click the Open option from the uC-Probe menu and select the .wsp file from the ucProbeInterface folder provided within the reference design files.
  • Before opening the interface uC-Probe will ask for a symbols file that must be associated with the interface. Select the file ucProbeInterface/ADIEvalBoard.elf to be loaded as a symbol file.
  • Run the demonstration project by pressing the Play button.

  • In some cases it is possible that the uC-Probe interface will not respond to the commands the first time it is ran. In this situation just stop the interface by pressing the Stop button and run it again by pressing the Play button.
  • After starting the uC-Probe interface wait until the status of the connection with the board displayed on the bottom of the screen is set to Connected. It is possible to use the interface only after the status is changed to Connected and the data transfer speed displayed next to the connection status is different than 0.
16 Feb 2012 09:23 · Andrei Cozma

Demonstration Project User Interface

The following figure presents the uC-Probe interface that can be used for monitoring and controlling the operation of the EVAL-ADN2850SDZ evaluation board.

image083.jpg

Section A is used to activate the board and monitor activity. The communication with the board is activated / deactivated by toggling the ON/OFF switch. The Activity LED turns green when the communication is active. If the ON/OFF switch is set to ON and the Activity LED is BLACK it means that there is a communication problem with the board. See the Troubleshooting section for indications on how to fix the communication problems.

Section B is used to send commands specific for the two RDAC channels available in the ADn2850. Toggling to On the switches under a specific RDAC will send the command only to that RDAC. The following commands can be sent to the two RDAC channels individually:

  • +6dB - increments the RDAC value by 6dB
  • -6dB - decrements the RDAC value by 6dB
  • +1 Step - increments the RDAC value by 1
  • -1 Step - decrements the RDAC value by 1
  • Store – stores the value of the RDAC into the corresponding EEPROM
  • Restore – restores into the RDAC the value from the corresponding EEPROM
  • Write – writes into the RDAC the value selected in Section D by the slider Value for RDAC write

Below the individual command options there is a set of generic switches which are used to send commands to both RDACs simultaneously. The following commands can be sent simultaneously to both RDACs:

  • +1 Step - increments the RDACs values by 1
  • -1 Step - decrements the RDACs values by 1
  • +6dB - increments the RDACs values by 6dB
  • -6dB - decrements the RDACs values by 6dB
  • Reset - resets the values stored in both RDACs to 0

Section C is used to send generic commands to the ADn2850. The command list is available in table 8 from the ADn2850 datasheet, page 16 (AD5235 Rev. D). The request values will be updated based on the switch selections and displayed in the Request numeric boxes. The command is sent by toggling the Send Command switch to On. After the command a NOP will be sent on and the values from the SDO will be displayed in the Response numeric boxes.

Section D is used for setting the values for Write requests both for RDAC wiper writes and memory writes. In case of RDAC writes, the Address value is not used. In case of memory writes, the Address value is used to select the memory location. It is recommended to use the first slider for values that are stored in user memory locations and the second slider for values that are written in the RDAC wiper or RDAC memory location EEMEM0 and EEMEM1.

Section E is used to toggle the hardware pins. The functionality of the pins is described in the ADn2850 datasheet, Table 4 at page 8. When the Write Protect switch is sent to On it isn’t possible to write to the memory nor change the RDAC values. Exceptions are the Restore/Reset function and toggling the \PR switch. In all cases the RDACs wipers will be reloaded with the values from the memory.

Section F displays the values stored in the EEPROM memories and the tolerance value. The displayed values are updated by toggling the Read switch to On. The Write switch controls the writing of the value specified by the slider Value for User Write to the memory address specified by the slider Address for EEMEM Write from Section D.

Troubleshooting

In case there is a communication problem with the board the follwing actions can be perfomed in order to try to fix the issues:

  • Check that the evaluation board is powered as instructed in the board's user guide.
  • In uC-Probe refresh the symbols file by right-clicking on the System Browser window and selecting Refresh Symbols.
  • If the communication problem persists even after performing the previous steps, restart the uC-Probe application and try to run the interface again.

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