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resources:fpga:xilinx:interposer:ad9683 [12 Jun 2017 15:04] – Fix FMC link Lars-Peter Clausenresources:fpga:xilinx:interposer:ad9683 [28 Jan 2021 19:14] (current) – update arrow links after their web site update Robin Getz
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 ===== Supported Devices ===== ===== Supported Devices =====
  
-  * [[http://www.analog.com/en/analog-to-digital-converters/ad-converters/ad9683/products/product.html#product-evaluationkits| AD9683 Evaluation Board]] +  * [[adi>en/analog-to-digital-converters/ad-converters/ad9683/products/product.html#product-evaluationkits| AD9683 Evaluation Board]] 
-  * [[http://www.analog.com/en/evaluation/eval-adc-fmc-int/eb.html| High speed ADC FMC interposer]]+  * [[adi>en/evaluation/eval-adc-fmc-int/eb.html| High speed ADC FMC interposer]]
  
 ===== Supported Carriers ===== ===== Supported Carriers =====
  
-  * [[xilinx> ZC706]] +  * [[xilinx>ZC706]] 
  
 ===== Quick Start Guide ===== ===== Quick Start Guide =====
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 </WRAP> </WRAP>
  
-Only Xilinx coregen xco files are provided with the reference design. You must regenerate the IP core files using this file. See [[http://wiki.analog.com/resources/eval/user-guides/ad-fmcomms1-ebz/reference_hdl|generating Xilinx netlist/verilog files from xco files]] for details.+Only Xilinx coregen xco files are provided with the reference design. You must regenerate the IP core files using this file. See [[/resources/eval/user-guides/ad-fmcomms1-ebz/reference_hdl|generating Xilinx netlist/verilog files from xco files]] for details.
  
 <WRAP round help 80%> <WRAP round help 80%>
-  * Questions? [[http://ez.analog.com/post!input.jspa?containerType=14&container=2061|Ask Help & Support]].+  * Questions? [[ez>fpga|Ask Help & Support]].
 </WRAP> </WRAP>
  
 ===== Tar file contents ===== ===== Tar file contents =====
  
-The tar file contains, in most cases, the following files and/or directories. To rebuild the reference design simply double click the XMP file and run the tool. To build SDK, select a workspace and use the C file to build the elf file. Please refer to [[http://www.xilinx.com/support/documentation/dt_edk_edk13-2.htm|Xilinx EDK documentation]] for details.+The tar file contains, in most cases, the following files and/or directories. To rebuild the reference design simply double click the XMP file and run the tool. To build SDK, select a workspace and use the C file to build the elf file. Please refer to [[xilinx>support/documentation/dt_edk_edk13-2.htm|Xilinx EDK documentation]] for details.
  
 | license.txt | ADI license & copyright information. | | license.txt | ADI license & copyright information. |
resources/fpga/xilinx/interposer/ad9683.1497272667.txt.gz · Last modified: 12 Jun 2017 15:04 by Lars-Peter Clausen

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