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resources:fpga:xilinx:interposer:ad5755 [02 Jul 2013 12:09] – Adding the LoadApp to the table Istvan Csomortaniresources:fpga:xilinx:interposer:ad5755 [02 Oct 2013 15:28] – Change the command table and adding Software Project Setup section Istvan Csomortani
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 ===== Downloads ===== ===== Downloads =====
 +<WRAP round download 80%>
 +\\
 +  * **AD5755 Driver:** https://github.com/analogdevicesinc/no-OS/tree/master/device_drivers/AD5755
 +  * **AD5755 Commands:** https://github.com/analogdevicesinc/no-OS/tree/master/device_commands/AD5755
 +  * **Xilinx Boards Common Drivers:** https://github.com/analogdevicesinc/no-OS/tree/master/platform_drivers/Xilinx/SDP_Common
 +  * **EDK KC705 Reference project:** https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_sdp_kc705
 +\\
 +</WRAP>
  
-  * {{:resources:fpga:xilinx:interposer:ad5755_evalboard.zip|Reference Design Files}}+===== Hardware setup =====
  
-The following table presents a short description the reference design archive contents.+<WRAP round important 80%> 
 +\\ 
 +Before connecting the ADI evaluation board to the Xilinx KC705 make sure that the VADJ_FPGA voltage of the KC705 is set to 3.3V. For more details on how to change the setting for VADJ_FPGA visit the Xilinx KC705 product page. 
 +</WRAP>
  
-**Folder** ^ **Description** ^ +  Use the FMC-SDP interposer to connect the ADI evaluation board to the Xilinx KC705 board on the FMC LPC connector
-| Bit | Contains the KC705 configuration file that can be used to program the system for quick evaluation. | +  * Connect the JTAG and UART cables to the KC705 and power up the FPGA board.
-| LoadApp | Contains the software application executable and a batch script, which download the software to the device. | +
-| Microblaze | Contains the EDK 14.6 project for the Microblaze softcore that will be implemented in the KC705 FPGA. +
-| Software | Contains the source files of the software project that will be run by the Microblaze processor.|+
  
-====== Run the Demonstration Project ======+<WRAP round important 80%> 
 +\\ 
 +To power on the EVAL-AD5755 evaluation board, you need to provide an external +15V AVdd and -15V AVss analog supply voltage and a +5V AVcc DC-to-DC supply voltage, which will supplies all four on-board dc-to-dc blocks and may draw as much as 0.8 A peak current per channel (for more information see: [[adi>/static/imported-files/user_guides/UG-244.pdf|EVAL-AD5755SDZ evaluation board user guide]]). 
 +</WRAP>
  
-{{page>terminal_common}}+===== Reference Project Overview ===== 
 +The following commands were implemented in this version of EVAL-AD5755 reference project for Xilinx KC705 FPGA board. 
 +^ Command ^ Description ^ 
 +| **help?** | Displays all available commands. | 
 +| **register=** | Writes to the a data register. Accepted values:\\ **Register address:**\\ 0 - DAC Data Reg \\ 2 - Gain Register \\ 3 - Gain Register All DACs \\ 4 - Offset Register \\ 5 - Offset Register All DACs \\ 6 - Clear Code Register \\ 7 - Control Register \\ **Channel:**\\ 0 .. 3 - channel A .. D. \\ **Value:**\\ 0 .. 65535 - the value written to the DAC.\\ | 
 +| **control=** | Writes to the a control register. Accepted values:\\ **Register address:**\\ 0 - Slew Rate Register \\ 1 - Main Control Register \\ 2 - DAC Control Register \\ 3 - Dc-to-dc Control Register \\ 4 - Software Register \\ **Channel:**\\ 0 .. 3 - channel A .. D. \\ **Value:**\\ 0 .. 65535 - the value written to the DAC.\\ | 
 +| **register?** | Read back the value of a specified register. Accepted values:\\ Register address : 0x00 .. 0x1A. | 
 +| **power=** | Set the power state of the dc-to-dc converters, DAC and internal amplifiers for the selected channel. Accepted values:\\ **Channel:**\\ 0 .. 3 - channel A .. D.\\ **Value:**\\ 0 - turn off; 1 - turn on. | 
 +| **power?** | Displays the power state of the dc-to-dc converters,DAC and internal amplifiers for the selected channel. Accepted values:\\ **Channel:**\\ 0 .. 3 - channel A .. D. | 
 +| **range=** | Set the range of the selected channel. Accepted values:\\ **Channel:**\\ 0 .. 3 - channel A .. D.\\ **Range:**\\  0 - 0 V to 5 V voltage\\ 1 - 0 V to 10 V voltage\\ 2 - -5 V to +5 V voltage\\ 3 - -10 V to +10 V voltage\\ 4 - 4 mA to 20 mA current\\ 5 - 0 mA to 20 mA current\\ 6 - 0 mA to 24 mA current| 
 +| **range?** | Displays the range of the selected channel. Accepted values: \\ **Channel:**\\ 0 .. 3 - channel A .. D.| 
 +| **voltage=** | Sets the output voltage for a selected channel. Accepted values: \\ **Channel:**\\ 0 .. 3 - channel A .. D.\\ Desired voltage(unit in V) multiplied by 1000 | 
 +| **voltage?** | Displays the output voltage for a selected channel. Accepted values:\\ **Channel:**\\ 0 .. 3 - channel A .. D.| 
 +| **current=** | Displays the output current for a selected channel. Accepted values: \\ **Channel:**\\ 0 .. 3 - channel A .. D.\\ Desired current (unit in mA) multiplied by 1000 | 
 +| **current?** | Displays the output current for a selected channel. Accepted values: \\ **Channel:**\\ 0 .. 3 - channel A .. D. | 
 +| **getStatus!** | Read back the Status register and print any faults or errors. | 
 +| **testSPI!** | Ensure that the SPI interface are working correctly. | 
 +  
 +Commands can be executed using a serial terminal connected to the UART peripheral of Xilinx KC705 FPGA.
  
-===== Demonstration Project User Interface =====+The following image shows a generic list of commands in a serial terminal connected to Xilinx KC705 FPGA's UART peripheral. 
 +{{ :resources:fpga:xilinx:interposer:Terminal_KC705.jpg? }}
  
-This section presents the UART Terminal Interface, which helps the user to interact with the software application, that will run on the **Xilinx KC705** FPGA board. +===== Software Project Setup ===== 
- +{{page>import_workspace}}
-To use this interface, a terminal emulator software is needed, in this case the **Tera Term** is used. +
- +
-After programing the **KC705** FPGA with the //download.bit// file provided in the reference design archive, the message **AD5755 OK** should appear at the terminal window. +
- +
-{{ :resources:fpga:xilinx:interposer:adconnected.png?400 }} +
- +
-By using the command **help?**, can list out all the available commands for the current device, with a small description containing indications how to use them. +
- +
-{{ :resources:fpga:xilinx:interposer:terminal_help.png?400 }} +
- +
-The **AD5755** support the following commands, which can used to evaluate the converter: +
- +
-^ **Command** ^ **Description** ^ +
-| **help?** | Display all available commands | +
-| **register?** | Get register value for a specified channel, the command has two arguments: register address and channel | +
-| **register=** | Set a register value, the command has four arguments: register type, which can be data or control, register address, channel number and the desired value | +
-| **power?** | Display the power state of the dc-to-dc converters, DAC and internal amplifiers for the selected channel. The command has one argument : channel | +
-| **power=** | Set up the power state of the dc-to-dc converters, DAC and internal amplifiers for the selected channel. The command has two arguments: channel and 1 for ON and 0 for OFF | +
-| **range?** | Display the range of the selected channel. The command has one argument : channel | +
-| **range=** | Set the range of the selected channel. Has two argument: channel and range | +
-| **voltage?** | Display the output voltage of a specified channel. The command has one argument: channel | +
-| **voltage=** | Set the output voltage of a specified channel. The command using two arguments: channel and the desired value | +
-| **current?** | Display the output current of a specified channel. The command has one argument: channel | +
-| **current=** | Set the output current of a specified channel. The command using two arguments: channel and the desired value |+
  
 ====== More information ====== ====== More information ======
   * [[resources:tools-software:linux-drivers:iio-dac:ad5755|AD5755 IIO DAC Linux Driver]]   * [[resources:tools-software:linux-drivers:iio-dac:ad5755|AD5755 IIO DAC Linux Driver]]
 {{page>ez_common}} {{page>ez_common}}
resources/fpga/xilinx/interposer/ad5755.txt · Last modified: 09 Jan 2021 00:48 by Robin Getz