This document presents the steps to setup an environment for using the EVAL-AD5694RSDZ evaluation board together with the Xilinx KC705 FPGA board, the Xilinx Embedded Development Kit (EDK) and the Micrium µC-Probe run-time monitoring tool. Below is presented a picture of the EVAL-AD5694RSDZ Evaluation Board with the Xilinx KC705 board.
For component evaluation and performance purposes, as opposed to quick prototyping, the user is directed to use the part evaluation setup. This consists of:
The SDP-B controller board is part of Analog Devices System Demonstration Platform (SDP). It provides a high speed USB 2.0 connection from the PC to the component evaluation board. The PC runs the evaluation software. Each evaluation board, which is an SDP compatible daughter board, includes the necessary installation file required for performance testing.
Note: it is expected that the analog performance on the two platforms may differ.
Below is presented a picture of SDP-B Controller Board with the EVAL-AD5694RSDZ Evaluation Board.
The EVAL-AD5694RSDZ evaluation board is designed to help customers quickly prototype new AD5694R/ AD5694R circuits and reduce design time.
The AD5694R nanoDAC is a quad, 12-bit, rail-to-rail, voltage output DAC. The device includes a 2.5V, 2ppm/°C internal reference (enabled by default) and a gain select pin giving a full-scale output of 2.5V (gain=1) or 5V (gain=2). The device operates from a single 2.7 V to 5.5 V supply, is guaranteed monotonic by design and exhibits less than 0.1% FSR gain error and 1.5mV offset error performance. The device is available in a 3mm X 3mm LFCSP and a TSSOP package.
The first objective is to ensure that you have all of the items needed and to install the software tools so that you are ready to create and run the evaluation project.
The following table presents a short description the reference design archive contents.
|Bit||Contains the KC705 configuration file that can be used to program the system for quick evaluation.|
|Microblaze||Contains the EDK project for the Microblaze softcore that will be implemented in the KC705 FPGA.|
|Software||Contains the source files of the software project that will be run by the Microblaze processor.|
|uCProbeInterface||Contains the uCProbe interface and the .elf symbols file used by uC-Probe to access data from the Microbalze memory.|
Before connecting the ADI evaluation board to the Xilinx KC705 make sure that the VADJ_FPGA voltage of the KC705 is set to 3.3V. For more details on how to change the setting for VADJ_FPGA visit the Xilinx KC705 product page.
At this point everything is set up and it is possible to start the evaluation of the ADI hardware through the controls in the uC-Probe application provided in the reference design.
Launch uC-Probe from the Start → All Programs → Micrium → uC-Probe.
Select uC-Probe options.
Set target board communication protocol as RS-232
Setup RS-232 communication settings
In some cases it is possible that the uC-Probe interface will not respond to the commands the first time it is ran. In this situation just stop the interface by pressing the Stop button and run it again by pressing the Play button.
The following figure presents the uC-Probe interface that can be used for monitoring and controlling the operation of the EVAL-AD5694RSDZ evaluation board.
Section A is used to activate the board and monitor activity. The communication with the board is activated / deactivated by toggling the ON/OFF switch. The Activity LED turns green when the communication is active. If the ON/OFF switch is set to ON and the Activity LED is BLACK it means that there is a communication problem with the board. See the Troubleshooting section for indications on how to fix the communication problems.
Section B is used to select the Command to be sent to the DAC. The definition of each command is available in Table 7 of the part's datasheet.
Section C is used to select the Address of the registers to be affected by the command, if the command is 1, 2 or 3. If the selected command is 5, the Address buttons will be used to program the LDAK MASK REGISTER for the corresponding DAC. For the other commands, they are ignored.
Section D is used to program the value to be written to the DAC registers.
Section E is used to send the selected command to the DAC.
Section F is used to configure the databits sent for the command 4. Each DAC's power operation can be configured independently.
Section G is used to configure the databits sent for the command 7. If the button is pressed, the Internal reference will be turned off.
Section H is used to control the Hardware pins of the AD7694R.
Section I is used to perform a readback of all four registers of AD7694R.
In case there is a communication problem with the board the follwing actions can be perfomed in order to try to fix the issues: