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resources:fpga:xilinx:interposer:ad5541a [02 Aug 2013 16:37] – added new reference design files Lucian Sinresources:fpga:xilinx:interposer:ad5541a [09 Jan 2021 00:48] (current) – user interwiki links Robin Getz
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   * [[adi>AD5541A|AD5541A Product Info]] - pricing, samples, datasheet   * [[adi>AD5541A|AD5541A Product Info]] - pricing, samples, datasheet
   * {{resources:fpga:altera:bemicro:ad5541a_ug.pdf|EVAL-AD5541ASDZ evaluation board user guide}}   * {{resources:fpga:altera:bemicro:ad5541a_ug.pdf|EVAL-AD5541ASDZ evaluation board user guide}}
-  * [[http://www.xilinx.com/products/boards-and-kits/EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]]+  * [[xilinx>products/boards-and-kits/EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]]
  
 ====== Getting Started ====== ====== Getting Started ======
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 ===== Required Hardware ===== ===== Required Hardware =====
  
-  * [[http://www.xilinx.com/products/boards-and-kits/EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]]+  * [[xilinx>products/boards-and-kits/EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]]
   * FMC-SDP adapter board   * FMC-SDP adapter board
   * **EVAL-AD5541ASDZ** evaluation board   * **EVAL-AD5541ASDZ** evaluation board
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   * Xilinx ISE 14.6.   * Xilinx ISE 14.6.
   * UART Terminal (Termite/Tera Term/Hyperterminal), baud rate 115200.   * UART Terminal (Termite/Tera Term/Hyperterminal), baud rate 115200.
-  * The EVAL-AD5541ASDZ reference project for Xilinx KC705 FPGA.+  * The EVAL-AD5541A reference project for Xilinx KC705 FPGA.
  
 ===== Downloads ===== ===== Downloads =====
 <WRAP round download 80%> <WRAP round download 80%>
 \\ \\
-  * {{:resources:fpga:xilinx:interposer:cf_ad5541a_kc705.zip|Reference Design Files}}+  * **AD5541A Driver:** https://github.com/analogdevicesinc/no-OS/tree/master/device_drivers/AD5446 
 +  * **AD5541A Commands:** https://github.com/analogdevicesinc/no-OS/tree/master/device_commands/AD5446 
 +  * **Xilinx Boards Common Drivers:** https://github.com/analogdevicesinc/no-OS/tree/master/platform_drivers/Xilinx/SDP_Common 
 +  * **EDK KC705 Reference project:** https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_sdp_kc705
 \\ \\
 </WRAP> </WRAP>
- 
 ====== Run the Demonstration Project ====== ====== Run the Demonstration Project ======
  
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   * Connect the JTAG and UART cables to the KC705 and power up the FPGA board.   * Connect the JTAG and UART cables to the KC705 and power up the FPGA board.
  
-===== Quick start evaluation ===== +<WRAP round important 80%>
-For a quick start evaluation, run the **download.bat** script located in the **SDK/SDK_Workspace/bin** folder provided within the Reference Design Files.  This script uses XMD to program the FPGA with the HDL Reference Design and download the Software Reference Design into the DDR. +
- +
-<WRAP round info 80%>+
 \\ \\
-The **download.bat** script assumes that the Xilinx ISE Design Suite 14.6 is installed at this path: **C:/Xilinx/14.6**. If the installation path on your computer is different, please modify the script accordingly.+The EVAL-AD5542A evaluation board will be powered from PCs USB interface (LK8 position=A, LK9 position=B, LK7 position=B, LK3 position=A, LK2 position=A).
 </WRAP> </WRAP>
- 
-If programming was successful, you should be seeing the command messages appear on the terminal. 
 ===== Reference Project Overview ===== ===== Reference Project Overview =====
-The following commands were implemented in this version of EVAL-AD5541ASDZ reference project for Xilinx KC705 FPGA board.+The following commands were implemented in this version of EVAL-AD5541A reference project for Xilinx KC705 FPGA board.
 ^ Command ^ Description ^ ^ Command ^ Description ^
 | **help?** | Displays all available commands. | | **help?** | Displays all available commands. |
-| **voltage=** | Sets the DAC output voltage. Accepted values:\\ 0 .. 2500 - desired output voltage in milivolts. | +| **register=** | Writes to the DAC register. Accepted values:\\ 0 .. 65535 - the value written to the DAC. |
-| **voltage?** |  Displays last written voltage value to the DAC. | +
-| **register=** | Writes to the DAC register. Accepted values:\\ 0 .. 65535 -  the value written to the DAC. |+
 | **register?** | Displays last written value in the DAC register. | | **register?** | Displays last written value in the DAC register. |
 +| **voltage=** | Sets the DAC output voltage. Accepted values:\\ 0 .. +2500 - desired output voltage in milivolts. |
 +| **voltage?** | Displays last written voltage value to the DAC. |
 +| **ldacPin=** | Sets the output value of LDAC pin. Accepted values:\\ 0 - sets LDAC pin low.(default)\\ 1 - sets LDAC pin high. |
 +| **ldacPin?** | Displays the value of LDAC pin. |
  
 Commands can be executed using a serial terminal connected to the UART peripheral of Xilinx KC705 FPGA. Commands can be executed using a serial terminal connected to the UART peripheral of Xilinx KC705 FPGA.
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 ===== Software Project Setup ===== ===== Software Project Setup =====
-The **HDL Reference Design** for each supported Xilinx FPGA board contains a folder called //**SDK_Workspace**// which stores the Xilinx SDK project files needed to build the no-OS software and also the .bit files with the HDL design that must be programmed into the FPGA. +{{page>import_workspace}}
-These are the steps that need to be followed to recreate the software project: +
-  * Download the //**Reference Design Files**// on your computer. There you'll find the //**SDK_Workspace**// folder. Make sure that the path where it is stored does not contain any spaces.   +
-{{:resources:fpga:xilinx:fmc:ad9739a_ebz:src_files.png?200|no-OS driver Source Files}} +
-  * Open the Xilinx SDK. When the SDK starts, it asks you to provide a folder where to store the workspace. Any folder can be provided. +
-  * In the SDK select the //**File->Import**// menu option to import the software projects into the workspace. +
-{{:resources:fpga:xilinx:fmc:ad9739a_ebz:file_import.png?200|Import Projects}} +
-  * In the //Import// window select the //**General->Existing Projects into Workspace**// option. +
-{{:resources:fpga:xilinx:fmc:ad9739a_ebz:existing_project_import.png?200|Existing Projects Import}} +
-  * In the //Import Projects// window select the //**SDK_Workspace**// folder as root directory. After the root directory is chosen the projects that reside in that directory will appear in the //Projects// list. Press //Finish// to finalize the import process. +
-{{:resources:fpga:xilinx:fmc:ad9739a_ebz:projects_import.png?200|Projects Import}}  +
-  * The //Project Explorer// window now shows the projects that exist in the workspace and the files for each project. The SDK should automatically build the projects and the //Console// window will display the result of the build. If the build is not done automatically, select the //**Project->Build Automatically**// menu option. +
-{{:resources:fpga:xilinx:fmc:ad9739a_ebz:project_explorer.png?200|Project Explorer}} +
-  * At this point the software project setup is complete, the FPGA can be programmed and the software can be downloaded into the system.+
  
 ====== More information ====== ====== More information ======
   * [[resources:tools-software:linux-drivers:iio-dac:ad5446|AD5541A IIO DAC Linux Driver]]   * [[resources:tools-software:linux-drivers:iio-dac:ad5446|AD5541A IIO DAC Linux Driver]]
 {{page>ez_common}} {{page>ez_common}}
resources/fpga/xilinx/interposer/ad5541a.1375454264.txt.gz · Last modified: 02 Aug 2013 16:37 by Lucian Sin

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