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resources:fpga:xilinx:interposer:ad5443 [04 Sep 2012 15:47] – [Supported Devices] Andrei Cozmaresources:fpga:xilinx:interposer:ad5443 [09 Jan 2021 00:48] (current) – user interwiki links Robin Getz
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 ===== Evaluation Boards ===== ===== Evaluation Boards =====
  
-  * [[adi>EVAL-AD5443SDZ]] +  * [[adi>EVAL-AD5443|EVAL-AD5443SDZ]] 
 +  * [[adi>EVAL-AD5443-DBRDZ]]
 ====== Overview ====== ====== Overview ======
  
-This document presents the steps to setup an environment for using the **[[adi>AD5443|EVAL-AD5443SDZ]]** evaluation board together with the Xilinx KC705 FPGA board, the Xilinx Embedded Development Kit (EDK) and the [[http://micrium.com/page/products/tools/probe|Micrium µC-Probe]] run-time monitoring tool. Below is presented a picture of the EVAL-AD5443SDZ Evaluation Board with the Xilinx KC705 board.+This document presents the steps to setup an environment for using the **[[adi>AD5443|EVAL-AD5443SDZ]]** evaluation board together with the Xilinx KC705 FPGA board and the Xilinx Embedded Development Kit (EDK). Below is presented a picture of the EVAL-AD5443SDZ Evaluation Board with the Xilinx KC705 board.
  
 {{ :resources:fpga:xilinx:interposer:img_ad5443.jpg?400 }} {{ :resources:fpga:xilinx:interposer:img_ad5443.jpg?400 }}
  
-For component evaluation and performance purposes, as opposed to quick prototyping, the user is directed to Analog Devices [[/resources/eval/sdp|System Demonstration Platform]] (**SDP**). The **SDP** consists of a: +{{page>common_sdp}}
-  * a controller board, like the **[[resources/eval/sdp/sdp-b|EVAL-SDP-CB1Z]] (SDP-B)** +
-  * a compatible Analog Devices SDP [[adi>sdp#exallist|product evaluation board]] +
-  * corresponding PC software +
-The EVAL-SDP-CB1Z controller board is part of Analog Devices SDP providing USB 2.0 high-speed connectivity to a PC computer running specific component evaluation software.  Each SDP evaluation daughter board includes the necessary installation files needed for this performance testing. It's expected that the analog performance on the two platforms may differ.+
  
 Below is presented a picture of **SDP-B** Controller Board with the **EVAL-AD5443SDZ** Evaluation Board. Below is presented a picture of **SDP-B** Controller Board with the **EVAL-AD5443SDZ** Evaluation Board.
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 {{ :resources:fpga:altera:bemicro:ad5443_sdp1z.png?400 }} {{ :resources:fpga:altera:bemicro:ad5443_sdp1z.png?400 }}
  
-The [[adi>AD5443]] is a CMOS12-bit current output digital-to-analog converters (DACs), respectively. These devices operate from a 3 V to 5.5 V power supply, makingthem suitable for battery-powered applications and many other applications. +The [[adi>AD5443]] is a CMOS12-bit current output digital-to-analog converters (DACs), respectively. These devices operate from a 3 V to 5.5 V power supply, making them suitable for battery-powered applications and many other applications.
- +
-The **EVAL-AD5443** evaluation board is designed to help customers quickly prototype new AD5443 circuits and reduce design time. The board requires ±5 V supplies. The +5 V VDD and -5 V VSS are used to power the output amplifier.+
  
 +The **EVAL-AD5443** evaluation board is designed to help customers quickly prototype new AD5443 circuits and reduce design time.
  
 ===== More information ===== ===== More information =====
   * [[adi>AD5443|AD5443 Product Info]] - pricing, samples, datasheet   * [[adi>AD5443|AD5443 Product Info]] - pricing, samples, datasheet
   * [[adi>/static/imported-files/user_guides/UG-327.pdf|EVAL-AD5443SDZ evaluation board user guide]]   * [[adi>/static/imported-files/user_guides/UG-327.pdf|EVAL-AD5443SDZ evaluation board user guide]]
-  * [[http://www.xilinx.com/products/boards-and-kits/EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]] +  * [[xilinx>products/boards-and-kits/EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]]
-  * [[http://micrium.com/page/products/tools/probe|Micrium uC-Probe]]+
  
 ====== Getting Started ====== ====== Getting Started ======
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 ===== Required Hardware ===== ===== Required Hardware =====
  
-  * [[http://www.xilinx.com/products/boards-and-kits/EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]]+  * [[xilinx>products/boards-and-kits/EK-K7-KC705-G.htm | Xilinx KC705 FPGA board]]
   * FMC-SDP adapter board   * FMC-SDP adapter board
   * **EVAL-AD5443** evaluation board   * **EVAL-AD5443** evaluation board
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 ===== Required Software ===== ===== Required Software =====
  
-  * Xilinx ISE 13.4 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack). +  * Xilinx ISE 14.6 (Programmer (IMPACT) is sufficient for the demo and is available on Webpack). 
-  * [[http://micrium.com/page/products/tools/probe|uC-Probe]] run-time monitoring tool+  * UART Terminal (Termite/Tera Term/Hyperterminal), baud rate 115200. 
 +  * The EVAL-AD5443 reference project for Xilinx KC705 FPGA.
  
 ===== Downloads ===== ===== Downloads =====
 +<WRAP round download 80%>
 +\\
 +  * **AD5443 Driver:** https://github.com/analogdevicesinc/no-OS/tree/master/device_drivers/AD5449
 +  * **AD5443 Commands:** https://github.com/analogdevicesinc/no-OS/tree/master/device_commands/AD5449
 +  * **Xilinx Boards Common Drivers:** https://github.com/analogdevicesinc/no-OS/tree/master/platform_drivers/Xilinx/SDP_Common
 +  * **EDK KC705 Reference project:** https://github.com/analogdevicesinc/fpgahdl_xilinx/tree/master/cf_sdp_kc705
 +\\
 +</WRAP>
 +===== Hardware setup =====
  
-  * {{:resources:fpga:xilinx:interposer:ad5443_evalboard.zip|Reference Design Files}} +<WRAP round important 80%> 
- +\\ 
-The following table presents a short description the reference design archive contents. +Before connecting the ADI evaluation board to the Xilinx KC705 make sure that the VADJ_FPGA voltage of the KC705 is set to 3.3V. For more details on how to change the setting for VADJ_FPGA visit the Xilinx KC705 product page. 
- +</WRAP>
-^ **Folder** ^ **Description** ^ +
-| Bit | Contains the KC705 configuration file that can be used to program the system for quick evaluation. | +
-| Microblaze | Contains the EDK 13.4 project for the Microblaze softcore that will be implemented in the KC705 FPGA. | +
-| Software | Contains the source files of the software project that will be run by the Microblaze processor.| +
-| uCProbeInterface | Contains the uCProbe interface and the .elf symbols file used by uC-Probe to access data from the Microblaze memory. | +
- +
-====== Run the Demonstration Project ====== +
- +
-{{page>ucprobe_common}}+
  
-===== Demonstration Project User Interface =====+  * Use the FMC-SDP interposer to connect the ADI evaluation board to the Xilinx KC705 board on the FMC LPC connector. 
 +  * Connect the JTAG and UART cables to the KC705 and power up the FPGA board.
  
-The following figure presents the **uC-Probe** interface that can be used for monitoring and controlling the operation of the **EVAL-AD5443** evaluation board.+<WRAP round important 80%> 
 +\\ 
 +To power on the EVAL-AD5443 evaluation board, you need to apply ±12V differential voltage to J6 connector on the board. 
 +</WRAP> 
 +===== Reference Project Overview ===== 
 +The following commands were implemented in this version of EVAL-AD5443 reference project for Xilinx KC705 FPGA board. 
 +^ Command ^ Description ^ 
 +| **help?** | Displays all available commands. | 
 +| **load=** | Loads selected DAC input register with a given value. Accepted values:\\ channel:\\ 0 - select DAC A input register.\\ 1 - select DAC B input register.\\ value:\\ 0 .. 4095 - value to be written in register. | 
 +| **loadAndUpdate=** | Loads and updates the selected DAC with a given value. Accepted values:\\ channel:\\ 0 - select DAC A.\\ 1 - select DAC B.\\ value:\\ 0 .. 4095 - value to be written in register. | 
 +| **readback?** | Reads from the selected DAC register. Accepted values:\\ channel:\\ 0 - read from DAC A.\\ 1 - read from DAC B. | 
 +| **clearToZero!** | Clears both DAC outputs to zero scale. | 
 +| **clearToMid!** | Clears both DAC outputs to midscale. | 
 +| **ldacPin=** | Sets the output value of LDAC pin. Accepted values:\\ 0 - sets LDAC pin low.(default)\\ 1 - sets LDAC pin high. | 
 +| **ldacPin?** | Displays the value of LDAC pin. | 
 +| **clrPin=** | Sets the output value of CLR pin. Accepted values:\\  | 
 +| **clrPin?** | Displays the value of CLR pin. |
  
-{{ :resources:fpga:altera:bemicro:ad5443_interface.png?700 }} 
  
-The communication with the board is activated / deactivated by toggling the **//ON/OFF//** switch. The **//Activity//** LED turns green when the communication is active. If the **//ON/OFF//** switch is set to **//ON//** and the **//Activity//** LED is **//BLACK//** it means that there is a communication problem with the board. The slider is used to set the value desired to be written to the AD5443 DAC Register. The other 2 switches are used to set a zero scale or a midscale for the DAC.+Commands can be executed using a serial terminal connected to the UART peripheral of Xilinx KC705 FPGA.
  
-===== Troubleshooting =====+The following image shows a generic list of commands in a serial terminal connected to Xilinx KC705 FPGA's UART peripheral. 
 +{{ :resources:fpga:xilinx:interposer:Terminal_KC705.jpg? }}
  
-In case there is a communication problem with the board the follwing actions can be perfomed in order to try to fix the issues: +===== Software Project Setup ===== 
-  * Check that the evaluation board is powered as instructed in the board's user guide. +{{page>import_workspace}}
-  * In uC-Probe refresh the symbols file by right-clicking on the **//System Browser//** window and selecting **//Refresh Symbols//**. +
-  * If the communication problem persists even after performing the previous steps, restart the uC-Probe application and try to run the interface again.+
  
 ====== More information ====== ====== More information ======
 {{page>ez_common}} {{page>ez_common}}
resources/fpga/xilinx/interposer/ad5443.1346766428.txt.gz · Last modified: 04 Sep 2012 15:47 by Andrei Cozma

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