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--- resources:fpga:altera:ced1z:adas3022 [07 May 2018 14:09] – Removed testbench from the HDL folder description, as it's not available Adrian Costina
+++ resources:fpga:altera:ced1z:adas3022 [11 Jan 2021 09:40] (current) – Fixed bad link for EVAL-ADAS3022 Ioana Chelaru
@@ Line 3: / Line 3: @@
 ====== Overview ======
-This document presents the steps to setup an environment for using the **[[adi>ADAS3022EDZ| EVAL-ADAS3022EDZ]]** evaluation board together with the **[[adi>EVAL-CED|EVAL-CED Converter Evaluation and Development (CED) Board]]**, the Nios II Embedded Development Suite (EDS). Below is presented a picture of the EVAL-ADAS3022EDZ Evaluation Board with the CED1 board.
+This document presents the steps to setup an environment for using the **[[adi>EVAL-ADAS3022| EVAL-ADAS3022EDZ]]** evaluation board together with the **[[adi>EVAL-CED|EVAL-CED Converter Evaluation and Development (CED) Board]]**, the Nios II Embedded Development Suite (EDS). Below is presented a picture of the EVAL-ADAS3022EDZ Evaluation Board with the CED1 board.
 {{ :resources:fpga:altera:ced1z:ced1z_adas3022.png?500 }}

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