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====== BeMicro FPGA Project for CN0202 with Nios driver ======

===== Supported Devices =====

  * [[adi>AD5662]]
  * [[adi>AD5750]]

===== Reference Circuits =====

  * [[adi>CN0202]]
====== Overview ======

This lab presents the steps to setup an environment for using the **[[adi>EVAL-CN0202-SDPZ]]** evaluation board together with the **[[https://www.intel.com/content/www/us/en/programmable/b/bemicro-sdk.html|BeMicro SDK]]** USB stick, the Nios II Embedded Development Suite (EDS) and the [[http://micrium.com/tools/ucprobe/overview/|Micrium μC-Probe]] run-time monitoring tool. Below is presented a picture of the EVAL-CN0202-SDPZ Evaluation Board with the BeMicro SDK Platform.

{{ :resources:fpga:altera:bemicro:cn0202_bemicro.jpg?400 }}

{{page>common_sdp}}

Below is presented a picture of **SDP-B** Controller Board with the **EVAL-CN0202-SDPZ** Evaluation Board.

{{ :resources:fpga:altera:bemicro:cn0202_sdp1z.jpg?400 }}

The **EVAL-CN0202-SDPZ** board provides a full function, flexible, programmable analog output solution that meets most requirements for programmable logic controller (PLC) and distributed control system (DCS) applications.

The [[adi>AD5662]] low power (0.75 mW typical @ 5 V), rail-to-rail output, 16-bit nanoDAC® device and the [[adi>AD5751]] industrial current/voltage output driver are well matched with respect to input and output voltage ranges, as well as reference voltage requirements.

The [[adi>AD5662]], a member of the nanoDAC family, is a low power, single, 16-bit buffered voltage-out DAC that operates from a single 2.7 V to 5.5 V supply and is guaranteed monotonic by design.

The AD5662 requires an external reference voltage to set the output range of the DAC. The part incorporates a power-on reset circuit that ensures the DAC output powers up to 0 V (AD5662x-1) or to midscale (AD5662x-2), and remains there until a valid write takes place. The part contains a power-down feature that reduces the current consumption of the device to 480 nA at 5 V and provides software-selectable output loads while in power-down mode.

The low power consumption of this part in normal operation makes it ideally suited to portable battery-operated equipment. The power consumption is 0.75 mW at 5 V, going down to 2.4 μW in power-down mode.
The AD5662’s on-chip precision output amplifier allows rail-to-rail output swing to be achieved. For remote sensing applications, the output amplifier’s inverting input is available to the user.

The [[adi>AD5750]] is a single-channel, low cost, precision voltage/current output driver with hardware- or software- programmable output ranges. The software ranges are configured via an SPI-/MICROWIRE™-compatible serial interface. The AD5750 target applications in PLC and industrial process control. The analog input to the AD5750 is provided from a low voltage, single-supply digital-to-analog converter (DAC) and is internally conditioned to provide the desired output current/voltage range. Analog input range available is 0 V to 4.096 V.

The output current range is programmable across five current ranges: 4 mA to 20 mA, 0 mA to 20 mA or 0 mA to 24 mA, ±20 mA, and ±24 mA. An overrange of 2% is available on the unipolar current ranges.

Voltage output is provided from a separate pin that can be configured to provide 0 V to 5 V, 0 V to 10 V, ±5 V, or ±10 V output ranges. An overrange of 20% is available on the voltage ranges.

Analog outputs are short-circuit and open-circuit protected and can drive capacitive loads of 1 μF and inductive loads of 0.1 H.

The device is specified to operate with a power supply range from ±12 V to ±24 V. Output loop compliance is 0 V to AVDD − 2.75 V.

The flexible serial interface is SPI and MICROWIRE compatible and can be operated in 3-wire mode to minimize the digital isolation required in isolated applications. The interface also features an optional PEC error checking feature using CRC-8 error checking, useful in industrial environments where data communication corruption can occur.

The device also includes a power-on reset function, ensuring that the device powers up in a known state (0 V or tristate), and an asynchronous CLEAR pin that sets the outputs to zero scale/midscale voltage output or the low end of the selected current range.

An HW SELECT pin is used to configure the part for hardware or software mode on power-up.

===== More information =====
  * [[adi>CN0202|CN0202 Product Info]] - pricing, samples, datasheet
  * [[adi>AD5662|AD5662 Product Info]] - pricing, samples, datasheet
  * [[adi>AD5750|AD5750 Product Info]] - pricing, samples, datasheet
  * [[adi>CN0202|EVAL-CN0202-SDPZ evaluation board user guide]]
  * [[https://www.intel.com/content/www/us/en/programmable/b/bemicro-sdk.html|BeMicro SDK]]
  * [[http://www.altera.com/devices/processor/nios2|Nios II Embedded Development Suite (EDS)]]
  * [[http://micrium.com/tools/ucprobe/overview/|Micrium uC-Probe]]

====== Getting Started ======

The first objective is to ensure that you have all of the items needed and to install the software tools so that you are ready to create and run the evaluation project.


===== Hardware Items =====

Below is presented the list of required hardware items:
  * Arrow Electronics [[https://www.intel.com/content/www/us/en/programmable/b/bemicro-sdk.html|BeMicro SDK]] FPGA-based MCU Evaluation Board
  * [[adi>sdp-bemicro|BeMicro SDK/SDP Interposer]] adapter board
  * **EVAL-CN0202-SDPZ** evaluation board
  * Intel Pentium III or compatible Windows PC, running at 866MHz or faster, with a minimum of 512MB of system memory


===== Software Tools =====

Below is presented the list of required software tools:
  * [[http://www.altera.com/products/software/quartus-ii/web-edition/qts-we-index.html|Quartus II Web Edition]] design software v11.0
  * [[https://www.altera.com/download/software/nios-ii|Nios II EDS]] v11.0
  * [[http://micrium.com/tools/ucprobe/trial/|uC-Probe]] run-time monitoring tool, version 2.5

The **Quartus II** design software and the **Nios II EDS** is available via the Altera Complete Design Suite DVD or by downloading from the web. 

The **Micrium uC/Probe Trial** version 2.5 is available via download from the web at [[http://micrium.com/tools/ucprobe/trial/]].  After installation add to the “Path” system variable the entry "//%QUARTUS_ROOTDIR%\bin\//“ on the third position in the list.

===== Downloads =====
  * {{{{:resources:fpga:altera:bemicro:cn0202_evalboardlab.zip|Lab Design Files}}
===== Extract the Lab Files =====

Create a folder called “**//ADIEvalBoardLab//**” on your PC and extract the **//cn0202_evalboardlab.zip//** archive to this folder. Make sure that there are **//NO SPACES//** in the directory path. After extracting the archive the following folders should be present in the **//ADIEvalBoardLab//** folder: **//FPGA//**, **//Software//**, **//ucProbeInterface//**, **//NiosCpu//**.

{{ :resources:fpga:altera:bemicro:labfolders.png?500 }}

====== ======

{{page>common_usb}}

{{page>common_quick_eval}}

{{page>common_spi_i2c}}

{{page>common}}


====== uC-Probe Interface ======

A notable challenge in embedded systems development is to overcome the lack of feedback that such systems typically provide. Many developers resort to blinking LEDs or instrumenting their code with //printf()// in order to determine whether or not their systems are running as expected. **Micrium** provides a unique tool named **μC-Probe** to assist these developers. With this tool, developers can effortlessly read and write the variables on a running embedded system.
This section presents the steps required to install the **Micrium uC-Probe** software tool and to run the demonstration project for the ADI evaluation board. A description of the **uC-Probe** demonstration interface is provided.

===== Configure uC-Probe =====

Launch **uC-Probe** from the **//Start -> All Programs -> Micrium -> uC-Probe//**.

Select **uC-Probe** options.
  * Click on the **uC-Probe** icon on the top left portion of the screen.
  * Click on the **//Options//** button to open the dialog box.

{{ :resources:fpga:altera:bemicro:ucprobeoptionsbtn.png?300 }}

Set target board communication protocol as **//JTAG UART//**
  * Click on the **//Communication//** tab icon on the top left portion of the dialog box
  * Select the **//JTAG UART//** option.

{{ :resources:fpga:altera:bemicro:image067.png?400 }}

Setup **//JTAG UART//** communication settings
  * Select the **//JTAG-UART//** option from the **//Communication//** tab.
  * Press the **//Open File//** button to select the JTAG Debug Information file (**//.jdi//**)
  * Navigate to the **//ADIEvalBoardLab/FPGA//** folder and select the BeMicroSDK.jdi file. Press Open.
  * Type the value **//1//** in the the **//Device Id//** window.

{{ :resources:fpga:altera:bemicro:ucprobeoptionsjtag.png?400 }}

  * Select **//uCProbe_uart(0)//** from the **//Instance Id//** pulldown menu.

{{ :resources:fpga:altera:bemicro:image073.png?400 }}

  * Press **//Apply//** and **//OK//** to exit the options menu. The embedded target has two UARTs. **uC-Probe** will be communicating with the **//uCProbe_uart//**.

===== Load and Run the Demonstration Project =====

  * Click the **//Open//** option from the **uC-Probe** menu and select the file **//ADIEvalBoardLab/ucProbeInterface/CN0202_Interface.wsp//**.

{{:resources:fpga:altera:bemicro:ucprobeopenfile.png?400}}
{{:resources:fpga:altera:bemicro:cn0202interfaceopen.png?400}}

  * Before opening the interface **uC-Probe** will ask for a symbols file that must be associated with the interface. If the lab was done according to the steps provided in the **Quick Evaluation** section, select the file **//ADIEvalBoardLab/ucProbeInterface/ADIEvalBoard.elf//** to be loaded as a symbol file, otherwise select the file **//ADIEvalBoardLab/FPGA/software/ADIEvalBoard/ADIEvalBoard.elf//** to be loaded as a symbol file.

{{:resources:fpga:altera:bemicro:ucprobeopenelfquickeval.png?400}}{{:resources:fpga:altera:bemicro:ucprobeopenelfnormal.png?400}}

  * Run the demonstration project by pressing the **//Play//** button.

{{ :resources:fpga:altera:bemicro:image081.png?400 }}

====== Demonstration Project User Interface ======

The following figure presents the **uC-Probe** interface that can be used for monitoring and controlling the operation of the **EVAL-CN0202-SDPZ** evaluation board.

{{ :resources:fpga:altera:bemicro:cn0202_interface.png?600 }}

**Section A** is used to activate the board and monitor activity. The communication with the board is activated / deactivated by toggling the **//ON/OFF//** switch. The **//Activity//** LED turns green when the communication is active. If the **//ON/OFF//** switch is set to **//ON//** and the **//Activity//** LED is **//BLACK//** it means that there is a communication problem with the board. See the **Troubleshooting** section for indications on how to fix the communication problems.

**Section B** is used to load a digital value to AD5662.

**Section C** is used to display the state of the error bits.

**Section D** is used to toggle the Clear Pin and to specify the JP1 position.

**Section E** is used to modify the output range.

{{page>troubleshooting}}
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