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resources:fpga:altera:bemicro:adn2850 [16 Sep 2011 08:47] – [Software Tools] Andrei Cozmaresources:fpga:altera:bemicro:adn2850 [26 Jan 2021 01:22] (current) – update arrow links after their web site update Robin Getz
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-====== Overview ======+====== BeMicro FPGA Project for ADN2850 with Nios driver ======
  
-This lab presents the steps to setup an environment for using the **EVAL-ADN2850SDZ** evaluation board together with the **BeMicro SDK** USB stick, the Nios II Embedded Development Suite (EDS) and the Micrium uC-Probe run-time monitoring tool. Below is presented a picture of the EVAL-ADN2850SDZ Evaluation Board with the BeMicro SDK Platform.+===== Supported Devices =====
  
-{{ :resources:fpga:altera:bemicro:adn2850_bemicro.png?400 }}+  * [[adi>ADN2850]]
  
-For component evaluation and performance purposes, as opposed to quick prototyping, the user is directed to Analog Devices System Demonstration Platform (**SDP**). The **SDP** consists of the **EVAL-SDP-CB1Z (SDP-B)** controller board, various Analog Devices component evaluation daughter boards such as the **EVAL-ADN2850SDZ** and corresponding PC software.  The **EVAL-SDP-CB1Z** controller board is part of Analog Devices SDP providing USB 2.0 high-speed connectivity to a PC computer running specific component evaluation software.  Each SDP evaluation daughter board includes the necessary installation files needed for this performance testing. Below is presented a picture of **SDP-B** Controller Board with the **EVAL-ADN2850SDZ** Evaluation Board.+===== Evaluation Boards =====
  
-{{ :resources:fpga:altera:bemicro:adn2850_blackfin.png?400 }}+  * [[adi>EVAL-ADN2850SDZ ]]
  
-The **EVAL-ADN2850SDZ** evaluation board is a member of a growing number of boards available for the **SDP**.  Designed to help customers evaluate performance or quickly prototype new **ADN2850** circuits and reduce design time, the **EVAL-ADN2850SDZ** evaluation board can operate in single-supply and dual-supply mode and incorporates an internal power supply powered from the USB.+====== Overview ======
  
-The [[adi>ADN2850]] is a dual-channel, nonvolatile memory, digitally controlled resistors with 1024-step resolution, offering guaranteed maximum low resistor tolerance error of ±8%. The device performs the same electronic adjustment function as a mechanical rheostat with enhanced resolution, solid state reliability, and superior low temperature coefficient performance. The versatile programming of the ADN2850 via an SPI®-compatible serial interface allows 16 modes of operation and adjustment including scratchpad programming, memory storing and restoring, increment/decrement, ±6 dB/step log taper adjustment, wiper setting readback, and extra EEMEM for user-defined information such as memory data for other components, look-up table, or system identification information.+This lab presents the steps to setup an environment for using the **[[adi>EVAL-ADN2850SDZ]]** evaluation board together with the **[[https://www.intel.com/content/www/us/en/programmable/b/bemicro-sdk.html|BeMicro SDK]]** USB stick, the Nios II Embedded Development Suite (EDS) and the [[http://micrium.com/tools/ucprobe/overview/|Micrium μC-Probe]] run-time monitoring tool. Below is presented a picture of the EVAL-ADN2850SDZ Evaluation Board with the BeMicro SDK Platform.
  
-Complete specifications for the AD5235 part can be found in the datasheet available at: [[adi>ADN2850|ADN2580 Product page]]. +{{ :resources:fpga:altera:bemicro:ad2850_bemicro.png?400 }}
  
-Complete specifications for the EVAL-ADN2850SDZ board can be found in the [[adi>/static/imported-files/user_guides/UG-276.pdf|evaluation’s board user guide]].+{{page>common_sdp}}
  
-Complete specifications for the EVAL-SDP-CB1Z board can be found in the [[adi>/static/imported-files/user_guides/UG-276.pdf/UG-277.pdf|controller board user guide]].+Below is presented a picture of **SDP-B** Controller Board with the **EVAL-ADN2850SDZ** Evaluation Board.
  
-Complete specifications for the BeMicro SDK are available at: +{{ :resources:fpga:altera:bemicro:ad2850_sdp1z.png?400 }}
-[[http://www.arrownac.com/solutions/bemicro-sdk]]+
  
-Complete specifications for the Nios II Embedded Development Suite (EDS) can be found at: +The **EVAL-ADN2850SDZ** evaluation board is a member of a growing number of boards available for the **SDP**.  Designed to help customers evaluate performance or quickly prototype new **ADN2850** circuits and reduce design time, the **EVAL-ADN2850SDZ** evaluation board can operate in single-supply and dual-supply mode and incorporates an internal power supply powered from the USB.
-[[http://www.altera.com/devices/processor/nios2]]+
  
-Complete specifications for the Micrium uC-Probe) can be found at: +The [[adi>ADN2850]] is a dual-channel, nonvolatile memory, digitally controlled resistors with 1024-step resolution, offering guaranteed maximum low resistor tolerance error of ±8%. The device performs the same electronic adjustment function as a mechanical rheostat with enhanced resolution, solid state reliability, and superior low temperature coefficient performance. The versatile programming of the ADN2850 via an SPI®-compatible serial interface allows 16 modes of operation and adjustment including scratchpad programming, memory storing and restoring, increment/decrement, ±6 dB/step log taper adjustment, wiper setting readback, and extra EEMEM for user-defined information such as memory data for other components, look-up table, or system identification information. 
-[[http://micrium.com/page/products/tools/probe]]+ 
 +===== More information ===== 
 +  * [[adi>ADN2850|ADN2850 Product Info]] - pricing, samples, datasheet 
 +  * [[adi>/static/imported-files/user_guides/UG-276.pdf|EVAL-ADN2850SDZ evaluation board user guide]] 
 +  * [[https://www.intel.com/content/www/us/en/programmable/b/bemicro-sdk.html|BeMicro SDK]] 
 +  * [[http://www.altera.com/devices/processor/nios2|Nios II Embedded Development Suite (EDS)]] 
 +  * [[http://micrium.com/tools/ucprobe/overview/|Micrium uC-Probe]]
  
 ====== Getting Started ====== ====== Getting Started ======
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 Below is presented the list of required hardware items: Below is presented the list of required hardware items:
-  * Arrow Electronics [[http://www.arrow.com/bemicrosdk/|BeMicro SDK]] FPGA-based MCU Evaluation Board +  * Arrow Electronics [[https://www.intel.com/content/www/us/en/programmable/b/bemicro-sdk.html|BeMicro SDK]] FPGA-based MCU Evaluation Board 
-  * [[http://www.arrownac.com/solutions/adi_interposer/|BeMicro SDK/SDP Interposer]] adapter board+  * [[adi>sdp-bemicro|BeMicro SDK/SDP Interposer]] adapter board
   * **EVAL-ADN2850SDZ** evaluation board   * **EVAL-ADN2850SDZ** evaluation board
   * Intel Pentium III or compatible Windows PC, running at 866MHz or faster, with a minimum of 512MB of system memory   * Intel Pentium III or compatible Windows PC, running at 866MHz or faster, with a minimum of 512MB of system memory
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   * [[http://www.altera.com/products/software/quartus-ii/web-edition/qts-we-index.html|Quartus II Web Edition]] design software v11.0   * [[http://www.altera.com/products/software/quartus-ii/web-edition/qts-we-index.html|Quartus II Web Edition]] design software v11.0
   * [[https://www.altera.com/download/software/nios-ii|Nios II EDS]] v11.0   * [[https://www.altera.com/download/software/nios-ii|Nios II EDS]] v11.0
-  * [[http://micrium.com/page/products/tools/probe|uC-Probe]] run-time monitoring tool +  * [[http://micrium.com/tools/ucprobe/trial/|uC-Probe]] run-time monitoring tool, version 2.5
-  * {{:resources:fpga:altera:bemicro:ad2850.zip|Lab Design Files}}+
  
 The **Quartus II** design software and the **Nios II EDS** is available via the Altera Complete Design Suite DVD or by downloading from the web.  The **Quartus II** design software and the **Nios II EDS** is available via the Altera Complete Design Suite DVD or by downloading from the web. 
  
-The **Micrium uC/Probe Trial** version is available via download from the web at [[http://micrium.com/download/Micrium-uC-Probe-Setup-Trial.exe]].  After installation add to the “Path” system variable the entry "//%QUARTUS_ROOTDIR%\bin\//“ on the third position in the list. +The **Micrium uC/Probe Trial** version 2.5 is available via download from the web at [[http://micrium.com/tools/ucprobe/trial/]].  After installation add to the “Path” system variable the entry "//%QUARTUS_ROOTDIR%\bin\//“ on the third position in the list.
  
 +===== Downloads =====
 +  * {{:resources:fpga:altera:bemicro:ad2850_evalboardlab.zip|Lab Design Files}}
 ===== Extract the Lab Files ===== ===== Extract the Lab Files =====
  
-Create a folder called “**//ADIEvalBoardsLab//**” on your PC and extract the **//ADIEvalBoardsDemo.zip//** archive to this folder. Make sure that there are **//NO SPACES//** in the directory path. After extracting the archive the following folders should be present in the **//ADIEvalBoardsLab//** folder: **//FPGA//**, **//Software//**, **//ucProbeInterface//**. An optional //**HDL**// folder can be also present to store the HDL code for the NIOS II peripherals needed to communicate with the evaluation board.+Create a folder called “**//ADIEvalBoardLab//**” on your PC and extract the **//ad2850_evalboardlab.zip//** archive to this folder. Make sure that there are **//NO SPACES//** in the directory path. After extracting the archive the following folders should be present in the **//ADIEvalBoardLab//** folder: **//FPGA//**, **//Software//**, **//ucProbeInterface//**, **//NiosCpu//**.
  
-{{ :resources:fpga:altera:bemicro:image005.png?500 }}+{{ :resources:fpga:altera:bemicro:labfolders.png?500 }}
  
 ====== ====== ====== ======
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 {{page>common_usb}} {{page>common_usb}}
  
 +====== Quick Evaluation ======
 {{page>common_quick_eval}} {{page>common_quick_eval}}
  
 +====== FPGA Design ======
 {{page>common_spi_i2c}} {{page>common_spi_i2c}}
  
 +====== NIOS II Software Design ======
 {{page>common}} {{page>common}}
  
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   * Click on the **//Options//** button to open the dialog box.   * Click on the **//Options//** button to open the dialog box.
  
-{{ :resources:fpga:altera:bemicro:image066.gif?300 }}+{{ :resources:fpga:altera:bemicro:ucprobeoptionsbtn.png?300 }}
  
 Set target board communication protocol as **//JTAG UART//** Set target board communication protocol as **//JTAG UART//**
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   * Type the value **//1//** in the the **//Device Id//** window.   * Type the value **//1//** in the the **//Device Id//** window.
  
-{{:resources:fpga:altera:bemicro:image070.jpg?400}}{{:resources:fpga:altera:bemicro:image071.png?400}}+{{ :resources:fpga:altera:bemicro:ucprobeoptionsjtag.png?400 }}
  
   * Select **//uCProbe_uart(0)//** from the **//Instance Id//** pulldown menu.   * Select **//uCProbe_uart(0)//** from the **//Instance Id//** pulldown menu.
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   * Click the **//Open//** option from the **uC-Probe** menu and select the file **//ADIEvalBoardLab/ucProbeInterface/ADN2850_Interface.wsp//**.   * Click the **//Open//** option from the **uC-Probe** menu and select the file **//ADIEvalBoardLab/ucProbeInterface/ADN2850_Interface.wsp//**.
  
-{{:resources:fpga:altera:bemicro:image077.png?400}}{{:resources:fpga:altera:bemicro:image076.jpg?400}}+{{:resources:fpga:altera:bemicro:ucprobeopenfile.png?400}} 
 +{{:resources:fpga:altera:bemicro:ad2850interfaceopen.png?400}}
  
-  * Before opening the interface **uC-Probe** will ask for a symbols file that must be associated with the interface. Select the file **//ADIEvalBoardsLab/FPGA/software/AdEvalBoardsDemo/ADIEvalBoards.elf//** to be loaded as a symbol file.+  * Before opening the interface **uC-Probe** will ask for a symbols file that must be associated with the interface. If the lab was done according to the steps provided in the **Quick Evaluation** section, select the file **//ADIEvalBoardLab/ucProbeInterface/ADIEvalBoard.elf//** to be loaded as a symbol file, otherwise select the file **//ADIEvalBoardLab/FPGA/software/ADIEvalBoard/ADIEvalBoard.elf//** to be loaded as a symbol file.
  
-{{ :resources:fpga:altera:bemicro:image080.jpg?400 }}+{{:resources:fpga:altera:bemicro:ucprobeopenelfquickeval.png?400}} 
 +{{:resources:fpga:altera:bemicro:ucprobeopenelfnormal.png?400}}
  
   * Run the demonstration project by pressing the **//Play//** button.   * Run the demonstration project by pressing the **//Play//** button.
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 {{ :resources:fpga:altera:bemicro:image083.jpg?700 }} {{ :resources:fpga:altera:bemicro:image083.jpg?700 }}
  
-**Section A** is used to activate the board and monitor activity. The communication with the board is activated / deactivated by toggling the **//ON/OFF//** switch. The **//Activity//** LED turns green when the communication is active. If the **//ON/OFF//** switch is set to **//ON//** and the **//Activity//** LED is **//BLACK//** it means that there is a communication problem with the board.+**Section A** is used to activate the board and monitor activity. The communication with the board is activated / deactivated by toggling the **//ON/OFF//** switch. The **//Activity//** LED turns green when the communication is active. If the **//ON/OFF//** switch is set to **//ON//** and the **//Activity//** LED is **//BLACK//** it means that there is a communication problem with the board. See the **Troubleshooting** section for indications on how to fix the communication problems. 
  
-**Section B** is used to send commands specific for the two RDAC channels available in the ADn2850. Toggling to On the switches under a specific RDAC will send the command only to that RDAC. The following commands can be sent to the two RDAC channels individually: +**Section B** is used to send commands specific for the two RDAC channels available in the ADn2850. Toggling to **//On//** the switches under a specific RDAC will send the command only to that RDAC. The following commands can be sent to the two RDAC channels individually: 
-  * +6dB - increments the RDAC value by 6dB +  * **//+6dB//** - increments the RDAC value by 6dB 
-  * -6dB - decrements the RDAC value by 6dB +  * **//-6dB//** - decrements the RDAC value by 6dB 
-  * +1 Step - increments the RDAC value by 1 +  * **//+1 Step//** - increments the RDAC value by 1 
-  * -1 Step - decrements the RDAC value by 1 +  * **//-1 Step//** - decrements the RDAC value by 1 
-  * Store – stores the value of the RDAC into the corresponding EEPROM +  * **//Store//** – stores the value of the RDAC into the corresponding EEPROM 
-  * Restore – restores into the RDAC the value from the corresponding EEPROM +  * **//Restore//** – restores into the RDAC the value from the corresponding EEPROM 
-  * Write – writes into the RDAC the value selected in Section D by the slider Value for RDAC write+  * **//Write//** – writes into the RDAC the value selected in Section D by the slider Value for RDAC write
 Below the individual command options there is a set of generic switches which are used to send commands to both RDACs simultaneously. The following commands can be sent simultaneously to both RDACs: Below the individual command options there is a set of generic switches which are used to send commands to both RDACs simultaneously. The following commands can be sent simultaneously to both RDACs:
-  * +1 Step - increments the RDACs values by 1 +  * **//+1 Step//** - increments the RDACs values by 1 
-  * -1 Step - decrements the RDACs values by 1 +  * **//-1 Step//** - decrements the RDACs values by 1 
-  * +6dB - increments the RDACs values by 6dB +  * **//+6dB//** - increments the RDACs values by 6dB 
-  * -6dB - decrements the RDACs values by 6dB +  * **//-6dB//** - decrements the RDACs values by 6dB 
-  * Reset  - resets the values stored in both RDACs to 0+  * **//Reset//** - resets the values stored in both RDACs to 0
  
 **Section C** is used to send generic commands to the ADn2850. The command list is available in table 8 from the ADn2850 datasheet, page 16 (AD5235 Rev. D). The request values will be updated based on the switch selections and displayed in the **//Request//** numeric boxes. The command is sent by toggling the **//Send Command//** switch to **//On//**. After the command a NOP will be sent on and the values from the SDO will be displayed in the **//Response//** numeric boxes.  **Section C** is used to send generic commands to the ADn2850. The command list is available in table 8 from the ADn2850 datasheet, page 16 (AD5235 Rev. D). The request values will be updated based on the switch selections and displayed in the **//Request//** numeric boxes. The command is sent by toggling the **//Send Command//** switch to **//On//**. After the command a NOP will be sent on and the values from the SDO will be displayed in the **//Response//** numeric boxes. 
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 +{{page>troubleshooting}}
resources/fpga/altera/bemicro/adn2850.1316155634.txt.gz · Last modified: 16 Sep 2011 08:47 by Andrei Cozma

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