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resources:fpga:altera:bemicro:ad9838 [16 Sep 2011 17:22] – add a few links, make things some bullets Robin Getz | resources:fpga:altera:bemicro:ad9838 [26 Jan 2021 01:22] (current) – update arrow links after their web site update Robin Getz |
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| ====== BeMicro FPGA Project for AD9838 with Nios driver ====== |
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| ===== Supported Devices ===== |
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| * [[adi>AD9838]] |
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| ===== Evaluation Boards ===== |
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| * [[adi>EVAL-AD9838SDZ ]] |
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====== Overview ====== | ====== Overview ====== |
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This lab presents the steps to setup an environment for using the **[[adi>EVAL-AD9838SDZ]]** evaluation board together with the **[[http://www.arrownac.com/solutions/bemicro-sdk/|BeMicro SDK]]** USB stick, the Nios II Embedded Development Suite (EDS) and the [[http://micrium.com/page/products/tools/probe|Micrium μC-Probe]] run-time monitoring tool. Below is presented a picture of the EVAL-AD9838SDZ Evaluation Board with the BeMicro SDK Platform. | This lab presents the steps to setup an environment for using the **[[adi>EVAL-AD9838SDZ]]** evaluation board together with the **[[https://www.intel.com/content/www/us/en/programmable/b/bemicro-sdk.html|BeMicro SDK]]** USB stick, the Nios II Embedded Development Suite (EDS) and the [[http://micrium.com/tools/ucprobe/overview/|Micrium μC-Probe]] run-time monitoring tool. Below is presented a picture of the EVAL-AD9838SDZ Evaluation Board with the BeMicro SDK Platform. |
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{{ :resources:fpga:altera:bemicro:ad9838_bemicro.png?400 }} | {{ :resources:fpga:altera:bemicro:ad9838_bemicro.png?400 }} |
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For component evaluation and performance purposes, as opposed to quick prototyping, the user is directed to Analog Devices [[/resources/eval/sdp|System Demonstration Platform]] (**SDP**). The **SDP** consists of a: | {{page>common_sdp}} |
* a controller board, like the **[[resources/eval/sdp/sdp-b|EVAL-SDP-CB1Z]] (SDP-B)** | |
* an compatible Analog Devices SDP [[adi>sdp#exallist|product evaluation board]] | |
* corresponding PC software | |
The EVAL-SDP-CB1Z controller board is part of Analog Devices SDP providing USB 2.0 high-speed connectivity to a PC computer running specific component evaluation software. Each SDP evaluation daughter board includes the necessary installation files needed for this performance testing. It's expected that the analog performance on the two platforms may differ. | |
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Below is presented a picture of **SDP-B** Controller Board with the **EVAL-AD9838SDZ** Evaluation Board. | Below is presented a picture of **SDP-B** Controller Board with the **EVAL-AD9838SDZ** Evaluation Board. |
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{{ :resources:fpga:altera:bemicro:ad9838_blackfin.png?400 }} | {{ :resources:fpga:altera:bemicro:ad9838_sdp1z.png?400 }} |
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The [[adi>AD9838]] is a 16 MHz low power DDS device capable of producing high performance sine and triangular outputs. It also has an on-board comparator that allows a square wave to be produced for clock generation. Consuming only 20 mW of power at 3 V makes the AD9838 an ideal candidate for power-sensitive applications. | The [[adi>AD9838]] is a 16 MHz low power DDS device capable of producing high performance sine and triangular outputs. It also has an on-board comparator that allows a square wave to be produced for clock generation. Consuming only 20 mW of power at 3 V makes the AD9838 an ideal candidate for power-sensitive applications. |
* [[adi>AD9838|AD9838 Product Info]] - pricing, samples, datasheet | * [[adi>AD9838|AD9838 Product Info]] - pricing, samples, datasheet |
* [[adi>/static/imported-files/user_guides/UG-268.pdf|EVAL-AD9838SDZ evaluation board user guide]] | * [[adi>/static/imported-files/user_guides/UG-268.pdf|EVAL-AD9838SDZ evaluation board user guide]] |
* [[http://www.arrownac.com/solutions/bemicro-sdk|BeMicro SDK]] | * [[https://www.intel.com/content/www/us/en/programmable/b/bemicro-sdk.html|BeMicro SDK]] |
* [[http://www.altera.com/devices/processor/nios2|Nios II Embedded Development Suite (EDS)]] | * [[http://www.altera.com/devices/processor/nios2|Nios II Embedded Development Suite (EDS)]] |
* [[http://micrium.com/page/products/tools/probe|Micrium uC-Probe]] | * [[http://micrium.com/tools/ucprobe/overview/|Micrium uC-Probe]] |
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====== Getting Started ====== | ====== Getting Started ====== |
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Below is presented the list of required hardware items: | Below is presented the list of required hardware items: |
* Arrow Electronics [[http://www.arrow.com/bemicrosdk/|BeMicro SDK]] FPGA-based MCU Evaluation Board | * Arrow Electronics [[https://www.intel.com/content/www/us/en/programmable/b/bemicro-sdk.html|BeMicro SDK]] FPGA-based MCU Evaluation Board |
* [[http://www.arrownac.com/solutions/adi_interposer/|BeMicro SDK/SDP Interposer]] adapter board | * [[adi>sdp-bemicro|BeMicro SDK/SDP Interposer]] adapter board |
* **EVAL-AD9838SDZ** evaluation board | * **EVAL-AD9838SDZ** evaluation board |
* Intel Pentium III or compatible Windows PC, running at 866MHz or faster, with a minimum of 512MB of system memory | * Intel Pentium III or compatible Windows PC, running at 866MHz or faster, with a minimum of 512MB of system memory |
* [[http://www.altera.com/products/software/quartus-ii/web-edition/qts-we-index.html|Quartus II Web Edition]] design software v11.0 | * [[http://www.altera.com/products/software/quartus-ii/web-edition/qts-we-index.html|Quartus II Web Edition]] design software v11.0 |
* [[https://www.altera.com/download/software/nios-ii|Nios II EDS]] v11.0 | * [[https://www.altera.com/download/software/nios-ii|Nios II EDS]] v11.0 |
* [[http://micrium.com/page/products/tools/probe|uC-Probe]] run-time monitoring tool | * [[http://micrium.com/tools/ucprobe/trial/|uC-Probe]] run-time monitoring tool, version 2.5 |
* {{:resources:fpga:altera:bemicro:adievalboardlab.zip|Lab Design Files}} | |
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The **Quartus II** design software and the **Nios II EDS** is available via the Altera Complete Design Suite DVD or by downloading from the web. | The **Quartus II** design software and the **Nios II EDS** is available via the Altera Complete Design Suite DVD or by downloading from the web. |
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The **Micrium uC/Probe Trial** version is available via download from the web at [[http://micrium.com/download/Micrium-uC-Probe-Setup-Trial.exe]]. After installation add to the “Path” system variable the entry "//%QUARTUS_ROOTDIR%\bin\//“ on the third position in the list. | The **Micrium uC/Probe Trial** version 2.5 is available via download from the web at [[http://micrium.com/tools/ucprobe/trial/]]. After installation add to the “Path” system variable the entry "//%QUARTUS_ROOTDIR%\bin\//“ on the third position in the list. |
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| ===== Downloads ===== |
| * {{:resources:fpga:altera:bemicro:ad9838_evalboardlab.zip|Lab Design Files}} |
===== Extract the Lab Files ===== | ===== Extract the Lab Files ===== |
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Create a folder called “**//ADIEvalBoardLab//**” on your PC and extract the **//ADIEvalBoardLab.zip//** archive to this folder. Make sure that there are **//NO SPACES//** in the directory path. After extracting the archive the following folders should be present in the **//ADIEvalBoardLab//** folder: **//FPGA//**, **//Software//**, **//ucProbeInterface//**, **//NiosCpu//**. | Create a folder called “**//ADIEvalBoardLab//**” on your PC and extract the **//ad9838_evalboardlab.zip//** archive to this folder. Make sure that there are **//NO SPACES//** in the directory path. After extracting the archive the following folders should be present in the **//ADIEvalBoardLab//** folder: **//FPGA//**, **//Software//**, **//ucProbeInterface//**, **//NiosCpu//**. |
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{{ :resources:fpga:altera:bemicro:labfolders.png?500 }} | {{ :resources:fpga:altera:bemicro:labfolders.png?500 }} |
{{page>common_usb}} | {{page>common_usb}} |
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| ====== Quick Evaluation ====== |
{{page>common_quick_eval}} | {{page>common_quick_eval}} |
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| ====== FPGA Design ====== |
{{page>common_spi_i2c}} | {{page>common_spi_i2c}} |
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| ====== NIOS II Software Design ====== |
{{page>common}} | {{page>common}} |
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* Click the **//Open//** option from the **uC-Probe** menu and select the file **//ADIEvalBoardLab/ucProbeInterface/AD9838_Interface.wsp//**. | * Click the **//Open//** option from the **uC-Probe** menu and select the file **//ADIEvalBoardLab/ucProbeInterface/AD9838_Interface.wsp//**. |
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{{:resources:fpga:altera:bemicro:image077.png?400}}{{:resources:fpga:altera:bemicro:image076.jpg?400}} | {{:resources:fpga:altera:bemicro:image077.png?400}}{{:resources:fpga:altera:bemicro:ad9838interfaceopen.png?400}} |
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* Before opening the interface **uC-Probe** will ask for a symbols file that must be associated with the interface. If the lab was done according to the steps provided in the **Quick Evaluation** section, select the file **//ADIEvalBoardLab/ucProbeInterface/ADIEvalBoard.elf//** to be loaded as a symbol file, otherwise select the file **//ADIEvalBoardLab/FPGA/software/ADIEvalBoard/ADIEvalBoard.elf//** to be loaded as a symbol file. | * Before opening the interface **uC-Probe** will ask for a symbols file that must be associated with the interface. If the lab was done according to the steps provided in the **Quick Evaluation** section, select the file **//ADIEvalBoardLab/ucProbeInterface/ADIEvalBoard.elf//** to be loaded as a symbol file, otherwise select the file **//ADIEvalBoardLab/FPGA/software/ADIEvalBoard/ADIEvalBoard.elf//** to be loaded as a symbol file. |
{{ :resources:fpga:altera:bemicro:ad9838_interface.png?700 }} | {{ :resources:fpga:altera:bemicro:ad9838_interface.png?700 }} |
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**Section A** is used to activate the board and monitor activity. The communication with the board is activated / deactivated by toggling the **//ON/OFF//** switch. The **//Activity//** LED turns green when the communication is active. If the **//ON/OFF//** switch is set to **//ON//** and the **//Activity//** LED is **//BLACK//** it means that there is a communication problem with the board. | **Section A** is used to activate the board and monitor activity. The communication with the board is activated / deactivated by toggling the **//ON/OFF//** switch. The **//Activity//** LED turns green when the communication is active. If the **//ON/OFF//** switch is set to **//ON//** and the **//Activity//** LED is **//BLACK//** it means that there is a communication problem with the board. See the **Troubleshooting** section for indications on how to fix the communication problems. |
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**Section B** is used to set or clear the bits and pins which affect the signal from the IOUT output. | **Section B** is used to set or clear the bits and pins which affect the signal from the IOUT output. |
Delay: Value of the delay between each frequency increment. | Delay: Value of the delay between each frequency increment. |
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| {{page>troubleshooting}} |