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resources:fpga:altera:bemicro:ad7091r [08 Aug 2012 11:36] – Approved Andrei Cozma | resources:fpga:altera:bemicro:ad7091r [26 Jan 2021 01:21] (current) – update arrow links after their web site update Robin Getz | ||
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===== Evaluation Boards ===== | ===== Evaluation Boards ===== | ||
- | * [[adi> | + | * [[adi> |
====== Overview ====== | ====== Overview ====== | ||
- | This lab presents the steps to setup an environment for using the **[[adi> | + | This lab presents the steps to setup an environment for using the **[[adi> |
{{ : | {{ : | ||
- | For component evaluation and performance purposes, as opposed to quick prototyping, | + | {{page>common_sdp}} |
- | * a controller board, like the **[[resources/ | + | |
- | * an compatible Analog Devices SDP [[adi>sdp# | + | |
- | * corresponding PC software | + | |
- | The EVAL-SDP-CB1Z controller board is part of Analog Devices SDP providing USB 2.0 high-speed connectivity to a PC computer running specific component evaluation software. | + | |
Below is presented a picture of **SDP-B** Controller Board with the **EVAL-AD7091RSDZ** Evaluation Board. | Below is presented a picture of **SDP-B** Controller Board with the **EVAL-AD7091RSDZ** Evaluation Board. | ||
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{{ : | {{ : | ||
- | The **EVAL-AD7091SDZ** evaluation board is a member of a growing number of boards available for the **SDP**. | + | The **EVAL-AD7091SDZ** evaluation board is a member of a growing number of boards available for the **SDP**. |
The [[adi> | The [[adi> | ||
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===== More information ===== | ===== More information ===== | ||
* [[adi> | * [[adi> | ||
- | * [[http:// | + | * **EVAL-AD7091RSDZ** evaluation board user guide (Available on CD) |
- | * [[http://www.arrownac.com/solutions/ | + | * [[https://www.intel.com/content/ |
* [[http:// | * [[http:// | ||
- | * [[http:// | ||
====== Getting Started ====== | ====== Getting Started ====== | ||
The first objective is to ensure that you have all of the items needed and to install the software tools so that you are ready to create and run the evaluation project. | The first objective is to ensure that you have all of the items needed and to install the software tools so that you are ready to create and run the evaluation project. | ||
- | |||
===== Hardware Items ===== | ===== Hardware Items ===== | ||
Below is presented the list of required hardware items: | Below is presented the list of required hardware items: | ||
- | * Arrow Electronics [[http://www.arrow.com/bemicrosdk/|BeMicro SDK]] FPGA-based MCU Evaluation Board | + | * Arrow Electronics [[https://www.intel.com/content/www/ |
- | * [[http:// | + | * [[adi> |
* **EVAL-AD7091RSDZ** evaluation board | * **EVAL-AD7091RSDZ** evaluation board | ||
* Intel Pentium III or compatible Windows PC, running at 866MHz or faster, with a minimum of 512MB of system memory | * Intel Pentium III or compatible Windows PC, running at 866MHz or faster, with a minimum of 512MB of system memory | ||
- | |||
===== Software Tools ===== | ===== Software Tools ===== | ||
Below is presented the list of required software tools: | Below is presented the list of required software tools: | ||
- | * [[http:// | + | * [[http:// |
- | * [[https:// | + | * [[https:// |
- | * [[http:// | + | |
- | + | ||
- | The **Quartus II** design software and the **Nios II EDS** is available via the Altera Complete Design Suite DVD or by downloading from the web. | + | |
- | The **Micrium uC/Probe Trial** version | + | The **Quartus II** design software and the **Nios II EDS** is available via the Altera Complete Design Suite DVD or by downloading |
===== Downloads ===== | ===== Downloads ===== | ||
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===== Extract the Lab Files ===== | ===== Extract the Lab Files ===== | ||
- | Create a folder called “**// | + | Create a folder called “**// |
^ **Folder** ^ **Description** ^ | ^ **Folder** ^ **Description** ^ | ||
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| Hdl | Contains the source files for the AD7091R HDL driver: \\ - The //doc// subfolder contains a brief documentation for the driver. \\ - The //src// subfolder contains the HDL source files. | | Hdl | Contains the source files for the AD7091R HDL driver: \\ - The //doc// subfolder contains a brief documentation for the driver. \\ - The //src// subfolder contains the HDL source files. | ||
| NiosCpu | Contains the Quartus evaluation project source files . The //ip// subfolder contains the AD7091R Nios2 peripheral source code. | | | NiosCpu | Contains the Quartus evaluation project source files . The //ip// subfolder contains the AD7091R Nios2 peripheral source code. | | ||
- | | Software | Contains the source files of the uCProbe library and the main file of the Nios2 SBT evaluation project.| | + | | Software | Contains the source files of the Nios2 SBT evaluation project.| |
- | | uCProbeInterface | + | | DataCapture |
- | ====== ====== | + | ====== |
{{page> | {{page> | ||
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^ Name ^ Address | ^ Name ^ Address | ||
| CPU | 0x00000800 | | CPU | 0x00000800 | ||
- | | Main PLL | 0x00000080 | + | | Main PLL | 0x00000080 |
- | | JTAG UART | 0x00000090 | + | | JTAG UART | 0x00000090 |
- | | uC-Probe UART | 0x000000A0 | + | | uC-Probe UART | 0x000000A0 |
- | | EPCS FLASH CONTROLLER | + | | EPCS FLASH CONTROLLER |
- | | OnChip RAM | 0x00010000 | + | | OnChip RAM | 0x00010000 |
- | | LED GPIO | 0x00000100 | + | | LED GPIO | 0x00000100 |
- | | GPIO | 0x00002080 | + | | GPIO | 0x00002080 |
- | | CTRL GPIO | 0x000020A0 | + | | CTRL GPIO | 0x000020A0 |
- | | SYS ID | 0x00000040 | + | | SYS ID | 0x00000040 |
- | | TIMER | 0x00000060 | + | | TIMER | 0x00000060 |
- | | AVALON MASTER | + | | AVALON MASTER |
| AD7091R PERIPHERAL | | AD7091R PERIPHERAL | ||
| **Table 1 System components** | | **Table 1 System components** | ||
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| BASE_REGISTER | | BASE_REGISTER | ||
| STATUS_REGISTER | | STATUS_REGISTER | ||
- | | DUT_WR_REGISTER | ||
| **Table 4 Avalon Peripheral registers description** | | **Table 4 Avalon Peripheral registers description** | ||
- | |||
====== Quick Evaluation ====== | ====== Quick Evaluation ====== | ||
- | {{page>common_quick_eval}} | + | {{page>common_quick_evaluation}} |
====== NIOS II Software Design ====== | ====== NIOS II Software Design ====== | ||
- | {{page>common}} | + | {{page>common_software_design}} |
- | + | ||
- | ====== uC-Probe Interface ====== | + | |
- | + | ||
- | A notable challenge in embedded systems development is to overcome the lack of feedback that such systems typically provide. Many developers resort to blinking LEDs or instrumenting their code with // | + | |
- | This section presents the steps required to install the **Micrium uC-Probe** software tool and to run the demonstration project for the ADI evaluation board. A description of the **uC-Probe** demonstration interface is provided. | + | |
- | + | ||
- | ===== Configure uC-Probe ===== | + | |
- | + | ||
- | Launch **uC-Probe** from the **//Start -> All Programs -> Micrium -> uC-Probe// | + | |
- | + | ||
- | Select **uC-Probe** options. | + | |
- | * Click on the **uC-Probe** icon on the top left portion of the screen. | + | |
- | * Click on the **// | + | |
- | + | ||
- | {{ : | + | |
- | + | ||
- | Set target board communication protocol as **//JTAG UART//** | + | |
- | * Click on the **// | + | |
- | * Select the **//JTAG UART//** option. | + | |
- | + | ||
- | {{ : | + | |
- | + | ||
- | Setup **//JTAG UART//** communication settings | + | |
- | * Select the **// | + | |
- | * Press the **//Open File//** button to select the JTAG Debug Information file (**// | + | |
- | * Navigate to the **// | + | |
- | * Type the value **//1//** in the the **//Device Id//** window. | + | |
- | + | ||
- | {{ : | + | |
- | + | ||
- | * Select **// | + | |
- | + | ||
- | {{ : | + | |
- | + | ||
- | * Press **// | + | |
- | + | ||
- | ===== Load and Run the Demonstration Project ===== | + | |
- | + | ||
- | * Click the **// | + | |
- | + | ||
- | {{: | + | |
- | {{: | + | |
- | + | ||
- | * Before opening the interface **uC-Probe** will ask for a symbols file that must be associated with the interface. If the lab was done according to the steps provided in the **Quick Evaluation** section, select the file **// | + | |
- | + | ||
- | {{: | + | |
- | + | ||
- | * Run the demonstration project by pressing the **// | + | |
- | + | ||
- | {{ : | + | |
- | + | ||
- | * Run the // | + | |
====== Demonstration Project User Interface ====== | ====== Demonstration Project User Interface ====== | ||
- | The following figure presents the **uC-Probe** interface that can be used for monitoring and controlling the operation of the **EVAL-AD7091RSDZ** evaluation board. | + | In order to capture data from the ADC the following steps must be performed: |
- | + | | |
- | {{ : | + | * The data captured from the ADC is saved into a comma separated values (.csv) file named **// |
- | + | ||
- | In order to capture data from the ADC using the uCProbe demonstration project | + | |
- | | + | |
- | * The data stored in the BeMicro SDK memory is transfered to the PC. The **// | + | |
- | * After the data is transferred to the PC it is converted to 16 bit values. The **// | + | |
- | * The data captured from the ADC is saved into a comma separated values (.csv) file named **// | + | |
* The data capture status is also displayed in the opened command window as shown in the figure below. | * The data capture status is also displayed in the opened command window as shown in the figure below. | ||
{{ : | {{ : | ||
- | * A new acquisition can be started by reactivating | + | * A new acquisition can be started by executing |
- | | + | |
// | // | ||
- | {{page>troubleshooting}} | + | ====== Troubleshooting ====== |
+ | |||
+ | {{page>troubleshooting12}} | ||
+ | |||
+ | ====== More information ====== | ||
+ | * [[ez> | ||
+ | * Example questions: {{rss> |