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| resources:fpga:altera:bemicro:ad5421 [21 Sep 2011 13:21] – Added zip file. Dragos Bogdan | resources:fpga:altera:bemicro:ad5421 [26 Jan 2021 01:20] (current) – update arrow links after their web site update Robin Getz |
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| ====== AD5421 16 Bit, Serial Input, Loop-Powered, 4 mA to 20 mA DAC ====== | ====== BeMicro FPGA Project for AD5421 with Nios driver ====== |
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| | ===== Supported Devices ===== |
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| | * [[adi>AD5421]] |
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| | ===== Evaluation Boards ===== |
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| | * [[adi>EVAL-AD5421SDZ]] |
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| ====== Overview ====== | ====== Overview ====== |
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| This lab presents the steps to setup an environment for using the **[[adi>EVAL-AD5421SDZ]]** evaluation board together with the **[[http://www.arrownac.com/solutions/bemicro-sdk/|BeMicro SDK]]** USB stick, the Nios II Embedded Development Suite (EDS) and the [[http://micrium.com/page/products/tools/probe|Micrium μC-Probe]] run-time monitoring tool. Below is presented a picture of the EVAL-AD5421SDZ Evaluation Board with the BeMicro SDK Platform. | This lab presents the steps to setup an environment for using the **[[adi>EVAL-AD5421SDZ]]** evaluation board together with the **[[https://www.intel.com/content/www/us/en/programmable/b/bemicro-sdk.html|BeMicro SDK]]** USB stick, the Nios II Embedded Development Suite (EDS) and the [[http://micrium.com/tools/ucprobe/overview/|Micrium μC-Probe]] run-time monitoring tool. Below is presented a picture of the EVAL-AD5421SDZ Evaluation Board with the BeMicro SDK Platform. |
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| {{ :resources:fpga:altera:bemicro:ad5421_-_bemicro.png?400 }} | {{ :resources:fpga:altera:bemicro:ad5421_-_bemicro.png?400 }} |
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| For component evaluation and performance purposes, as opposed to quick prototyping, the user is directed to Analog Devices [[/resources/eval/sdp|System Demonstration Platform]] (**SDP**). The **SDP** consists of a: | {{page>common_sdp}} |
| * a controller board, like the **[[resources/eval/sdp/sdp-b|EVAL-SDP-CB1Z]] (SDP-B)** | |
| * an compatible Analog Devices SDP [[adi>sdp#exallist|product evaluation board]] | |
| * corresponding PC software | |
| The EVAL-SDP-CB1Z controller board is part of Analog Devices SDP providing USB 2.0 high-speed connectivity to a PC computer running specific component evaluation software. Each SDP evaluation daughter board includes the necessary installation files needed for this performance testing. It's expected that the analog performance on the two platforms may differ. | |
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| Below is presented a picture of **SDP-B** Controller Board with the **EVAL-AD5421SDZ** Evaluation Board. | Below is presented a picture of **SDP-B** Controller Board with the **EVAL-AD5421SDZ** Evaluation Board. |
| * [[adi>AD5421|AD5421 Product Info]] - pricing, samples, datasheet | * [[adi>AD5421|AD5421 Product Info]] - pricing, samples, datasheet |
| * [[adi>/static/imported-files/user_guides/UG-250.pdf|EVAL-AD5421SDZ evaluation board user guide]] | * [[adi>/static/imported-files/user_guides/UG-250.pdf|EVAL-AD5421SDZ evaluation board user guide]] |
| * [[http://www.arrownac.com/solutions/bemicro-sdk|BeMicro SDK]] | * [[https://www.intel.com/content/www/us/en/programmable/b/bemicro-sdk.html|BeMicro SDK]] |
| * [[http://www.altera.com/devices/processor/nios2|Nios II Embedded Development Suite (EDS)]] | * [[http://www.altera.com/devices/processor/nios2|Nios II Embedded Development Suite (EDS)]] |
| * [[http://micrium.com/page/products/tools/probe|Micrium uC-Probe]] | * [[http://micrium.com/tools/ucprobe/overview/|Micrium uC-Probe]] |
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| ====== Getting Started ====== | ====== Getting Started ====== |
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| A list of required hardware items is presented below: | A list of required hardware items is presented below: |
| * Arrow Electronics [[http://www.arrow.com/bemicrosdk/|BeMicro SDK]] FPGA-based MCU Evaluation Board | * Arrow Electronics [[https://www.intel.com/content/www/us/en/programmable/b/bemicro-sdk.html|BeMicro SDK]] FPGA-based MCU Evaluation Board |
| * [[http://www.arrownac.com/solutions/adi_interposer/|BeMicro SDK/SDP Interposer]] adapter board | * [[adi>sdp-bemicro|BeMicro SDK/SDP Interposer]] adapter board |
| * **EVAL-AD5421SDZ** evaluation board | * **EVAL-AD5421SDZ** evaluation board |
| * Intel Pentium III or compatible Windows PC, running at 866MHz or faster, with a minimum of 512MB of system memory | * Intel Pentium III or compatible Windows PC, running at 866MHz or faster, with a minimum of 512MB of system memory |
| * [[http://www.altera.com/products/software/quartus-ii/web-edition/qts-we-index.html|Quartus II Web Edition]] design software v11.0 | * [[http://www.altera.com/products/software/quartus-ii/web-edition/qts-we-index.html|Quartus II Web Edition]] design software v11.0 |
| * [[https://www.altera.com/download/software/nios-ii|Nios II EDS]] v11.0 | * [[https://www.altera.com/download/software/nios-ii|Nios II EDS]] v11.0 |
| * [[http://micrium.com/page/products/tools/probe|uC-Probe]] run-time monitoring tool | * [[http://micrium.com/tools/ucprobe/trial/|uC-Probe]] run-time monitoring tool, version 2.5 |
| * {{:resources:fpga:altera:bemicro:ad5421_evalboardlab.zip|Lab Design Files}} | |
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| The **Quartus II** design software and the **Nios II EDS** is available via the Altera Complete Design Suite DVD or by downloading from the web. | The **Quartus II** design software and the **Nios II EDS** is available via the Altera Complete Design Suite DVD or by downloading from the web. |
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| The **Micrium uC/Probe Trial** version is available via download from the web at [[http://micrium.com/download/Micrium-uC-Probe-Setup-Trial.exe]]. After installation add to the “Path” system variable the entry "//%QUARTUS_ROOTDIR%\bin\//“ on the third position in the list. | The **Micrium uC/Probe Trial** version 2.5 is available via download from the web at [[http://micrium.com/tools/ucprobe/trial/]]. After installation add to the “Path” system variable the entry "//%QUARTUS_ROOTDIR%\bin\//“ on the third position in the list. |
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| | ===== Downloads ===== |
| | * {{:resources:fpga:altera:bemicro:ad5421_evalboardlab.zip|Lab Design Files}} |
| ===== Extract the Lab Files ===== | ===== Extract the Lab Files ===== |
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| Create a folder called “**//ADIEvalBoardLab//**” on your PC and extract the **//ADIEvalBoardLab.zip//** archive to this folder. Make sure that there are **//NO SPACES//** in the directory path. After extracting the archive the following folders should be present in the **//ADIEvalBoardLab//** folder: **//FPGA//**, **//Software//**, **//ucProbeInterface//**, **//NiosCpu//**. | Create a folder called “**//ADIEvalBoardLab//**” on your PC and extract the **//ad5421_evalboardlab.zip//** archive to this folder. Make sure that there are **//NO SPACES//** in the directory path. After extracting the archive the following folders should be present in the **//ADIEvalBoardLab//** folder: **//FPGA//**, **//Software//**, **//ucProbeInterface//**, **//NiosCpu//**. |
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| {{ :resources:fpga:altera:bemicro:labfolders.png?500 }} | {{ :resources:fpga:altera:bemicro:labfolders.png?500 }} |
| {{page>common_usb}} | {{page>common_usb}} |
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| | ====== Quick Evaluation ====== |
| {{page>common_quick_eval}} | {{page>common_quick_eval}} |
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| | ====== FPGA Design ====== |
| {{page>common_spi_i2c}} | {{page>common_spi_i2c}} |
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| | ====== NIOS II Software Design ====== |
| {{page>common}} | {{page>common}} |
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| {{page>troubleshooting}} | {{page>troubleshooting}} |
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