This shows you the differences between two versions of the page.
Previous revisionNext revision | |||
— | resources:eval:adp5050-adp50525-channel-pmu [13 Sep 2013 22:14] – [FEATURES] Patricia Cizewski | ||
---|---|---|---|
Line 1: | Line 1: | ||
+ | |||
+ | ====== Evaluation Board for the ADP5050/ | ||
+ | |||
+ | |||
+ | ===== FEATURES===== | ||
+ | **Wide input voltage range: 4.5 V to 15 V\\ | ||
+ | |||
+ | Full featured evaluation board for the [[adi> | ||
+ | <wrap indent> | ||
+ | <wrap indent> | ||
+ | <wrap indent> | ||
+ | <wrap indent> | ||
+ | <wrap indent> | ||
+ | <wrap indent> | ||
+ | Standalone operation capability\\ | ||
+ | USB dongle and GUI software support [[adi> | ||
+ | Cascading options for four buck regulators and LDO\\ | ||
+ | Dedicated enable option for each channel\\ | ||
+ | Mode option to select PSM or FPWM operation\\ | ||
+ | Programmable switching frequency from 250 kHz to 1.4 MHz\\ | ||
+ | Frequency synchronization input or output\\ | ||
+ | Simple device measurements and demonstrable with\\ | ||
+ | <wrap indent> | ||
+ | <wrap indent> | ||
+ | <wrap indent> | ||
+ | <wrap indent> | ||
+ | ** | ||
+ | |||
+ | ===== HARDWARE REQUIREMENT===== | ||
+ | **USB-to-I< | ||
+ | |||
+ | ===== SOFTWARE REQUIREMENT===== | ||
+ | **ADP505x DEMO GUI software | ||
+ | ** | ||
+ | |||
+ | ===== GENERAL DESCRIPTION===== | ||
+ | This user guide describes the hardware and software for the evaluation of the [[adi> | ||
+ | |||
+ | The [[adi> | ||
+ | |||
+ | The [[adi> | ||
+ | |||
+ | Full details on the devices are provided in the [[adi> | ||
+ | |||
+ | =====ADP5050/ | ||
+ | {{ : | ||
+ | <WRAP centeralign>// | ||
+ | |||
+ | |||
+ | ===== INSTALLING THE SOFTWARE (ADP5050 ONLY)===== | ||
+ | |||
+ | Note that the ADP5050 evaluation board can be powered up in standalone operation without the GUI software. Using the GUI software to access the advanced functionality of the ADP5050 product is optional. | ||
+ | Before starting the software installation, | ||
+ | |||
+ | ==== INSTALLING LABVIEW ==== | ||
+ | Note that if the PC has LabVIEW™ already installed, this following step is not needed.\\ | ||
+ | The application software is a compiled LabVIEW program, which requires LabVIEW 8.5 or later and a run-time engine installed on the PC. You can download the LabVIEW run-time engine on the National Instrument website. A LabVIEW 8.5 run-time installation is available on the ADP5050 installation CD.\\ | ||
+ | |||
+ | ==== INSTALLING THE ADP5050 GUI SOFTWARE ==== | ||
+ | After installation, | ||
+ | |||
+ | 1. Launch the **Setup.exe file**. When the dialog box shown in [[http:// | ||
+ | {{ : | ||
+ | <WRAP centeralign>// | ||
+ | |||
+ | 2. Click **Next** to install the files to the default destination folder or click **Browse…** to choose a different file (see Figure 3).\\ | ||
+ | |||
+ | {{ : | ||
+ | <WRAP centeralign>// | ||
+ | |||
+ | 3. Click **Next** to install the program (see Figure 4).\\ | ||
+ | |||
+ | {{ : | ||
+ | <WRAP centeralign>// | ||
+ | |||
+ | 4. Click **Finish** to complete the installation (see Figure 5).\\ | ||
+ | |||
+ | |||
+ | {{ : | ||
+ | <WRAP centeralign>// | ||
+ | ===== INSTALLING THE ANALOG DEVICES SDP DRIVERS (ADP5050 ONLY) ===== | ||
+ | |||
+ | |||
+ | To install the Analog Devices SDP Drivers, complete the following steps:\\ | ||
+ | |||
+ | 1. After installing ADP505x Demo GUI software properly, the installation of the Analog Devices SDP drivers begins.\\ | ||
+ | |||
+ | 2. Click **Next** to install the drivers (see Figure 6).\\ | ||
+ | |||
+ | {{ : | ||
+ | <WRAP centeralign>// | ||
+ | |||
+ | 3. Click **Install** after verifying the program folder. Ensure that the system environment has enough space (see Figure 7).\\ | ||
+ | |||
+ | {{ : | ||
+ | <WRAP centeralign>// | ||
+ | |||
+ | |||
+ | 4. Click **Finish** to complete the driver installation (see Figure 8).\\ | ||
+ | |||
+ | {{ : | ||
+ | <WRAP centeralign>// | ||
+ | |||
+ | 5. To verify that the USB driver is installed properly, click **Start**. Then select **Control Panel** > **System** and open the **Device Manager** (see Figure 9).\\ | ||
+ | |||
+ | {{ : | ||
+ | <WRAP centeralign>// | ||
+ | |||
+ | When the USB dongle is connected to a PC port different from the one used to install the driver, the PC device driver may ask you to install the driver again for that specific port. If this happens, repeat the first four steps listed in this section.\\ | ||
+ | |||
+ | ===== USING THE EVALUATION BOARD===== | ||
+ | |||
+ | ==== POWERING UP THE EVALUATION BOARD==== | ||
+ | The [[adi> | ||
+ | |||
+ | === Enable Jumpers=== | ||
+ | Each channel has its own enable pin, which must be pulled high to enable that channel (see Table 1). To disable the channel, pull the enable pin low or leave it floating.\\ | ||
+ | |||
+ | The enable control for each regulator has a 0.8 V precision enable threshold, which allows the [[adi> | ||
+ | |||
+ | When the external hardware enable pin is high, the CHx_ON enable register setting in the [[adi> | ||
+ | |||
+ | **Table 1. Channels of the Enable Pins**\\ | ||
+ | |||
+ | ^Channel ^Pin ^Enable Jumpers | ||
+ | |CH1: Buck |EN1 |J-EN1 |0.8 V precision enable| | ||
+ | |CH2: Buck |EN2 |J-EN2 |0.8 V precision enable| | ||
+ | |CH3: Buck |EN3 |J-EN3 |0.8 V precision enable| | ||
+ | |CH4: Buck |EN4 |J-EN4 |0.8 V precision enable| | ||
+ | |CH5: LDO |EN5 |J-EN5 |0.8 V precision enable| | ||
+ | |||
+ | === Power Input Jumpers=== | ||
+ | Each channel has its own power input jumper, which enables support for either a separate input voltage or cascaded options for all channels.\\ | ||
+ | |||
+ | The power input for the buck regulators is 4.5 V to 15 V. Shunt S1, S2, and S3 to allow for easy setup by using all of the same input voltages for the buck regulators.\\ | ||
+ | |||
+ | The power input for LDO PVIN5 is V< | ||
+ | |||
+ | The power supply for the VDDIO pin in the I< | ||
+ | |||
+ | **Table 2. Channels of Power Input Pins**\\ | ||
+ | |||
+ | ^Channel | ||
+ | |CH1: Buck |PVIN1 |J11 |4.5 V to 15 V| | ||
+ | |CH2: Buck |PVIN2 |S1 |4.5 V to 15 V| | ||
+ | |CH3: Buck |PVIN3 |S2 |4.5 V to 15 V| | ||
+ | |CH4: Buck |PVIN4 |S3 |4.5 V to 15 V| | ||
+ | |CH5: LDO |PVIN5 |LK8 |1.7 V to 5.5 V| | ||
+ | |VDDIO |VDDIO |LK7 |1.7 V to 3.6 V| | ||
+ | |||
+ | |||
+ | === Jumper J-SYNC (SYNC/ | ||
+ | The Jumper J-SYNC, as shown in Figure 1, connects the SYNC/MODE pin of the device to either low or high. | ||
+ | Shunt the center contact of the J-SYNC jumper (SYNC/MODE) to the left pin header to pull the SYNC/MODE pin high to VREG (5 V) to allow the buck regulators into forced PWM operation. In this setting, use the PSMx_ON register setting in the [[adi> | ||
+ | |||
+ | Shunt the center contact of the J-SYNC jumper to the right pin header to pull the MODE pin low, which forces the buck regulators to operate in automatic PWM/PSM operation. The PSMx_ON setting in the [[adi> | ||
+ | |||
+ | === Input Power Source=== | ||
+ | Before connecting the power source to the [[adi> | ||
+ | |||
+ | If the power source does not include a current meter, connect a current meter in series with the input source voltage. Connect the positive terminal of the power source to the positive lead (+) of the current meter, connect the negative terminal of the power source to the GND terminal (J12) on the evaluation board, and the connect the negative lead (−) of the current meter to the PVIN1_4 terminal (J11) on the board.\\ | ||
+ | |||
+ | === Output Load=== | ||
+ | Ensure that the board is turned off before connecting the load.\\ | ||
+ | |||
+ | Connect an electronic load or resistor to set the load current. If the load includes an ammeter, or if the current is not measured, connect the load directly to the evaluation board, with the positive (+) load connected to one of the channels. For example, connect Buck 1, J16 (VOUT1), and the negative (−) load connection to J15 (GND).\\ | ||
+ | |||
+ | If an ammeter is used, connect it in series with the load. Connect the positive (+) ammeter terminal to the evaluation board for Buck 1, J16 (VOUT1), connect the negative (−) ammeter terminal to the positive (+) load terminal, and connect the negative (−) load terminal to the evaluation board at J15 (GND).\\ | ||
+ | |||
+ | === Input and Output Voltmeters=== | ||
+ | Measure the input and output voltages with voltmeters. Ensure that the voltmeters are connected to the appropriate evaluation board terminals and not to the load or power sources themselves.\\ | ||
+ | |||
+ | If the voltmeters are not connected directly to the evaluation board, the measured voltages are incorrect due to the voltage drop across the leads and/or connections between the evaluation board, the power source, and/or the load.\\ | ||
+ | |||
+ | Connect the input voltage measuring voltmeter positive terminal (+) to the evaluation board at J11 (PVIN1_4) and connect the input voltage measuring voltmeter negative (−) terminal to the evaluation board at J12(GND). | ||
+ | Connect the output voltage measuring voltmeter positive (+) terminal to the evaluation board at J16 (VOUT1) for measuring the output voltage of Buck 1, and connect the output voltage measuring voltmeter negative (−) terminal to the evaluation board at J15 (GND).\\ | ||
+ | |||
+ | === Quick Start=== | ||
+ | Ensure that the software and USB driver are installed as described in the Installing the Software section. | ||
+ | Ensure that\\ | ||
+ | *The power source voltage for the buck regulators (PVIN1, PVIN2, PVIN3, PVIN4) is 4.5 V to 15 V. Shunt the S1, S2, and S3 jumpers to use all of the same input voltages for the buck regulators. | ||
+ | *The power source voltage for the LDO (PVIN5) is from V< | ||
+ | *(Optional for I< | ||
+ | *Use the J-EN1, J-EN2, J-EN3, J-EN4, and J-EN5 jumpers to enable or disable the desirable channel.\\ | ||
+ | |||
+ | Figure 10 shows the [[adi> | ||
+ | |||
+ | {{ : | ||
+ | <WRAP centeralign>// | ||
+ | |||
+ | When the power source and load are connected to the evaluation board, the board can be powered for operation. If the load is not enabled, enable the load. Verify that it is drawing the proper current and that the output voltage maintains voltage regulation. After the power-up, the following output voltage can be measured:\\ | ||
+ | *V< | ||
+ | *V< | ||
+ | *V< | ||
+ | *V< | ||
+ | *V< | ||
+ | *V< | ||
+ | |||
+ | |||
+ | |||
+ | |||
+ | ===== ADP5050 GUI SOFTWARE===== | ||
+ | |||
+ | To run the [[adi> | ||
+ | *Choose the correct device I< | ||
+ | *All registers are initialized to default values | ||
+ | *Check the I< | ||
+ | |||
+ | {{ : | ||
+ | <WRAP centeralign>// | ||
+ | |||
+ | ===== MEASURING EVALUATION BOARD PERFORMANCE===== | ||
+ | |||
+ | ==== Measuring Output Voltage Ripple of the Buck Regulator==== | ||
+ | To observe the output voltage ripple of Buck 1, place an oscilloscope probe across the output capacitor (COUT_1) with the probe ground lead at the negative (−) capacitor terminal and the probe tip at the positive (+) capacitor terminal. Figure 12 shows the typical output ripple waveform.\\ | ||
+ | |||
+ | {{ : | ||
+ | <WRAP centeralign>// | ||
+ | |||
+ | |||
+ | Set the oscilloscope to ac, 10 mV/ | ||
+ | |||
+ | To effectively measure the output voltage ripple, solder a wire to the negative (−) capacitor terminal and wrap it around the barrel of the probe and connect the tip directly to the positive (+) capacitor terminal, as shown in Figure 13. | ||
+ | |||
+ | {{ : | ||
+ | <WRAP centeralign>// | ||
+ | |||
+ | ==== Measuring the Switching Waveform of Buck==== | ||
+ | To observe the switching waveform with an oscilloscope, | ||
+ | 5 V/division, and 1 µs/ | ||
+ | |||
+ | When the SYNC/MODE pin is set to high, the buck regulators operate in forced PWM mode and the PSMx_ON registers in the [[adi> | ||
+ | |||
+ | When the MODE pin is set to low, the buck regulators operate in power save mode (PSM), improving the light load efficiency.\\ | ||
+ | | ||
+ | {{ : | ||
+ | <WRAP centeralign>// | ||
+ | f< | ||
+ | |||
+ | {{ : | ||
+ | <WRAP centeralign>// | ||
+ | I< | ||
+ | |||
+ | ==== Measuring the Synchronization Input or Output==== | ||
+ | To configure the SYNC/MODE pin as the clock output,set the SYNC_OUT bit in [[adi> | ||
+ | |||
+ | When the SYNC/MODE pin is configured as the input, the [[adi> | ||
+ | |||
+ | ==== Measuring Load Regulation of the Buck==== | ||
+ | Test the load regulation by increasing the load at the output and looking at the change in output voltage. The input voltage must be held constant during this measurement. To minimize voltage drop, use short low resistance wires, especially for loads approaching maximum current. Typical buck load regulation is shown in Figure 16.\\ | ||
+ | |||
+ | {{ : | ||
+ | <WRAP centeralign>// | ||
+ | |||
+ | ==== Measuring Line Regulation==== | ||
+ | To measure line regulation, vary the input voltage and examine the change in the output voltage. Typical buck line regulation is shown in Figure 17.\\ | ||
+ | |||
+ | {{ : | ||
+ | <WRAP centeralign>// | ||
+ | |||
+ | ==== Measuring Efficiency of the Buck==== | ||
+ | Measure the efficiency, η, by comparing the input power with the output power. Measure the input and output voltages as near to the input and output capacitors as possible to reduce the effect of IR drops.\\ | ||
+ | |||
+ | {{ : | ||
+ | <WRAP centeralign>// | ||
+ | |||
+ | ==== Measuring Inductor Current==== | ||
+ | Measure the inductor current by removing one end of the inductor from its pad and connecting a current loop in series. A current probe can be connected to this wire. \\ | ||
+ | |||
+ | ==== Measuring Line Regulation of the LDO==== | ||
+ | For line regulation measurements, | ||
+ | |||
+ | {{ : | ||
+ | <WRAP centeralign>// | ||
+ | |||
+ | ==== Measuring Load Regulation of the LDO==== | ||
+ | For load regulation measurements, | ||
+ | |||
+ | {{ : | ||
+ | <WRAP centeralign>// | ||
+ | |||
+ | ==== MODIFYING THE BOARD==== | ||
+ | === Setting the Output Voltage of the Bucks (CH1 to CH4) === | ||
+ | The buck output voltage is set through external resistor dividers, shown in Figure 21 for Buck 1. Optionally, the output voltage can be factory programmed to default values, as indicated in the [[adi> | ||
+ | |||
+ | < | ||
+ | | ||
+ | The V< | ||
+ | |||
+ | {{ : | ||
+ | |||
+ | <WRAP centeralign>// | ||
+ | |||
+ | When the output voltage of the bucks are changed, the values of inductors, output capacitors, and compensation networks might, likewise, need to be recalculated and changed for stable operation. See the [[adi> | ||
+ | \\ | ||
+ | |||
+ | === Setting the Output Voltage of the LDO (CH5) === | ||
+ | LDO output voltage is set through external resistor dividers, as shown in Figure 22 for LDO in CH5. The equation for the output voltage setting of LDO is\\ | ||
+ | < | ||
+ | |||
+ | The V< | ||
+ | |||
+ | {{ : | ||
+ | |||
+ | <WRAP centeralign>// | ||
+ | |||
+ | \\ | ||
+ | === External Resistor Divider Setting for Bucks and LDO === | ||
+ | The [[adi> | ||
+ | |||
+ | **Table 3. External Resistor Dividers in Each Channel**\\ | ||
+ | |||
+ | ^Resistor Divider ^Buck 1 ^Buck 2 ^Buck 3 ^Buck 4 ^LDO^ | ||
+ | |R< | ||
+ | |R< | ||
+ | |||
+ | \\ | ||
+ | === Changing the Switching Frequency === | ||
+ | The switching frequency of the [[adi> | ||
+ | |||
+ | {{ : | ||
+ | <WRAP centeralign>// | ||
+ | |||
+ | Each frequency-halved bit (FREQ1 and FREQ3 in Register 7) for Channel 1 and Channel 3 can be used to program its switching frequency to be half of the master switching frequency set by the RT pin. | ||
+ | When the switching frequency is changed, the values of the inductors, the output capacitors, and the compensation networks must be recalculated and changed for stable operation. See the [[adi> | ||
+ | |||
+ | ==== Changing the Peak Current-Limit Threshold in CH1/CH2==== | ||
+ | The peak current limit of the [[adi> | ||
+ | To change the peak current limit threshold, replace the R8 resistor for Channel 1 (R7 for Channel 2) with a different value, as shown in Table 4. The programmable current-limit threshold feature allows for the use of a small size inductor for low current applications.\\ | ||
+ | |||
+ | **Table 4. Load Capability Setting on Channel 1 | ||
+ | **\\ | ||
+ | ^R< | ||
+ | |Floating |2.5 A, with 4.4 A typical peak current limit| | ||
+ | |47 kΩ |1.2 A, with 2.6 A typical peak current limit| | ||
+ | |22 kΩ |4.0 A, with 6.4 A typical peak current limit| | ||
+ | |||
+ | ==== Changing the Soft Start Time==== | ||
+ | The soft start time of the [[adi> | ||
+ | |||
+ | **Table 5. Softstart Time Configuration by SS12/SS34 Pins | ||
+ | **\\ | ||
+ | ^ R< | ||
+ | ^(kΩ) ^(kΩ) ^CH1 ^CH2 ^CH3 ^CH4^ | ||
+ | |0 |n/a |2 ms |2 ms |2 ms |2 ms | | ||
+ | |100 |600 |2 ms |Parallel |2 ms |4 ms| | ||
+ | |200 |500 |2 ms |8 ms |2 ms |8 ms | | ||
+ | |300 |400 |4 ms |2 ms |4 ms |2 ms | | ||
+ | |400 |300 |4 ms |4 ms |4 ms |4 ms | | ||
+ | |500 |200 |8 ms |2 ms |4 ms |8 ms | | ||
+ | |600 |100 |8 ms |Parallel |8 ms |2 ms| | ||
+ | |n/a |0 |8 ms |8 ms |8 ms |8 ms | | ||
+ | |||
+ | ==== Changing CH1/CH2 to a 2-Phase Parallel Output==== | ||
+ | CH1 and CH2 are programmed as individual outputs on the [[adi> | ||
+ | |||
+ | -Short the Jumper S4. | ||
+ | -Change R39 = 100 kΩ and R16 = 600 kΩ (or R39 = 600 kΩ and R16 = 100 kΩ) in the SS12 pin setting. | ||
+ | -Remove R17 and C8 from the COMP2 pin. | ||
+ | -Remove R4, and replace R29 with 0 Ω on the FB2 pin. | ||
+ | -Shunt the J-EN2 jumper to low. | ||
+ | -Use the FB1 pin (R2 and R28) to set the output voltage. | ||
+ | -Use J-EN1 (EN1 pin) to enable or disable the regulator.\\ | ||
+ | |||
+ | During the parallel configuration, | ||
+ | |||
+ | ==== Changing the Phase Shift (0°, 90°, 180°, 270°) in the Buck Regulators==== | ||
+ | On the [[adi> | ||
+ | |||
+ | With the [[adi> | ||
+ | |||
+ | ==== Changing the PWRGD Output Options==== | ||
+ | On the [[adi> | ||
+ | |||
+ | With the [[adi> | ||
+ | |||
+ | ==== Changing the Interrupt Output Options==== | ||
+ | With the [[adi> | ||
+ | |||
+ | **Table 6. Interrupt Options in ADP5050 | ||
+ | **\\ | ||
+ | ^Name ^Description^ | ||
+ | |PWRG1_INT |Power-good failure detected on Channel 1| | ||
+ | |PWRG2_INT |Power-good failure detected on Channel 2| | ||
+ | |PWRG3_INT |Power-good failure detected on Channel 3| | ||
+ | |PWRG4_INT |Power-good failure detected on Channel 4| | ||
+ | |LVIN_INT |PVIN1 voltage drops below the specified threshold (adjustable in Register 7)| | ||
+ | |TEMP_INT |Junction temperature rises above the specified threshold (adjustable in Register 7)| | ||
+ | |||
+ | The interrupt (if any) that appears on the nINT pin is determined by the mask bits mapped in Register INT_MASK. To clear an interrupt, write 1b to the detected bit in INT_STATUS, or reset the part using UVLO. | ||
+ | |||
+ | Reading the interrupt or writing a 0b has no effect.\\ | ||
+ | |||
+ | ==== Enabling the Overheat Detection (ADP5050 Only)==== | ||
+ | In addition to the thermal shutdown protection, the [[adi> | ||
+ | |||
+ | Unlike thermal shutdown, the overheat warning function only sends out a warning signal without any shutdown. When the junction temperature rises above the threshold, the status bit, TEMP_INT, goes high. To clear the TEMP_INT status bit, write 1b to the status bit. The TEMP_INT bit status is latched until the bit is cleared.\\ | ||
+ | |||
+ | Use the [[adi> | ||
+ | |||
+ | ==== Enabling the Low Input Voltage Detection (ADP5050 Only)==== | ||
+ | In addition to the undervoltage lockout (UVLO), the [[adi> | ||
+ | |||
+ | Unlike the UVLO shutdown, the low input voltage warning function only sends out a warning signal without any shutdown. When the input voltage drops below the threshold, the status bit, LVIN_INT, goes high. To clear the LVIN_INT status bit, write 1b to the status bit. The LVIN_INT bit status is latched until the bit is cleared. | ||
+ | |||
+ | Use the [[adi> | ||
+ | |||
+ | === Enabling the Dynamic Voltage Scaling (DVS)=== | ||
+ | The [[adi> | ||
+ | -Connect FB1 and FB4 to the output by placing a 0 Ω resistor on RTOP. Replace R2 to 0 Ω. Remove R28 for CH1, and/or replace R5 to 0 Ω and remove R30 for CH4. | ||
+ | -Power up the demo board, connect the USB dongle, and turn on the GUI software. | ||
+ | -Use the [[adi> | ||
+ | -Use the [[adi> | ||
+ | |||
+ | <WRAP tip>Note that to avoid rapid output voltage changes to the next target value that result in abnormal problems, such as PWRGD failure, OVP latch-off, or hiccup, enable the DVS function prior to setting VID.</ | ||
+ | |||
+ | |||
+ | |||
+ | ===== EVALUATION BOARD SCHEMATICS AND ARTWORK===== | ||
+ | |||
+ | {{ : | ||
+ | <WRAP centeralign>// | ||
+ | |||
+ | \\ | ||
+ | |||
+ | {{ : | ||
+ | <WRAP centeralign>// | ||
+ | |||
+ | \\ | ||
+ | |||
+ | {{ : | ||
+ | <WRAP centeralign>// | ||
+ | |||
+ | \\ | ||
+ | |||
+ | {{ : | ||
+ | |||
+ | <WRAP centeralign>// | ||
+ | |||
+ | \\ | ||
+ | |||
+ | {{ : | ||
+ | <WRAP centeralign>// | ||
+ | |||
+ | |||
+ | |||
+ | |||
+ | ===== ORDERING INFORMATION===== | ||
+ | ==== Bill of Materials==== | ||
+ | |||
+ | **Table 7. Bill of Materials**\\ | ||
+ | |||
+ | ^Qty. ^Reference Designator ^Description ^Manufacturer ^Part Number^ | ||
+ | |1 |U1 |Micro PMU |Analog Devices |ADP5050 or ADP5052| | ||
+ | |1 |U2 |Dual MOSFETs, 16.4 mΩ |Vishay |Si7232DN| | ||
+ | |4 |CIN_1, CIN_2, CIN_3, CIN_4 |Capacitor, | ||
+ | |4 |COUT_2, COUT_3, COUT_4, COUT_6 |Capacitor, | ||
+ | |2 |COUT_9, COUT_10 |Capacitor, | ||
+ | |1 |L1 |Inductor, | ||
+ | |1 |L2 |Inductor, | ||
+ | |1 |L3 |Inductor, | ||
+ | |1 |L4 |Inductor, | ||
+ | |5 |C1, C3, C4, C5, C13 |Capacitor, | ||
+ | |4 |C2, C11, C12, C14 |Capacitor, | ||
+ | |2 |C7, C8 |Capacitor, | ||
+ | |2 |C9, C10 |Capacitor, | ||
+ | |1 |R2 |Resistor, | ||
+ | |1 |R3 |Resistor, | ||
+ | |1 |R4 |Resistor, | ||
+ | |1 |R5 |Resistor, | ||
+ | |1 |R6 |Resistor, | ||
+ | |2 |R7, R8 |Resistor, | ||
+ | |2 |R12, R17 |Resistor, | ||
+ | |1 |R15 |Resistor, | ||
+ | |1 |R20 |Resistor, | ||
+ | |2 |R39, R40 |Resistor, | ||
+ | |1 |R44 |Resistor, | ||
+ | |2 |D1, D2 |LED, 0603 |PANASONIC |LNJ208R8ARA| | ||
+ | |7 |J-EN1, J-EN2, J-EN3, J-EN4, J-EN5, J-SYNC, JP2 |3-Pin Header |SAMTEC |TSW-103-08-G-S| | ||
+ | |16 |J11, J12, J15, J17, J19, J21, J16, J18, J20, J22, LK7, LK8, S1, S2, S3, S4 |2-Pin Header |SAMTEC |TSW-150-07-T-S| | ||
+ | |8 |VOUT5, TP9, TP10, TP11, nINT, VREG, VDDIO, PWRGD_A0 |Test Point, 1206 |MAC8 |HK-1-G| | ||
+ | |10 |R16, R18, R54, R55, R56, R57, R32, R34, R38, R53 |No assembly |No assembly |No assembly| | ||
+ | |6 |COUT_1, COUT_11, COUT_12, COUT_13, COUT_7, COUT_8 |No assembly |No assembly |No Assembly| | ||
+ | |||
+ | |||
+ | |||
+ | ===== RELATED LINKS===== | ||
+ | ^Resource ^Description^ | ||
+ | |[[adi> | ||
+ | |[[adi> | ||
+ | |||
+ | |||
+ | |||