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| resources:eval:ad9681-125ebz [20 Jan 2014 20:22] – Incremental changes Doug Ito | resources:eval:ad9681-125ebz [27 Feb 2014 03:27] – added FPGA programming steps Doug Ito |
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| - After the template is selected, a message might appear asking if the default configuration can be used to program the FPGA (see Figure 4). If this message appears, click **Yes**, and the window will close.\\ {{ :resources:eval:10235-005.png?400 |}}<WRAP centeralign>//Figure 4. VisualAnalog Default Configuration Message//</WRAP>\\ | - After the template is selected, a message might appear asking if the default configuration can be used to program the FPGA (see Figure 4). If this message appears, click **Yes**, and the window will close.\\ {{ :resources:eval:10235-005.png?400 |}}<WRAP centeralign>//Figure 4. VisualAnalog Default Configuration Message//</WRAP>\\ |
| - To change features to settings other than the default settings, click the **Expand Display** button, located on the bottom right corner of the window (see Figure 5), to see what is shown in Figure 6.\\ | - To change features to settings other than the default settings, click the **Expand Display** button, located on the bottom right corner of the window (see Figure 5), to see what is shown in Figure 6.\\ |
| - Change the features and capture settings by consulting the detailed instructions in the [[adi>AN-905|AN-905 Application Note]], //VisualAnalog Converter Evaluation Tool Version 1.0 User Manual//.{{ :resources:eval:AD9681_VA_toolbar_collapsed.PNG?nolink&500 |}} | {{ :resources:eval:AD9681_VA_toolbar_collapsed.PNG?nolink&500 |}} |
| <WRAP centeralign>//Figure 5. VisualAnalog Window Toolbar, Collapsed Display// | <WRAP centeralign>//Figure 5. VisualAnalog Window Toolbar, Collapsed Display// |
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| </WRAP>{{ :resources:eval:AD9681_VA_avg_FFT_window_2ch_expanded.PNG?nolink&700 |}} | </WRAP>{{ :resources:eval:AD9681_VA_avg_FFT_window_2ch_expanded.PNG?nolink&700 |}} |
| <WRAP centeralign>//Figure 6. VisualAnalog, Main Window Expanded Display//</WRAP> | <WRAP centeralign>//Figure 6. VisualAnalog, Main Window Expanded Display//</WRAP> |
| | 4. To configure VisualAnalog to operate with the AD9681, push the Settings button on the ADCDataCapture block, as shown in Figure 7. |
| | {{ :resources:eval:AD9656_ADC_DataCaptureSettings_button.PNG?nolink&200 |}} |
| | <WRAP centeralign>//Figure 7. VisualAnalog ADC Data Capture Block//</WRAP> |
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| | 5. In the ADC Data Capture Settings Window, General Tab, select AD9681 to be the device, enter the sample clock frequency (125 is the default value), as shown in Figure 8. The sample frequency entered here is used for scaling of frequency values in test results and graphs. In the Output Data field, the channels to be tested are selected, as well as the FFT capture depth ("Length"). Note that the total of the capture depths for all selected channels cannot exceed 256k. |
| | {{ :resources:eval:AD9681_ADC_DataCaptureSettings_GeneralTab.PNG?nolink&500 |}} |
| | <WRAP centeralign>//Figure 8. VisualAnalog ADC Data Capture Settings Window, General Tab//</WRAP> |
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| | 6. In the ADC Data Capture Settings Window, Capture Board Tab, enter 30 in the Fill Delay field. Push the Browse button to navigate to the FPGA program file for the AD9681. The default installation location and filename will be similar to: |
| | C:\Program Files\Analog Devices\VisualAnalog\Hardware\HADv6\AD9681_hadv6.mcs\\ |
| | Push the **program button**. |
| | {{ :resources:eval:AD9681_ADC_DataCaptureSettings_CaptureBoardTab.PNG?nolink&500 |}} |
| | <WRAP centeralign>//Figure 9. VisualAnalog ADC Data Capture Settings Window, Capture Board Tab//</WRAP> |
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| | 7. VisualAnalog is now setup to work with the AD9681-125EBZ in the default condition. Other VisualAnalog features and capture settings are documented in the [[adi>AN-905|AN-905 Application Note]], //VisualAnalog Converter Evaluation Tool Version 1.0 User Manual//. |
| ===== Evaluation And Test ===== | ===== Evaluation And Test ===== |
| ==== Setting up the SPI Controller Software ==== | ==== Setting up the SPI Controller Software ==== |
| After the ADC data capture board setup is complete, set up the SPI controller software using the following procedure:\\ | After the ADC data capture board setup is complete, set up the SPI controller software using the following procedure:\\ |
| - Open the SPI controller software by going to the **Start** menu or by double-clicking the **SPIController** software desktop icon. If prompted for a configuration file, select .cfg file whose name begins with AD9681. If not prompted, check the title bar of the window to determine which configuration is loaded. If necessary, choose **Cfg Open** from the **File** menu and select the appropriate file based on your part type. Note that the **CHIP ID(1)** box should be filled to indicate whether the correct SPI controller configuration file is loaded (see Figure 7).{{ :resources:eval:AD9681_SPIController_Global_tab_ChipID.PNG?nolink&600 |}}<WRAP centeralign>//Figure 7. SPI Controller, CHIP ID(1) Box//</WRAP>\\ | - Open the SPI controller software by going to the **Start** menu or by double-clicking the **SPIController** software desktop icon. If prompted for a configuration file, select .cfg file whose name begins with AD9681. If not prompted, check the title bar of the window to determine which configuration is loaded. If necessary, choose **Cfg Open** from the **File** menu and select the appropriate file based on your part type. Note that the **CHIP ID(1)** box should be filled to indicate whether the correct SPI controller configuration file is loaded (see Figure 10).{{ :resources:eval:AD9681_SPIController_Global_tab_ChipID.PNG?nolink&600 |}}<WRAP centeralign>//Figure 10. SPI Controller, CHIP ID(1) Box//</WRAP>\\ |
| - Click the **New DUT** button in the **SPIController** window (see Figure 8){{ :resources:eval:AD9681_spicontroller_global_tab_newdUT_button.png?nolink&600 |}}<WRAP centeralign>//Figure 8. SPI Controller, New DUT Button//</WRAP>\\ | - Click the **New DUT** button in the **SPIController** window (see Figure 11){{ :resources:eval:AD9681_spicontroller_global_tab_newdUT_button.png?nolink&600 |}}<WRAP centeralign>//Figure 11. SPI Controller, New DUT Button//</WRAP>\\ |
| - In the **ADCBase 0** tab of the **SPIController** window, find the **CLOCK DIVIDE(B)** box (see Figure 9), and the **MODES(8)** box (see Figure 10). If using the clock divider, use the drop-down box to select the correct clock divide ratio, if necessary. If there is any interruption of the ADC clock during power-up or during operation, a Digital Reset may be needed to re-initialize the ADC (Figure 10). For additional information, refer to the data sheet, the [[adi>an-878|AN-878 Application Note]], //High Speed ADC SPI Control Software//, and the [[adi>an-877|AN-877 Application Note]], //Interfacing to High Speed ADCs via SPI//.{{ :resources:eval:AD9681_SPIController_ADCBase0_tab_ClkDiv.png?nolink&600 |}}<WRAP centeralign>//Figure 9. SPI Controller, CLOCK DIVIDE(B) Box//</WRAP>\\ {{ :resources:eval:AD9681_SPIController_ADCBase0_tab_DigReset.png?nolink&600 |}}<WRAP centeralign>//Figure 10. SPI Controller, Chip Power Mode - Digital Reset Selection//</WRAP>\\ | - In the **ADCBase 0** tab of the **SPIController** window, find the **CLOCK DIVIDE(B)** box (see Figure 12), and the **MODES(8)** box (see Figure 13). If using the clock divider, use the drop-down box to select the correct clock divide ratio, if necessary. If there is any interruption of the ADC clock during power-up or during operation, a Digital Reset may be needed to re-initialize the ADC (Figure 13). For additional information, refer to the data sheet, the [[adi>an-878|AN-878 Application Note]], //High Speed ADC SPI Control Software//, and the [[adi>an-877|AN-877 Application Note]], //Interfacing to High Speed ADCs via SPI//.{{ :resources:eval:AD9681_SPIController_ADCBase0_tab_ClkDiv.png?nolink&600 |}}<WRAP centeralign>//Figure 12. SPI Controller, CLOCK DIVIDE(B) Box//</WRAP>\\ {{ :resources:eval:AD9681_SPIController_ADCBase0_tab_DigReset.png?nolink&600 |}}<WRAP centeralign>//Figure 13. SPI Controller, Chip Power Mode - Digital Reset Selection//</WRAP>\\ |
| - Note that other settings can be changed on the **ADCBase 0 tab** (see Figure 9) and the **ADC A** through **ADC D** tabs (see Figure 11) to set up the part in the desired mode. The **ADCBase 0** tab settings affect the entire part, whereas the settings on the **ADC A** through **ADC D** tabs each affect the selected channel only. The B1 (Bank1), B2 (Bank2) and All buttons at the right end of the SPIController button row (as seen in Figure 10 and Figure 11) determine which bank of ADCs is affected by the SPIController settings. The All button is pushed by default which means that the **ADCBase 0** tab settings affect all channels on both ADC banks. The settings in the **ADC A** through **ADC D** will likewise affect their respective channels in both banks. For example, with the All button pushed, settings in the **ADC A** tab will affect channels A1 and A2. If the All button is un-pushed and the B1 (Bank1) button remains pushed, the settings in the **ADC A** tab will only affect channel A1. See the data sheet, the [[adi>an-878|AN-878 Application Note]], //High Speed ADC SPI Control Software//, and the [[adi>an-877|AN-877 Application Note]], //Interfacing to High Speed ADCs via SPI//, for additional information on the available settings.{{ :resources:eval:AD9681_SPIController_ADCA_tab.PNG?nolink&600 |}}<WRAP centeralign>//Figure 11. SPI Controller, Example ADC A Page//</WRAP>\\ | - Note that other settings can be changed on the **ADCBase 0 tab** (see Figure 12) and the **ADC A** through **ADC D** tabs (see Figure 14) to set up the part in the desired mode. The **ADCBase 0** tab settings affect the entire part, whereas the settings on the **ADC A** through **ADC D** tabs each affect the selected channel only. The B1 (Bank1), B2 (Bank2) and All buttons at the right end of the SPIController button row (as seen in Figure 13 and Figure 14) determine which bank of ADCs is affected by the SPIController settings. The All button is pushed by default which means that the **ADCBase 0** tab settings affect all channels on both ADC banks. The settings in the **ADC A** through **ADC D** will likewise affect their respective channels in both banks. For example, with the All button pushed, settings in the **ADC A** tab will affect channels A1 and A2. If the All button is un-pushed and the B1 (Bank1) button remains pushed, the settings in the **ADC A** tab will only affect channel A1. See the data sheet, the [[adi>an-878|AN-878 Application Note]], //High Speed ADC SPI Control Software//, and the [[adi>an-877|AN-877 Application Note]], //Interfacing to High Speed ADCs via SPI//, for additional information on the available settings.{{ :resources:eval:AD9681_SPIController_ADCA_tab.PNG?nolink&600 |}}<WRAP centeralign>//Figure 14. SPI Controller, Example ADC A Page//</WRAP>\\ |
| - Invoke a Digital Reset as shown in Figure 10 before testing. After selecting Reset, select Chip run to return to normal operation. | - Invoke a Digital Reset as shown in Figure 13 before testing. After selecting Reset, select Chip run to return to normal operation. |
| - To begin testing, click the **Run** or **Continuous Run** button in the **VisualAnalog** toolbar (see Figure 12).{{ :resources:eval:AD9681_VA_toolbar_collapsed_run_button.PNG?nolink&600 |}}<WRAP centeralign>//Figure 12. Run/Continuous Run Buttons (Encircled in Red) in VisualAnalog Toolbar, Collapsed Display//</WRAP>\\ | - To begin testing, click the **Run** or **Continuous Run** button in the **VisualAnalog** toolbar (see Figure 15).{{ :resources:eval:AD9681_VA_toolbar_collapsed_run_button.PNG?nolink&600 |}}<WRAP centeralign>//Figure 15. Run/Continuous Run Buttons (Encircled in Red) in VisualAnalog Toolbar, Collapsed Display//</WRAP>\\ |
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| ==== Adjusting the Amplitude of the Input Signal ==== | ==== Adjusting the Amplitude of the Input Signal ==== |
| The next step is to adjust the amplitude of the input signal for each channel as follows: | The next step is to adjust the amplitude of the input signal for each channel as follows: |
| - Adjust the amplitude of the input signal so that the fundamental is at the desired level. Examine the **Fund Power** reading in the left panel of the **VisualAnalog Graph - AD9681 FFT** window (see Figure 13).{{ :resources:eval:AD9681_FFT_example.png?nolink&600 |}}<WRAP centeralign>//Figure 13. Graph Window of VisualAnalog //</WRAP>\\ | - Adjust the amplitude of the input signal so that the fundamental is at the desired level. Examine the **Fund Power** reading in the left panel of the **VisualAnalog Graph - AD9681 FFT** window (see Figure 16).{{ :resources:eval:AD9681_FFT_example.png?nolink&600 |}}<WRAP centeralign>//Figure 16. Graph Window of VisualAnalog //</WRAP>\\ |
| - Repeat this procedure for the other channels, if desired | - Repeat this procedure for the other channels, if desired |
| - Click the floppy-disk icon within the **VisualAnalog Graph - AD9681 FFT** window to save the performance data as a .csv formatted file for plotting or analysis. | - Click the floppy-disk icon within the **VisualAnalog Graph - AD9681 FFT** window to save the performance data as a .csv formatted file for plotting or analysis. |
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| If the FFT plot appears abnormal, do the following: | If the FFT plot appears abnormal, do the following: |
| * If you see an abnormal noise floor, go to the **ADCBase0** tab of the **SPIController** window and toggle the **Chip Power Mode** in **MODES(8)** from **Chip Run** to **Reset** and back (Figure 10). | * If you see an abnormal noise floor, go to the **ADCBase0** tab of the **SPIController** window and toggle the **Chip Power Mode** in **MODES(8)** from **Chip Run** to **Reset** and back (Figure 13). |
| * If you see a normal noise floor when you disconnect the signal generator from the analog input, be sure that you are not overdriving the ADC. Reduce the input level, if necessary. | * If you see a normal noise floor when you disconnect the signal generator from the analog input, be sure that you are not overdriving the ADC. Reduce the input level, if necessary. |
| * In **VisualAnalog**, click the **Settings** icon in the **Input Formatter** block. Check that **Number Format** is set to the correct encoding (twos complement by default). Check that the **Number Format** in the **VisualAnalog Input Formatter** matches the data format selected in the **SPIController ADCBase0 OUTPUT MODE(14)** window. Repeat for the other channels.\\ | * In **VisualAnalog**, click the **Settings** icon in the **Input Formatter** block. Check that **Number Format** is set to the correct encoding (twos complement by default). Check that the **Number Format** in the **VisualAnalog Input Formatter** matches the data format selected in the **SPIController ADCBase0 OUTPUT MODE(14)** window. Repeat for the other channels.\\ |
