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This version (29 Jan 2014 22:26) was approved by Gustavo.Castro.The Previously approved version (19 Nov 2012 20:23) is available.Diff

AD8232 EVALUATION BOARD DOCUMENTATION

This page contains the documentation for the latest evaluation board revision 08-035378 REV A. To access the documentation for revision A03321A, please visit

http://wiki.analog.com/resources/eval/ad8232-evaluation-guide/a03321a

FEATURES

  • Ready to use Heart Rate Monitor (HRM) Front end
  • Operates in 2 or 3 electrode configurations
  • Directly interface to data acquisition and ADCs
  • Easy feature selection with switches
  • Allows various circuit configurations


Figure 1. AD8232-EVALZ Evaluation Board (08-035378 REV A)

GENERAL DESCRIPTION

The AD8232-EVALZ contains an AD8232 Heart Rate Monitor Front End conveniently mounted with the necessary components for initial evaluation in fitness applications. Inputs, outputs, supplies and leads-off detection terminals have been routed to test pins to simplify connectivity. Switches and jumpers are available for setting the input bias voltage, shutdown (SDN), fast-restore (FR), and AC/DC leads-off detection mode

QUICK START

The board ships with a default configuration for three-electrode systems connected to the hands. For this operation, verify that the switches and jumpers are set to the default values shown in Table 1. For two-electrode configurations, the settings are shown in Table 2.

TABLE 1. Quick Start Switch Settings

SETTING LABEL POSITION
Fast Restore Enabled S1 FR_EN
DC Leads Off DetectionS2 DC
Operation Enabled S3 EN
Input bias set by RLD and +VsINPUT BIAS SELP3
  1. Connect the power supply common to the GND terminal on the board. Connect a +3.3V supply voltage between at the +3.3V terminal.
  2. Connect the terminals LA and RA to the signal source.
  3. The right-leg drive is available via the RL terminal. Connect this terminal to the source reference.
  4. The output signal is available on the OUT terminal and it may be connected to a properly isolated system.

For safety reasons, Analog Devices recommends to evaluate the device with an ECG signal source instead of a live subject. Even though the electrode terminals LA, RA and RL are equipped with current-limiting resistors (R3, R4 and R5), these are not a comprehensive patient protection. These may not protect against supply line transients or leakage currents coming through power and acquisition systems. The user is fully responsible for understanding and applying all the safety guidelines and regulations that apply to medical equipment.

DEFAULT CIRCUIT CONFIGURATION

A simplified schematic is shown in Figure 2. The full schematic can be found at the end of this document


Figure 2. AD8232-CHARZ Board Simplified Schematic (Refer to Figure 12 for complete version)

The evaluation board ships with a default configuration for applications that involve three-electrodes connected at the hands. The terminals LA (left arm), RA (right arm), and RL (right leg) serve as the signal inputs and right-leg drive electrode connections respectively.

Signal Path: Inamp and Filters

The instrumentation amplifier has a fixed gain of 100 and the op-amp is set for a gain of 11. The overall gain is 1100V/V, which limits the maximum differential input signal to about 2.7mVp-p. Exceeding this amplitude will not damage the AD8232, but the signal at the output will appear distorted. Due to the filter’s high-Q, there is additional peaking that sets the maximum observed gain above 1100V/V around 15Hz. The total gain may be changed by adjusting the resistors R16 and R17, but this will have a direct impact on the Q of the low-pass filter. Note that the instrumentation amplifier has a fixed gain of 100.

The entire signal chain operates from a single-supply voltage. For this purpose, the reference buffer is set to a ratiometric level at mid-supply using two 10MΩ resistors (R14 and R15). The integrated reference buffer output provides a mid-supply dc level for the system. The signal at the output will ride on top of this mid-supply level. This voltage is available at the REFOUT pin (TP19) to serve as reference level for subsequent signal-acquisition stages.

The circuit implements a two-pole high pass filter for eliminating motion artifacts and the electrode half-cell potential. Additionally, the integrated operational amplifier creates a two-pole low pass filter to remove line noise and other interference signals. The frequency cutoff of all filters may be adjusted by changing component values.

A complete version of the schematic and a section summarizing the explanation of the components can be found at the bottom of this page.

Right-Leg Drive Amplifier

The integrated right-leg drive (RLD) amplifier senses the common mode voltage present at the signal inputs and can drive an opposing signal into the patient. This driven electrode functionality maintains the voltage between the patient and the AD8232 constant, greatly improving the common mode rejection ratio.

The board configures the RLD amplifier as an integrator, formed by an internal 150kΩ resistor and an external capacitor of 1nF (C6). This results in a loop gain of about 20 at line frequencies, with a crossover frequency of about 1 kHz.

In two-lead configurations, the RL pin can be used to drive the bias current resistors on the inputs. To create this connection, place a jumper on P4.

FILTER CONFIGURATION

The resistor and capacitor values for the filters were selected to provide effective noise rejection in applications that involve pulse detection while the subject is in motion. The filter parameters can be adjusted to fit other applications.

High-Pass Filters

The instrumentation amplifier in the AD8232 applies gain and high pass filtering simultaneously. This capability allows it to amplify a small ECG signal by 100 while rejecting electrode offsets as large as ±300 mV. The cutoff frequency of this filter is given by the following equation

fc = 100 / (2π R11 C7)

In this particular case, R11= 10MΩ and C7 = 0.22μF place the pole of the first high-pass at 7Hz. Note that the filter cutoff is 100 times higher than would be typically expected, because of the feedback architecture of the instrumentation amplifier.


Figure 3. Frequency response In-Amp filter (dc blocking feature)

An ac-coupling network (C4 and R9) at the output of the instrumentation amplifier introduces a second pole. The cutoff frequency is that of a regular passive first-order high-pass filter

fc = 1 / (2π R9 C4)

This results in a 7Hz cutoff frequency for 0.22μF and 100kΩ. Both high-pass filters together yield a total roll-off of 40dB per decade. Be aware that setting the same pole location for both high-pass filters will result in 6dB attenuation at the corner frequency. In addition, because the output of this filter is unbuffered, the instrumentation amplifier exhibits higher output impedance at the input of the subsequent low pass filter. The component values selected on the evaluation board yield good results without the need of a buffer. Keep this in mind when changing component values.

Low-Pass Filter

The internal uncommitted op amp is used to build a two-pole low pass filter with gain, using a Sallen-Key configuration. The following design equations set the low-pass cut-off frequency, gain and Q.

fc = 1 / [2π √(R10 C8 R13 C9)]

Gain = 1 + R16/R17

Q = √{ (R10 C8 R13 C9) / [R10 C9 + R13 C9 + R13 C8 (1 - Gain) ] }

Notice that changing the gain or the cutoff frequency will have an effect on Q and vice versa.

The evaluation board components place the cutoff frequency for the low-pass filter at approximately 25Hz and the gain to 11. Keep the sum of R16 and R17 above 50kΩ to save power and to avoid excessive loading of the output.

Figure 4 shows the transfer function of the signal from the differential input of the instrumentation amplifier to VOUT with the default filter configuration.


Figure 4. Gain vs. Frequency

Additional Low-Pass Filters

The components R18, C14, R19 and C15 offer additional filtering options. The terminal labeled OUTF is located after the first filter (R18 and C14). The terminal OUTFF is located after both filters.

LEADS-OFF DETECTION

The AD8232 includes leads off detection features. It provides modes optimized for either two or three-electrode configurations.

DC Leads-Off Detection

To use this mode, the position of the switch S2 must be the same as the “DC” label on the board. This mode works by sensing when either input goes high. Note that the system must be a three-electrode configuration to operate properly. Therefore, the RLD output terminal must be connected to a driven electrode.

In DC leads-off mode, the AD8232 checks each input individually, and is therefore able to indicate which electrode is disconnected. The AD8232 indicates which electrode is disconnected by setting the corresponding LOD– or LOD+ pin high.

AC Leads-Off Detection

To use this mode, the position of the switch S2 must be the same as the “AC” label of the board. To maintain the inputs inside the common-mode range of the amplifier, the bias level for the inputs may be set to REFOUT or RLD by placing the jumper on P2 or P4 respectively.

This mode is useful when using only two electrodes (no separate driven electrode). The AD8232 detects when an electrode is disconnected by sourcing a small 100 kHz current into the electrodes. As opposed to the DC detection mode, the ADC8232 is only able to determine that an electrode has lost its connection – not which one. During such event, the LOD+ pin goes to a high state. In this mode, the LOD– pin is not used and remains in a low state.

FAST RESTORE

The fast restore function (FR) reduces the duration of otherwise long settling tails of the high-pass filters. After an abrupt change that rails the amplifier (such as a leads-off condition), the AD8232 automatically adjusts to a higher filter cutoff frequency. This functionality allows the AD8232 to recover quickly, and therefore take valid measurements soon after reconnecting the electrodes to the subject. To enable this function, set the switch S1 to the position labeled FR_EN.

BOARD SETTINGS FOR TWO ELECTRODE CONFIGURATION

The AD8232-EVALZ can be configured to suit two-electrode applications, as shown in Table 2.

TABLE 2. Two-electrode configuration

SETTINGLABEL POSITION
AC Leads-off detectionS2 AC
Input bias set by RLDINPUT BIAS SELP4

Alternatively, the inputs may be biased to mid-supply by placing the jumper on P2.

Keep in mind that the gain and filtering may need to be adjusted depending on the location of the electrodes. Note that narrow bandwidths offer the highest rejection to motion artifacts and other external interferences, but introduce distortion into the ECG signal. For more information, refer to the AD8232 data sheet.

LAYOUT DIAGRAMS

The AD8232-EVALZ is a two-layer board with components mounted on the primary side only. Rubber feet are available on the secondary side for mechanical stability. The layout diagrams are provided as a visual aid and reference design. The PCB has been designed following standard practices to ensure signal integrity and reduce manufacturing costs.


Figure 5. Top Assembly

Figure 6. Primary side

Figure 7. Secondary side

EVALUATION BOARD COMPONENT EXPLANATION

The board should be thoroughly cleaned after any rework. Leaving contaminants such as residual flux from the soldering will have a negative impact on the input impedance and operation of the board.

Input Bias Selection: P1, P2, P3, P4, R1, R2

In three-electrode configurations, pull-up resistors are necessary for the leads-off functionality to work correctly. In two-electrode configurations, biasing the inputs within the input range of AD8232 is necessary for the instrumentation amplifier to work. R1 and R2 are 10 MΩ on the evaluation board. The resistors may be pulled up to four different values, depending on the jumposition. Only one jumper should be connected at a time.

Two-electrode configuration:
P4: Connects pull up resistors to the RLD (right-leg drive) amplifier output. This is the recommended configuration for two electrode configurations.
P2: Connects pull up resistors to REFOUT, which is typically at mid-supply.

Three-electrode configuration:
P3: Connects pull up resistors to +VS. This is the standard configuration for three-electrode configurations.
P1: This jumper position allows connecting the pull-up resistors to a voltage provided by the user. This is useful in systems that expect high power-line noise (50Hz or 60Hz). A higher voltage than the supply, such as 5V, can help in maintaining the inputs within the common-mode range of the amplifier. Apply this voltage between TP4 and ground.

In-Amp High Pass Filter: C7, R11

The cutoff frequency is set to 7.2Hz. Refer to the High-Pass Filters section for more information

AC-Coupling: C4, R9

The cutoff frequency of this high-pass filter is set to 7.2Hz. Because this is a DC-blocking circuit, connecting R11 to the REFOUT voltage is necessary to allow negative signal swings. Refer to the High-Pass Filters section for more information

Low Pass Filter (Sallen-Key): R16, R17, R10, R13, C8, C9, C10

This circuit provides two functions: a dual pole low pass filter and gain. On the evaluation board, the cutoff of this filter is set at 25 Hz, and the gain to 11. This brings the total gain of the AD8232 to 11×100 = 1100. Refer to the Low-Pass Filter section for more information

Additional low pass filters: R18, R19, R20, C14, C15, C16

Not populated. These provide pads for the user to add additional filtering on the output and the reference voltage. Refer to the Additional Low-Pass Filters section for more information

Mid-supply level: R14, R15, C11

R14 and R15 form a supply-ratiometric reference voltage for the system. The AD8232 buffers this voltage and makes it available at the REFOUT terminal. Select high resistor values for R14 and R15 to reduce power consumption. The evaluation board uses 10MΩ for both. C11 is required for filtering and stability. Power line noise may be considerably worse without C11. Due to large resistor and capacitor values used on the evaluation board, the time constant for this voltage is 5 seconds and will take about half a minute to observe a stable voltage at the output of REFOUT after power up. Shutting down the part through S3 will not discharge C11 and there will be no settling time related to this voltage.

Right leg drive: C6, R5, R7

C6 is 1nF, which together with an internal 150kΩ resistor, results in a loop gain of 20 around the typical line frequencies and a crossover frequency of 1kHz. The value of R5 is set to 499kΩ to avoid stability problems. For more information, refer to the Right-Leg Drive Amplifier section.

R7 is not populated. It can be used to limit the loop gain at low frequencies and to shift the amplifier’s dominant pole.

Optional RFI Filter: R3, R4, C1,C2, C3

Pads are provided for capacitors to implement additional RFI filtering. C2 and C3 should be the same value and well matched. C1 should be a larger value than C2 and C3. This minimizes degradation of CMRR at higher frequencies due to tolerance mismatch of C2 and C3.

If C2 = C3 = C and R3 = R4 = R then
Common mode signal cutoff frequency: 1/ (2πRC)
Differential signal cutoff frequency: 1/(2πR(2×C1 + C))

A lower common mode signal cutoff frequency will improve RFI rejection, but may increase the risk of instability with a right leg drive feedback loop.

The board should be thoroughly cleaned after any rework. Leaving contaminants such as residual flux from the soldering will have a negative impact on the input impedance and operation of the board.


EVALUATION BOARD SCHEMATIC

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