uC uC
1.0
2013.05.21.11:51:33 Generation Report
Output Directory D:/Work/Altera/Draft/AD7262/Initial/
Files D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/uC.v (659400 bytes VERILOG)

D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_cpu.sdc (3407 bytes SDC)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_cpu.v (190093 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_cpu_jtag_debug_module_sysclk.v (6895 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_cpu_jtag_debug_module_tck.v (8109 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_cpu_jtag_debug_module_wrapper.v (9839 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_cpu_ociram_default_contents.mif (5878 bytes MIF)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_cpu_oci_test_bench.v (1426 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_cpu_rf_ram_a.mif (600 bytes MIF)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_cpu_rf_ram_b.mif (600 bytes MIF)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_cpu_test_bench.v (29784 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_jtag_uart_0.v (23395 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_jtag_uart_0_input_mutex.dat (3 bytes OTHER)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_jtag_uart_0_input_stream.dat (10 bytes OTHER)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_jtag_uart_0_output_stream.dat (0 bytes OTHER)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_sysid.v (1441 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_onchip_ram.hex (21517 bytes HEX)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_onchip_ram.v (3881 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_led.v (2310 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_mm_console_master.v (15640 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_avalon_st_jtag_interface.v (2357 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_jtag_dc_streaming.v (7339 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_jtag_sld_node.v (5844 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_jtag_streaming.v (23657 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_pli_streaming.v (2285 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_avalon_st_clock_crosser.v (4900 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_avalon_st_pipeline_base.v (4716 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_avalon_st_idle_remover.v (1891 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_avalon_st_idle_inserter.v (2037 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_avalon_st_jtag_interface.sdc (140 bytes SDC)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_mm_console_master_timing_adt.v (1795 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_avalon_sc_fifo.v (32198 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_avalon_st_bytes_to_packets.v (4919 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_avalon_st_packets_to_bytes.v (7863 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_avalon_packets_to_master.v (51852 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_mm_console_master_b2p_adapter.v (1522 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_mm_console_master_p2b_adapter.v (1358 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_tristate_bridge_0.sv (5155 bytes SYSTEM_VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_tristate_pin_sharer_0.v (4343 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_tristate_pin_sharer_0_pin_sharer.sv (3932 bytes SYSTEM_VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_merlin_std_arbitrator_core.sv (8985 bytes SYSTEM_VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_tristate_pin_sharer_0_arbiter.sv (2845 bytes SYSTEM_VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_sram.v (28076 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_tristate_controller_translator.sv (7075 bytes SYSTEM_VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_merlin_slave_translator.sv (15976 bytes SYSTEM_VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_tristate_controller_aggregator.sv (9358 bytes SYSTEM_VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_pwr_data.v (3324 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_i2c_int.v (2358 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_pwr_en_clk.v (2197 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_sys_timer.v (6883 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/AD7262.v (9035 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/AD7262_Avalon_core.v (21060 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/write_master.v (6046 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_gain_select.v (2216 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_pwr_modes.v (2382 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_pll.v (10367 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_merlin_master_translator.sv (16415 bytes SYSTEM_VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_merlin_master_agent.sv (8662 bytes SYSTEM_VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_merlin_slave_agent.sv (17560 bytes SYSTEM_VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_merlin_burst_uncompressor.sv (10392 bytes SYSTEM_VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_addr_router.sv (6577 bytes SYSTEM_VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_addr_router_001.sv (9751 bytes SYSTEM_VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_addr_router_002.sv (6334 bytes SYSTEM_VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_addr_router_003.sv (5989 bytes SYSTEM_VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_id_router.sv (5883 bytes SYSTEM_VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_id_router_001.sv (5978 bytes SYSTEM_VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_id_router_002.sv (6063 bytes SYSTEM_VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_id_router_003.sv (5814 bytes SYSTEM_VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_merlin_traffic_limiter.sv (13743 bytes SYSTEM_VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_merlin_burst_adapter.sv (36989 bytes SYSTEM_VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_reset_controller.v (3592 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_reset_synchronizer.v (3564 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_reset_controller.sdc (1179 bytes SDC)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_cmd_xbar_demux.sv (4743 bytes SYSTEM_VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_cmd_xbar_demux_001.sv (12472 bytes SYSTEM_VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_cmd_xbar_demux_002.sv (4114 bytes SYSTEM_VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_cmd_xbar_demux_003.sv (3477 bytes SYSTEM_VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_merlin_arbitrator.sv (9448 bytes SYSTEM_VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_cmd_xbar_mux.sv (11007 bytes SYSTEM_VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_cmd_xbar_mux_001.sv (11804 bytes SYSTEM_VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_cmd_xbar_mux_002.sv (12593 bytes SYSTEM_VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_rsp_xbar_demux.sv (4098 bytes SYSTEM_VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_rsp_xbar_demux_001.sv (4740 bytes SYSTEM_VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_rsp_xbar_demux_002.sv (5374 bytes SYSTEM_VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_rsp_xbar_demux_003.sv (3472 bytes SYSTEM_VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_rsp_xbar_mux.sv (13051 bytes SYSTEM_VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_rsp_xbar_mux_001.sv (23389 bytes SYSTEM_VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_rsp_xbar_mux_002.sv (12210 bytes SYSTEM_VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_merlin_width_adapter.sv (36187 bytes SYSTEM_VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_avalon_st_handshake_clock_crosser.v (7493 bytes VERILOG)
D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/uC_irq_mapper.sv (1818 bytes SYSTEM_VERILOG)
Instantiations
uC
uC v1.0		 uC_cpu as cpu
uC_jtag_uart_0 as jtag_uart_0
uC_sysid as sysid
uC_onchip_ram as onchip_ram
uC_led as led
uC_mm_console_master as mm_console_master
uC_tristate_bridge_0 as tristate_bridge_0
uC_tristate_pin_sharer_0 as tristate_pin_sharer_0
uC_sram as sram
uC_pwr_data as pwr_data
uC_i2c_int as i2c_int
uC_pwr_en_clk as pwr_en_clk, cal
uC_sys_timer as sys_timer
AD7262_Avalon_core as ad7262_0
uC_gain_select as gain_select
uC_pwr_modes as pwr_modes
uC_pll as pll
altera_merlin_master_translator as cpu_instruction_master_translator, cpu_data_master_translator, mm_console_master_master_translator, ad7262_0_avalon_master_translator
altera_merlin_slave_translator as cpu_jtag_debug_module_translator, onchip_ram_s1_translator, sram_uas_translator, led_s1_translator, sysid_control_slave_translator, jtag_uart_0_avalon_jtag_slave_translator, pwr_data_s1_translator, i2c_int_s1_translator, pwr_en_clk_s1_translator, sys_timer_s1_translator, ad7262_0_avalon_slave_0_translator, gain_select_s1_translator, pwr_modes_s1_translator, cal_s1_translator, pll_pll_slave_translator
altera_merlin_master_agent as cpu_instruction_master_translator_avalon_universal_master_0_agent, cpu_data_master_translator_avalon_universal_master_0_agent, mm_console_master_master_translator_avalon_universal_master_0_agent, ad7262_0_avalon_master_translator_avalon_universal_master_0_agent
altera_merlin_slave_agent as cpu_jtag_debug_module_translator_avalon_universal_slave_0_agent, onchip_ram_s1_translator_avalon_universal_slave_0_agent, sram_uas_translator_avalon_universal_slave_0_agent, led_s1_translator_avalon_universal_slave_0_agent, sysid_control_slave_translator_avalon_universal_slave_0_agent, jtag_uart_0_avalon_jtag_slave_translator_avalon_universal_slave_0_agent, pwr_data_s1_translator_avalon_universal_slave_0_agent, i2c_int_s1_translator_avalon_universal_slave_0_agent, pwr_en_clk_s1_translator_avalon_universal_slave_0_agent, sys_timer_s1_translator_avalon_universal_slave_0_agent, ad7262_0_avalon_slave_0_translator_avalon_universal_slave_0_agent, gain_select_s1_translator_avalon_universal_slave_0_agent, pwr_modes_s1_translator_avalon_universal_slave_0_agent, cal_s1_translator_avalon_universal_slave_0_agent, pll_pll_slave_translator_avalon_universal_slave_0_agent
altera_avalon_sc_fifo as cpu_jtag_debug_module_translator_avalon_universal_slave_0_agent_rsp_fifo, onchip_ram_s1_translator_avalon_universal_slave_0_agent_rsp_fifo, sram_uas_translator_avalon_universal_slave_0_agent_rsp_fifo, led_s1_translator_avalon_universal_slave_0_agent_rsp_fifo, sysid_control_slave_translator_avalon_universal_slave_0_agent_rsp_fifo, jtag_uart_0_avalon_jtag_slave_translator_avalon_universal_slave_0_agent_rsp_fifo, pwr_data_s1_translator_avalon_universal_slave_0_agent_rsp_fifo, i2c_int_s1_translator_avalon_universal_slave_0_agent_rsp_fifo, pwr_en_clk_s1_translator_avalon_universal_slave_0_agent_rsp_fifo, sys_timer_s1_translator_avalon_universal_slave_0_agent_rsp_fifo, ad7262_0_avalon_slave_0_translator_avalon_universal_slave_0_agent_rsp_fifo, gain_select_s1_translator_avalon_universal_slave_0_agent_rsp_fifo, pwr_modes_s1_translator_avalon_universal_slave_0_agent_rsp_fifo, cal_s1_translator_avalon_universal_slave_0_agent_rsp_fifo, pll_pll_slave_translator_avalon_universal_slave_0_agent_rsp_fifo, pll_pll_slave_translator_avalon_universal_slave_0_agent_rdata_fifo
uC_addr_router as addr_router
uC_addr_router_001 as addr_router_001
uC_addr_router_002 as addr_router_002
uC_addr_router_003 as addr_router_003
uC_id_router as id_router
uC_id_router_001 as id_router_001
uC_id_router_002 as id_router_002
uC_id_router_003 as id_router_003, id_router_004, id_router_005, id_router_006, id_router_007, id_router_008, id_router_009, id_router_010, id_router_011, id_router_012, id_router_013, id_router_014
altera_merlin_traffic_limiter as limiter, limiter_001, limiter_002, limiter_003
altera_merlin_burst_adapter as burst_adapter
altera_reset_controller as rst_controller, rst_controller_001
uC_cmd_xbar_demux as cmd_xbar_demux
uC_cmd_xbar_demux_001 as cmd_xbar_demux_001
uC_cmd_xbar_demux_002 as cmd_xbar_demux_002
uC_cmd_xbar_demux_003 as cmd_xbar_demux_003
uC_cmd_xbar_mux as cmd_xbar_mux
uC_cmd_xbar_mux_001 as cmd_xbar_mux_001
uC_cmd_xbar_mux_002 as cmd_xbar_mux_002
uC_rsp_xbar_demux as rsp_xbar_demux
uC_rsp_xbar_demux_001 as rsp_xbar_demux_001
uC_rsp_xbar_demux_002 as rsp_xbar_demux_002
uC_rsp_xbar_demux_003 as rsp_xbar_demux_003, rsp_xbar_demux_004, rsp_xbar_demux_005, rsp_xbar_demux_006, rsp_xbar_demux_007, rsp_xbar_demux_008, rsp_xbar_demux_009, rsp_xbar_demux_010, rsp_xbar_demux_011, rsp_xbar_demux_012, rsp_xbar_demux_013, rsp_xbar_demux_014
uC_rsp_xbar_mux as rsp_xbar_mux
uC_rsp_xbar_mux_001 as rsp_xbar_mux_001
uC_rsp_xbar_mux_002 as rsp_xbar_mux_002
altera_merlin_width_adapter as width_adapter, width_adapter_001
altera_avalon_st_handshake_clock_crosser as crosser, crosser_001
uC_irq_mapper as irq_mapper
uC_cpu
altera_nios2_qsys v11.0
uC_jtag_uart_0
altera_avalon_jtag_uart v11.0
uC_sysid
altera_avalon_sysid_qsys v11.0
uC_onchip_ram
altera_avalon_onchip_memory2 v11.0
uC_led
altera_avalon_pio v11.0
uC_mm_console_master
altera_jtag_avalon_master v11.0		 altera_avalon_st_jtag_interface as jtag_phy_embedded_in_jtag_master
uC_mm_console_master_timing_adt as timing_adt
altera_avalon_sc_fifo as fifo
altera_avalon_st_bytes_to_packets as b2p
altera_avalon_st_packets_to_bytes as p2b
altera_avalon_packets_to_master as transacto
uC_mm_console_master_b2p_adapter as b2p_adapter
uC_mm_console_master_p2b_adapter as p2b_adapter
uC_tristate_bridge_0
altera_tristate_conduit_bridge v11.0
uC_tristate_pin_sharer_0
altera_tristate_conduit_pin_sharer v11.0		 uC_tristate_pin_sharer_0_pin_sharer as pin_sharer
uC_tristate_pin_sharer_0_arbiter as arbiter
uC_sram
altera_generic_tristate_controller v11.0		 altera_tristate_controller_translator as tdt
altera_merlin_slave_translator as slave_translator
altera_tristate_controller_aggregator as tda
uC_pwr_data
altera_avalon_pio v11.0
uC_i2c_int
altera_avalon_pio v11.0
uC_pwr_en_clk
altera_avalon_pio v11.0
uC_sys_timer
altera_avalon_timer v11.0
AD7262_Avalon_core
ad7262 v1.0
uC_gain_select
altera_avalon_pio v11.0
uC_pwr_modes
altera_avalon_pio v11.0
uC_pll
altpll v11.0
altera_merlin_master_translator
altera_merlin_master_translator v11.0
altera_merlin_slave_translator
altera_merlin_slave_translator v11.0
altera_merlin_master_agent
altera_merlin_master_agent v11.0
altera_merlin_slave_agent
altera_merlin_slave_agent v11.0
altera_avalon_sc_fifo
altera_avalon_sc_fifo v11.0
uC_addr_router
altera_merlin_router v11.0
uC_addr_router_001
altera_merlin_router v11.0
uC_addr_router_002
altera_merlin_router v11.0
uC_addr_router_003
altera_merlin_router v11.0
uC_id_router
altera_merlin_router v11.0
uC_id_router_001
altera_merlin_router v11.0
uC_id_router_002
altera_merlin_router v11.0
uC_id_router_003
altera_merlin_router v11.0
altera_merlin_traffic_limiter
altera_merlin_traffic_limiter v11.0
altera_merlin_burst_adapter
altera_merlin_burst_adapter v11.0
altera_reset_controller
altera_reset_controller v11.0
uC_cmd_xbar_demux
altera_merlin_demultiplexer v11.0
uC_cmd_xbar_demux_001
altera_merlin_demultiplexer v11.0
uC_cmd_xbar_demux_002
altera_merlin_demultiplexer v11.0
uC_cmd_xbar_demux_003
altera_merlin_demultiplexer v11.0
uC_cmd_xbar_mux
altera_merlin_multiplexer v11.0
uC_cmd_xbar_mux_001
altera_merlin_multiplexer v11.0
uC_cmd_xbar_mux_002
altera_merlin_multiplexer v11.0
uC_rsp_xbar_demux
altera_merlin_demultiplexer v11.0
uC_rsp_xbar_demux_001
altera_merlin_demultiplexer v11.0
uC_rsp_xbar_demux_002
altera_merlin_demultiplexer v11.0
uC_rsp_xbar_demux_003
altera_merlin_demultiplexer v11.0
uC_rsp_xbar_mux
altera_merlin_multiplexer v11.0
uC_rsp_xbar_mux_001
altera_merlin_multiplexer v11.0
uC_rsp_xbar_mux_002
altera_merlin_multiplexer v11.0
altera_merlin_width_adapter
altera_merlin_width_adapter v11.0
altera_avalon_st_handshake_clock_crosser
altera_avalon_st_handshake_clock_crosser v11.0
uC_irq_mapper
altera_irq_mapper v11.0
altera_avalon_st_jtag_interface
altera_jtag_dc_streaming v11.0
uC_mm_console_master_timing_adt
timing_adapter v11.0
altera_avalon_st_bytes_to_packets
altera_avalon_st_bytes_to_packets v11.0
altera_avalon_st_packets_to_bytes
altera_avalon_st_packets_to_bytes v11.0
altera_avalon_packets_to_master
altera_avalon_packets_to_master v11.0
uC_mm_console_master_b2p_adapter
channel_adapter v11.0
uC_mm_console_master_p2b_adapter
channel_adapter v11.0
uC_tristate_pin_sharer_0_pin_sharer
altera_tristate_conduit_pin_sharer_core v11.0
uC_tristate_pin_sharer_0_arbiter
altera_merlin_std_arbitrator v11.0
altera_tristate_controller_translator
altera_tristate_controller_translator v11.0
altera_tristate_controller_aggregator
altera_tristate_controller_aggregator v11.0
Generation Messages
2013.05.21.11:49:24 [Debug] uC.altera_nios2_qsys: When a generate simulation callback is defined a synthesis generation callback should also be defined 2013.05.21.11:50:03 [Debug] uC.cpu: Timing: VAL:1/0.032s ELA:1/0.004s 2013.05.21.11:50:03 [Info] uC.sysid: System ID will no longer be automatically assigned. 2013.05.21.11:50:03 [Info] uC.sysid: Time stamp will be automatically updated when this component is generated. 2013.05.21.11:50:03 [Debug] uC.sysid: Timing: VAL:2/0.000s/0.000s 2013.05.21.11:50:03 [Info] uC.onchip_ram: Memory will be initialized from onchip_ram.hex 2013.05.21.11:50:03 [Debug] uC.mm_console_master.clk_src: Timing: ELA:1/0.000s 2013.05.21.11:50:03 [Debug] uC.mm_console_master.clk_rst: Timing: ELA:2/0.000s/0.001s 2013.05.21.11:50:03 [Debug] uC.mm_console_master.jtag_phy_embedded_in_jtag_master: add_interface_port: Added reset port reset_n to clock_reset instead of clock 2013.05.21.11:50:03 [Debug] uC.mm_console_master.jtag_phy_embedded_in_jtag_master: Timing: VAL:1/0.001s ELA:1/0.001s QME:2/0.567s/0.667s(0.5s) 2013.05.21.11:50:03 [Warning] uC.mm_console_master.jtag_phy_embedded_in_jtag_master.resetrequest: No synchronous edges, but has associated clock 2013.05.21.11:50:03 [Debug] uC.mm_console_master.fifo: add_interface_port: Added reset port reset to clk_reset instead of clk 2013.05.21.11:50:03 [Debug] uC.mm_console_master.fifo: Timing: VAL:1/0.000s ELA:1/0.003s 2013.05.21.11:50:03 [Debug] uC.mm_console_master.b2p: Timing: ELA:2/0.000s/0.001s QME:1/0.468s(0.0s) 2013.05.21.11:50:03 [Debug] uC.mm_console_master.p2b: Timing: ELA:2/0.000s/0.000s QME:1/0.468s(1.0s) 2013.05.21.11:50:03 [Debug] uC.mm_console_master.transacto: add_interface_port: Added reset port reset_n to clk_reset instead of clk 2013.05.21.11:50:03 [Debug] uC.mm_console_master.transacto: Timing: VAL:1/0.001s ELA:1/0.002s QME:1/0.482s(0.0s) 2013.05.21.11:50:03 [Debug] uC.mm_console_master: Timing: VAL:1/0.000s COM:1/0.027s 2013.05.21.11:50:03 [Warning] uC.mm_console_master.master_reset: No synchronous edges, but has associated clock 2013.05.21.11:50:03 [Debug] uC.tristate_bridge_0: Timing: ELA:1/0.003s 2013.05.21.11:50:03 [Debug] uC.tristate_pin_sharer_0.clock: Timing: ELA:2/0.000s/0.001s 2013.05.21.11:50:03 [Debug] uC.tristate_pin_sharer_0.reset: Timing: ELA:2/0.000s/0.001s 2013.05.21.11:50:03 [Debug] uC.tristate_pin_sharer_0.pin_sharer: Timing: ELA:6/0.003s/0.005s 2013.05.21.11:50:03 [Debug] uC.tristate_pin_sharer_0.arbiter: Timing: ELA:2/0.000s/0.001s 2013.05.21.11:50:03 [Debug] uC.tristate_pin_sharer_0: Timing: COM:1/0.029s 2013.05.21.11:50:03 [Debug] uC.sram.clk: Timing: ELA:2/0.000s/0.000s 2013.05.21.11:50:03 [Debug] uC.sram.reset: Timing: ELA:2/0.000s/0.001s 2013.05.21.11:50:03 [Debug] uC.sram.tdt: Timing: ELA:4/0.001s/0.002s 2013.05.21.11:50:03 [Debug] uC.sram.slave_translator: Timing: ELA:5/0.004s/0.007s 2013.05.21.11:50:03 [Debug] uC.sram.tda: Timing: ELA:4/0.002s/0.003s 2013.05.21.11:50:03 [Debug] uC.sram: Timing: COM:1/0.007s 2013.05.21.11:50:03 [Info] uC.pwr_data: PIO inputs are not hardwired in test bench. Undefined values will be read from PIO inputs during simulation. 2013.05.21.11:49:25 [Warning] uC.ad7262: TOP_LEVEL_MODULE automatically set to AD7262_Avalon_core 2013.05.21.11:50:03 [Debug] uC.ad7262_0: Timing: QME:1/0.583s(0.0s) 2013.05.21.11:50:03 [Debug] uC.pll: Timing: VAL:1/0.013s ELA:1/0.001s 2013.05.21.11:50:03 [Info] uC: Generating uC "uC" for QUARTUS_SYNTH 2013.05.21.11:50:03 [Debug] uC: queue size: 0 starting:uC "uC" 2013.05.21.11:50:03 [Debug] Transform: PipelineBridgeSwap 2013.05.21.11:50:04 [Info] pipeline_bridge_swap_transform: After transform: 19 modules, 97 connections 2013.05.21.11:50:04 [Debug] Transform: ClockCrossingBridgeSwap 2013.05.21.11:50:04 [Debug] Transform: QsysBetaIPSwap 2013.05.21.11:50:04 [Debug] Transform: CustomInstructionTransform 2013.05.21.11:50:05 [Info] No custom instruction connections, skipping transform 2013.05.21.11:50:05 [Debug] Transform: TristateConduitUpgradeTransform 2013.05.21.11:50:05 [Debug] Transform: TranslatorTransform 2013.05.21.11:50:06 [Progress] min: 0 2013.05.21.11:50:06 [Progress] max: 1 2013.05.21.11:50:06 [Progress] current: 1 2013.05.21.11:50:06 [Progress] min: 0 2013.05.21.11:50:06 [Progress] max: 1 2013.05.21.11:50:06 [Progress] current: 1 2013.05.21.11:50:06 [Progress] min: 0 2013.05.21.11:50:06 [Progress] max: 1 2013.05.21.11:50:06 [Progress] current: 1 2013.05.21.11:50:06 [Progress] min: 0 2013.05.21.11:50:06 [Progress] max: 1 2013.05.21.11:50:06 [Progress] current: 1 2013.05.21.11:50:06 [Progress] min: 0 2013.05.21.11:50:06 [Progress] max: 1 2013.05.21.11:50:06 [Progress] current: 1 2013.05.21.11:50:06 [Progress] min: 0 2013.05.21.11:50:06 [Progress] max: 1 2013.05.21.11:50:06 [Progress] current: 1 2013.05.21.11:50:06 [Progress] min: 0 2013.05.21.11:50:06 [Progress] max: 1 2013.05.21.11:50:06 [Progress] current: 1 2013.05.21.11:50:06 [Progress] min: 0 2013.05.21.11:50:06 [Progress] max: 1 2013.05.21.11:50:06 [Progress] current: 1 2013.05.21.11:50:06 [Progress] min: 0 2013.05.21.11:50:06 [Progress] max: 1 2013.05.21.11:50:06 [Progress] current: 1 2013.05.21.11:50:06 [Progress] min: 0 2013.05.21.11:50:06 [Progress] max: 1 2013.05.21.11:50:06 [Progress] current: 1 2013.05.21.11:50:06 [Progress] min: 0 2013.05.21.11:50:06 [Progress] max: 1 2013.05.21.11:50:06 [Progress] current: 1 2013.05.21.11:50:06 [Progress] min: 0 2013.05.21.11:50:06 [Progress] max: 1 2013.05.21.11:50:06 [Progress] current: 1 2013.05.21.11:50:06 [Progress] min: 0 2013.05.21.11:50:06 [Progress] max: 1 2013.05.21.11:50:06 [Progress] current: 1 2013.05.21.11:50:06 [Progress] min: 0 2013.05.21.11:50:06 [Progress] max: 1 2013.05.21.11:50:06 [Progress] current: 1 2013.05.21.11:50:06 [Progress] min: 0 2013.05.21.11:50:06 [Progress] max: 1 2013.05.21.11:50:06 [Progress] current: 1 2013.05.21.11:50:06 [Progress] min: 0 2013.05.21.11:50:06 [Progress] max: 1 2013.05.21.11:50:06 [Progress] current: 1 2013.05.21.11:50:06 [Progress] min: 0 2013.05.21.11:50:06 [Progress] max: 1 2013.05.21.11:50:06 [Progress] current: 1 2013.05.21.11:50:06 [Progress] min: 0 2013.05.21.11:50:06 [Progress] max: 1 2013.05.21.11:50:06 [Progress] current: 1 2013.05.21.11:50:06 [Progress] min: 0 2013.05.21.11:50:06 [Progress] max: 1 2013.05.21.11:50:06 [Progress] current: 1 2013.05.21.11:50:06 [Info] merlin_translator_transform: After transform: 38 modules, 191 connections 2013.05.21.11:50:06 [Debug] Transform: DomainTransform 2013.05.21.11:50:06 [Debug] Transform merlin_domain_transform not run on matched interfaces cpu.instruction_master and cpu_instruction_master_translator.avalon_anti_master_0 2013.05.21.11:50:06 [Debug] Transform merlin_domain_transform not run on matched interfaces cpu.data_master and cpu_data_master_translator.avalon_anti_master_0 2013.05.21.11:50:06 [Debug] Transform merlin_domain_transform not run on matched interfaces mm_console_master.master and mm_console_master_master_translator.avalon_anti_master_0 2013.05.21.11:50:06 [Debug] Transform merlin_domain_transform not run on matched interfaces ad7262_0.avalon_master and ad7262_0_avalon_master_translator.avalon_anti_master_0 2013.05.21.11:50:06 [Progress] min: 0 2013.05.21.11:50:06 [Progress] max: 1 2013.05.21.11:50:06 [Progress] current: 1 2013.05.21.11:50:06 [Progress] min: 0 2013.05.21.11:50:06 [Progress] max: 1 2013.05.21.11:50:06 [Progress] current: 1 2013.05.21.11:50:06 [Progress] min: 0 2013.05.21.11:50:06 [Progress] max: 1 2013.05.21.11:50:06 [Progress] current: 1 2013.05.21.11:50:07 [Progress] min: 0 2013.05.21.11:50:07 [Progress] max: 1 2013.05.21.11:50:07 [Progress] current: 1 2013.05.21.11:50:07 [Progress] min: 0 2013.05.21.11:50:07 [Progress] max: 1 2013.05.21.11:50:07 [Progress] current: 1 2013.05.21.11:50:07 [Progress] min: 0 2013.05.21.11:50:07 [Progress] max: 1 2013.05.21.11:50:07 [Progress] current: 1 2013.05.21.11:50:07 [Progress] min: 0 2013.05.21.11:50:07 [Progress] max: 1 2013.05.21.11:50:07 [Progress] current: 1 2013.05.21.11:50:07 [Progress] min: 0 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2013.05.21.11:50:07 [Progress] min: 0 2013.05.21.11:50:07 [Progress] max: 1 2013.05.21.11:50:07 [Progress] current: 1 2013.05.21.11:50:07 [Progress] min: 0 2013.05.21.11:50:07 [Progress] max: 1 2013.05.21.11:50:07 [Progress] current: 1 2013.05.21.11:50:07 [Progress] min: 0 2013.05.21.11:50:07 [Progress] max: 1 2013.05.21.11:50:07 [Progress] current: 1 2013.05.21.11:50:07 [Progress] min: 0 2013.05.21.11:50:07 [Progress] max: 1 2013.05.21.11:50:07 [Progress] current: 1 2013.05.21.11:50:07 [Progress] min: 0 2013.05.21.11:50:07 [Progress] max: 1 2013.05.21.11:50:07 [Progress] current: 1 2013.05.21.11:50:07 [Progress] min: 0 2013.05.21.11:50:07 [Progress] max: 1 2013.05.21.11:50:07 [Progress] current: 1 2013.05.21.11:50:07 [Progress] min: 0 2013.05.21.11:50:07 [Progress] max: 1 2013.05.21.11:50:07 [Progress] current: 1 2013.05.21.11:50:07 [Progress] min: 0 2013.05.21.11:50:07 [Progress] max: 1 2013.05.21.11:50:07 [Progress] current: 1 2013.05.21.11:50:07 [Progress] min: 0 2013.05.21.11:50:07 [Progress] max: 1 2013.05.21.11:50:07 [Progress] current: 1 2013.05.21.11:50:07 [Progress] min: 0 2013.05.21.11:50:07 [Progress] max: 1 2013.05.21.11:50:07 [Progress] current: 1 2013.05.21.11:50:07 [Progress] min: 0 2013.05.21.11:50:07 [Progress] max: 1 2013.05.21.11:50:07 [Progress] current: 1 2013.05.21.11:50:07 [Debug] Transform merlin_domain_transform not run on matched interfaces cpu_jtag_debug_module_translator.avalon_anti_slave_0 and cpu.jtag_debug_module 2013.05.21.11:50:07 [Debug] Transform merlin_domain_transform not run on matched interfaces onchip_ram_s1_translator.avalon_anti_slave_0 and onchip_ram.s1 2013.05.21.11:50:07 [Debug] Transform merlin_domain_transform not run on matched interfaces sram_uas_translator.avalon_anti_slave_0 and sram.uas 2013.05.21.11:50:07 [Debug] Transform merlin_domain_transform not run on matched interfaces led_s1_translator.avalon_anti_slave_0 and led.s1 2013.05.21.11:50:07 [Debug] Transform merlin_domain_transform not run on matched interfaces sysid_control_slave_translator.avalon_anti_slave_0 and sysid.control_slave 2013.05.21.11:50:07 [Debug] Transform merlin_domain_transform not run on matched interfaces jtag_uart_0_avalon_jtag_slave_translator.avalon_anti_slave_0 and jtag_uart_0.avalon_jtag_slave 2013.05.21.11:50:07 [Debug] Transform merlin_domain_transform not run on matched interfaces pwr_data_s1_translator.avalon_anti_slave_0 and pwr_data.s1 2013.05.21.11:50:07 [Debug] Transform merlin_domain_transform not run on matched interfaces i2c_int_s1_translator.avalon_anti_slave_0 and i2c_int.s1 2013.05.21.11:50:07 [Debug] Transform merlin_domain_transform not run on matched interfaces pwr_en_clk_s1_translator.avalon_anti_slave_0 and pwr_en_clk.s1 2013.05.21.11:50:07 [Debug] Transform merlin_domain_transform not run on matched interfaces sys_timer_s1_translator.avalon_anti_slave_0 and sys_timer.s1 2013.05.21.11:50:07 [Debug] Transform merlin_domain_transform not run on matched interfaces ad7262_0_avalon_slave_0_translator.avalon_anti_slave_0 and ad7262_0.avalon_slave_0 2013.05.21.11:50:07 [Debug] Transform merlin_domain_transform not run on matched interfaces gain_select_s1_translator.avalon_anti_slave_0 and gain_select.s1 2013.05.21.11:50:07 [Debug] Transform merlin_domain_transform not run on matched interfaces pwr_modes_s1_translator.avalon_anti_slave_0 and pwr_modes.s1 2013.05.21.11:50:07 [Debug] Transform merlin_domain_transform not run on matched interfaces cal_s1_translator.avalon_anti_slave_0 and cal.s1 2013.05.21.11:50:07 [Debug] Transform merlin_domain_transform not run on matched interfaces pll_pll_slave_translator.avalon_anti_slave_0 and pll.pll_slave 2013.05.21.11:50:07 [Info] merlin_domain_transform: After transform: 74 modules, 485 connections 2013.05.21.11:50:07 [Debug] Transform: RouterTransform 2013.05.21.11:50:07 [Progress] min: 0 2013.05.21.11:50:07 [Progress] max: 1 2013.05.21.11:50:07 [Progress] current: 1 2013.05.21.11:50:07 [Progress] min: 0 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2013.05.21.11:50:07 [Progress] current: 1 2013.05.21.11:50:07 [Progress] min: 0 2013.05.21.11:50:07 [Progress] max: 1 2013.05.21.11:50:07 [Progress] current: 1 2013.05.21.11:50:07 [Progress] min: 0 2013.05.21.11:50:07 [Progress] max: 1 2013.05.21.11:50:07 [Progress] current: 1 2013.05.21.11:50:07 [Progress] min: 0 2013.05.21.11:50:07 [Progress] max: 1 2013.05.21.11:50:07 [Progress] current: 1 2013.05.21.11:50:07 [Progress] min: 0 2013.05.21.11:50:07 [Progress] max: 1 2013.05.21.11:50:07 [Progress] current: 1 2013.05.21.11:50:07 [Progress] min: 0 2013.05.21.11:50:07 [Progress] max: 1 2013.05.21.11:50:07 [Progress] current: 1 2013.05.21.11:50:07 [Progress] min: 0 2013.05.21.11:50:07 [Progress] max: 1 2013.05.21.11:50:07 [Progress] current: 1 2013.05.21.11:50:07 [Progress] min: 0 2013.05.21.11:50:07 [Progress] max: 1 2013.05.21.11:50:07 [Progress] current: 1 2013.05.21.11:50:07 [Progress] min: 0 2013.05.21.11:50:07 [Progress] max: 1 2013.05.21.11:50:07 [Progress] current: 1 2013.05.21.11:50:07 [Progress] min: 0 2013.05.21.11:50:07 [Progress] max: 1 2013.05.21.11:50:07 [Progress] current: 1 2013.05.21.11:50:07 [Info] merlin_router_transform: After transform: 93 modules, 579 connections 2013.05.21.11:50:07 [Debug] Transform: TrafficLimiterTransform 2013.05.21.11:50:08 [Progress] min: 0 2013.05.21.11:50:08 [Progress] max: 1 2013.05.21.11:50:08 [Progress] current: 1 2013.05.21.11:50:08 [Progress] min: 0 2013.05.21.11:50:08 [Progress] max: 1 2013.05.21.11:50:08 [Progress] current: 1 2013.05.21.11:50:08 [Progress] min: 0 2013.05.21.11:50:08 [Progress] max: 1 2013.05.21.11:50:08 [Progress] current: 1 2013.05.21.11:50:08 [Progress] min: 0 2013.05.21.11:50:08 [Progress] max: 1 2013.05.21.11:50:08 [Progress] current: 1 2013.05.21.11:50:08 [Info] merlin_traffic_limiter_transform: After transform: 97 modules, 603 connections 2013.05.21.11:50:08 [Debug] Transform: BurstTransform 2013.05.21.11:50:09 [Progress] min: 0 2013.05.21.11:50:09 [Progress] max: 1 2013.05.21.11:50:09 [Progress] current: 1 2013.05.21.11:50:09 [Info] merlin_burst_transform: After transform: 98 modules, 608 connections 2013.05.21.11:50:09 [Debug] Transform: ResetAdaptation 2013.05.21.11:50:09 [Progress] min: 0 2013.05.21.11:50:09 [Progress] max: 1 2013.05.21.11:50:09 [Progress] current: 1 2013.05.21.11:50:09 [Progress] min: 0 2013.05.21.11:50:09 [Progress] max: 1 2013.05.21.11:50:09 [Progress] current: 1 2013.05.21.11:50:09 [Info] reset_adaptation_transform: After transform: 100 modules, 392 connections 2013.05.21.11:50:09 [Debug] Transform: NetworkToSwitchTransform 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Info] merlin_network_to_switch_transform: After transform: 137 modules, 472 connections 2013.05.21.11:50:10 [Debug] Transform: WidthTransform 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Progress] min: 0 2013.05.21.11:50:10 [Progress] max: 1 2013.05.21.11:50:10 [Progress] current: 1 2013.05.21.11:50:10 [Info] merlin_width_transform: After transform: 139 modules, 478 connections 2013.05.21.11:50:10 [Debug] Transform: RouterTableTransform 2013.05.21.11:50:11 [Debug] Transform: ClockCrossingTransform 2013.05.21.11:50:12 [Info] Inserting clock-crossing logic between cmd_xbar_demux_001.src14 and cmd_xbar_mux_014.sink0 2013.05.21.11:50:12 [Progress] min: 0 2013.05.21.11:50:12 [Progress] max: 1 2013.05.21.11:50:12 [Progress] current: 1 2013.05.21.11:50:12 [Info] Inserting clock-crossing logic between rsp_xbar_demux_014.src0 and rsp_xbar_mux_001.sink14 2013.05.21.11:50:12 [Progress] min: 0 2013.05.21.11:50:12 [Progress] max: 1 2013.05.21.11:50:12 [Progress] current: 1 2013.05.21.11:50:12 [Info] com_altera_sopcmodel_transforms_avalon_ClockCrossingTransform: After transform: 141 modules, 488 connections 2013.05.21.11:50:12 [Debug] Transform: PipelineTransform 2013.05.21.11:50:13 [Debug] Transform: TrafficLimiterUpdateTransform 2013.05.21.11:50:13 [Info] limiter_update_transform: After transform: 141 modules, 492 connections 2013.05.21.11:50:13 [Debug] Transform: InterruptMapperTransform 2013.05.21.11:50:14 [Progress] min: 0 2013.05.21.11:50:14 [Progress] max: 1 2013.05.21.11:50:14 [Progress] current: 1 2013.05.21.11:50:14 [Info] merlin_interrupt_mapper_transform: After transform: 142 modules, 495 connections 2013.05.21.11:50:14 [Debug] Transform: InterruptSyncTransform 2013.05.21.11:50:15 [Debug] Transform: InterruptFanoutTransform 2013.05.21.11:50:16 [Warning] system: "No matching role found for jtag_uart_0:avalon_jtag_slave:dataavailable (dataavailable)" 2013.05.21.11:50:16 [Warning] system: "No matching role found for jtag_uart_0:avalon_jtag_slave:readyfordata (readyfordata)" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_nios2_qsys "submodules/uC_cpu" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_avalon_jtag_uart "submodules/uC_jtag_uart_0" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_avalon_sysid_qsys "submodules/uC_sysid" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_avalon_onchip_memory2 "submodules/uC_onchip_ram" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_avalon_pio "submodules/uC_led" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_jtag_avalon_master "submodules/uC_mm_console_master" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_tristate_conduit_bridge "submodules/uC_tristate_bridge_0" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_tristate_conduit_pin_sharer "submodules/uC_tristate_pin_sharer_0" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_generic_tristate_controller "submodules/uC_sram" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_avalon_pio "submodules/uC_pwr_data" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_avalon_pio "submodules/uC_i2c_int" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_avalon_pio "submodules/uC_pwr_en_clk" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_avalon_timer "submodules/uC_sys_timer" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses ad7262 "submodules/AD7262_Avalon_core" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_avalon_pio "submodules/uC_gain_select" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_avalon_pio "submodules/uC_pwr_modes" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_avalon_pio "submodules/uC_pwr_en_clk" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altpll "submodules/uC_pll" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_master_translator "submodules/altera_merlin_master_translator" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_master_translator "submodules/altera_merlin_master_translator" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_master_translator "submodules/altera_merlin_master_translator" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_master_translator "submodules/altera_merlin_master_translator" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_master_agent "submodules/altera_merlin_master_agent" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_master_agent "submodules/altera_merlin_master_agent" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_master_agent "submodules/altera_merlin_master_agent" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_master_agent "submodules/altera_merlin_master_agent" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_router "submodules/uC_addr_router" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_router "submodules/uC_addr_router_001" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_router "submodules/uC_addr_router_002" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_router "submodules/uC_addr_router_003" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_router "submodules/uC_id_router" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_router "submodules/uC_id_router_001" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_router "submodules/uC_id_router_002" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_router "submodules/uC_id_router_003" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_router "submodules/uC_id_router_003" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_router "submodules/uC_id_router_003" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_router "submodules/uC_id_router_003" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_router "submodules/uC_id_router_003" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_router "submodules/uC_id_router_003" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_router "submodules/uC_id_router_003" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_router "submodules/uC_id_router_003" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_router "submodules/uC_id_router_003" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_router "submodules/uC_id_router_003" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_router "submodules/uC_id_router_003" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_router "submodules/uC_id_router_003" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_traffic_limiter "submodules/altera_merlin_traffic_limiter" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_traffic_limiter "submodules/altera_merlin_traffic_limiter" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_traffic_limiter "submodules/altera_merlin_traffic_limiter" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_traffic_limiter "submodules/altera_merlin_traffic_limiter" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_burst_adapter "submodules/altera_merlin_burst_adapter" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_reset_controller "submodules/altera_reset_controller" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_reset_controller "submodules/altera_reset_controller" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_demultiplexer "submodules/uC_cmd_xbar_demux" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_demultiplexer "submodules/uC_cmd_xbar_demux_001" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_demultiplexer "submodules/uC_cmd_xbar_demux_002" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_demultiplexer "submodules/uC_cmd_xbar_demux_003" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_multiplexer "submodules/uC_cmd_xbar_mux" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_multiplexer "submodules/uC_cmd_xbar_mux_001" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_multiplexer "submodules/uC_cmd_xbar_mux_002" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_demultiplexer "submodules/uC_rsp_xbar_demux" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_demultiplexer "submodules/uC_rsp_xbar_demux_001" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_demultiplexer "submodules/uC_rsp_xbar_demux_002" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_demultiplexer "submodules/uC_rsp_xbar_demux_003" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_demultiplexer "submodules/uC_rsp_xbar_demux_003" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_demultiplexer "submodules/uC_rsp_xbar_demux_003" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_demultiplexer "submodules/uC_rsp_xbar_demux_003" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_demultiplexer "submodules/uC_rsp_xbar_demux_003" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_demultiplexer "submodules/uC_rsp_xbar_demux_003" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_demultiplexer "submodules/uC_rsp_xbar_demux_003" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_demultiplexer "submodules/uC_rsp_xbar_demux_003" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_demultiplexer "submodules/uC_rsp_xbar_demux_003" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_demultiplexer "submodules/uC_rsp_xbar_demux_003" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_demultiplexer "submodules/uC_rsp_xbar_demux_003" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_demultiplexer "submodules/uC_rsp_xbar_demux_003" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_multiplexer "submodules/uC_rsp_xbar_mux" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_multiplexer "submodules/uC_rsp_xbar_mux_001" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_multiplexer "submodules/uC_rsp_xbar_mux_002" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_width_adapter "submodules/altera_merlin_width_adapter" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_merlin_width_adapter "submodules/altera_merlin_width_adapter" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_avalon_st_handshake_clock_crosser "submodules/altera_avalon_st_handshake_clock_crosser" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_avalon_st_handshake_clock_crosser "submodules/altera_avalon_st_handshake_clock_crosser" 2013.05.21.11:50:16 [Debug] uC: "uC" reuses altera_irq_mapper "submodules/uC_irq_mapper" 2013.05.21.11:50:16 [Debug] uC: queue size: 127 starting:altera_nios2_qsys "submodules/uC_cpu" 2013.05.21.11:50:16 [Info] cpu: Starting RTL generation for module 'uC_cpu' 2013.05.21.11:50:16 [Info] cpu: Generation command is [exec C:/altera/11.0/quartus/../ip/altera/nios2_ip/altera_nios2/eperl.exe -I C:/altera/11.0/quartus/common/ip/altera/common/perl/5.8.3 -I C:/altera/11.0/quartus/sopc_builder/bin/europa -I C:/altera/11.0/quartus/sopc_builder/bin/perl_lib -I C:/altera/11.0/quartus/sopc_builder/bin -I C:/altera/11.0/quartus/../ip/altera/nios2_ip/altera_nios2/cpu_lib -I C:/altera/11.0/quartus/../ip/altera/nios2_ip/altera_nios2/nios_lib -I C:/altera/11.0/quartus/../ip/altera/nios2_ip/altera_nios2 -I C:/altera/11.0/quartus/../ip/altera/nios2_ip/altera_nios2 -- C:/altera/11.0/quartus/../ip/altera/nios2_ip/altera_nios2/generate_rtl.epl --name=uC_cpu --dir=C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0007_cpu_gen/ --quartus_dir=C:/altera/11.0/quartus --verilog --config=C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0007_cpu_gen//uC_cpu_processor_configuration.pl --do_build_sim=0 --bogus ] 2013.05.21.11:50:19 [Info] cpu: # 2013.05.21 11:50:17 (*) Starting Nios II generation 2013.05.21.11:50:19 [Info] cpu: # 2013.05.21 11:50:17 (*) No license required to generate encrypted Nios II/e. 2013.05.21.11:50:19 [Info] cpu: # 2013.05.21 11:50:17 (*) Elaborating CPU configuration settings 2013.05.21.11:50:19 [Info] cpu: # 2013.05.21 11:50:17 (*) Creating all objects for CPU 2013.05.21.11:50:19 [Info] cpu: # 2013.05.21 11:50:18 (*) Generating RTL from CPU objects 2013.05.21.11:50:19 [Info] cpu: # 2013.05.21 11:50:18 (*) Creating plain-text RTL 2013.05.21.11:50:19 [Info] cpu: # 2013.05.21 11:50:19 (*) Done Nios II generation 2013.05.21.11:50:19 [Info] cpu: Done RTL generation for module 'uC_cpu' 2013.05.21.11:50:19 [Info] cpu: "uC" instantiated altera_nios2_qsys "cpu" 2013.05.21.11:50:19 [Debug] uC: queue size: 126 starting:altera_avalon_jtag_uart "submodules/uC_jtag_uart_0" 2013.05.21.11:50:19 [Info] Starting classic module elaboration. 2013.05.21.11:50:21 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0008_sopclgen --no_splash --refresh C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0008_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2013.05.21.11:50:22 [Info] Finished elaborating classic module. 2013.05.21.11:50:22 [Progress] Executing: C:/altera/11.0/quartus//sopc_builder/bin/sopc_builder --classic --generate C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0008_sopclgen/yysystem.ptf 2013.05.21.11:50:22 [Info] Running sopc_builder... 2013.05.21.11:50:24 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0008_sopclgen --generate C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0008_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2013.05.21.11:50:25 [Progress] No .sopc_builder configuration file(!) 2013.05.21.11:50:25 [Progress] . 2013.05.21.11:50:26 [Progress] # 2013.05.21 11:50:26 (*) Success: sopc_builder finished. 2013.05.21.11:50:26 [Info] jtag_uart_0: "uC" instantiated altera_avalon_jtag_uart "jtag_uart_0" 2013.05.21.11:50:26 [Debug] uC: queue size: 125 starting:altera_avalon_sysid_qsys "submodules/uC_sysid" 2013.05.21.11:50:26 [Info] sysid: "uC" instantiated altera_avalon_sysid_qsys "sysid" 2013.05.21.11:50:26 [Debug] uC: queue size: 124 starting:altera_avalon_onchip_memory2 "submodules/uC_onchip_ram" 2013.05.21.11:50:26 [Info] Starting classic module elaboration. 2013.05.21.11:50:28 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0010_sopclgen --no_splash --refresh C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0010_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2013.05.21.11:50:29 [Info] Finished elaborating classic module. 2013.05.21.11:50:29 [Progress] Executing: C:/altera/11.0/quartus//sopc_builder/bin/sopc_builder --classic --generate C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0010_sopclgen/yysystem.ptf 2013.05.21.11:50:29 [Info] Running sopc_builder... 2013.05.21.11:50:31 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0010_sopclgen --generate C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0010_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2013.05.21.11:50:32 [Progress] No .sopc_builder configuration file(!) 2013.05.21.11:50:32 [Progress] . 2013.05.21.11:50:33 [Progress] # 2013.05.21 11:50:33 (*) Success: sopc_builder finished. 2013.05.21.11:50:33 [Info] onchip_ram: "uC" instantiated altera_avalon_onchip_memory2 "onchip_ram" 2013.05.21.11:50:33 [Debug] uC: queue size: 123 starting:altera_avalon_pio "submodules/uC_led" 2013.05.21.11:50:33 [Info] Starting classic module elaboration. 2013.05.21.11:50:35 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0011_sopclgen --no_splash --refresh C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0011_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2013.05.21.11:50:37 [Info] Finished elaborating classic module. 2013.05.21.11:50:37 [Progress] Executing: C:/altera/11.0/quartus//sopc_builder/bin/sopc_builder --classic --generate C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0011_sopclgen/yysystem.ptf 2013.05.21.11:50:37 [Info] Running sopc_builder... 2013.05.21.11:50:39 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0011_sopclgen --generate C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0011_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2013.05.21.11:50:40 [Progress] No .sopc_builder configuration file(!) 2013.05.21.11:50:40 [Progress] . 2013.05.21.11:50:40 [Progress] # 2013.05.21 11:50:40 (*) Success: sopc_builder finished. 2013.05.21.11:50:41 [Info] led: "uC" instantiated altera_avalon_pio "led" 2013.05.21.11:50:41 [Debug] uC: queue size: 122 starting:altera_jtag_avalon_master "submodules/uC_mm_console_master" 2013.05.21.11:50:41 [Info] mm_console_master: Running transform AvalonTransform 2013.05.21.11:50:41 [Debug] Transform: PipelineBridgeSwap 2013.05.21.11:50:41 [Info] pipeline_bridge_swap_transform: After transform: 10 modules, 25 connections 2013.05.21.11:50:41 [Debug] Transform: ClockCrossingBridgeSwap 2013.05.21.11:50:41 [Debug] Transform: QsysBetaIPSwap 2013.05.21.11:50:41 [Debug] Transform: CustomInstructionTransform 2013.05.21.11:50:41 [Info] No custom instruction connections, skipping transform 2013.05.21.11:50:41 [Debug] Transform: TristateConduitUpgradeTransform 2013.05.21.11:50:41 [Debug] Transform: TranslatorTransform 2013.05.21.11:50:41 [Info] No Avalon connections, skipping transform 2013.05.21.11:50:41 [Debug] Transform: DomainTransform 2013.05.21.11:50:41 [Debug] Transform: RouterTransform 2013.05.21.11:50:41 [Debug] Transform: TrafficLimiterTransform 2013.05.21.11:50:41 [Debug] Transform: BurstTransform 2013.05.21.11:50:41 [Debug] Transform: ResetAdaptation 2013.05.21.11:50:41 [Debug] Transform: NetworkToSwitchTransform 2013.05.21.11:50:41 [Debug] Transform: WidthTransform 2013.05.21.11:50:42 [Debug] Transform: RouterTableTransform 2013.05.21.11:50:42 [Debug] Transform: ClockCrossingTransform 2013.05.21.11:50:42 [Debug] Transform: TrafficLimiterUpdateTransform 2013.05.21.11:50:42 [Debug] Transform: InterruptMapperTransform 2013.05.21.11:50:42 [Debug] Transform: InterruptSyncTransform 2013.05.21.11:50:42 [Debug] Transform: InterruptFanoutTransform 2013.05.21.11:50:42 [Info] mm_console_master: Running transform AvalonTransform took 1.246s 2013.05.21.11:50:42 [Debug] mm_console_master: "mm_console_master" reuses altera_jtag_dc_streaming "submodules/altera_avalon_st_jtag_interface" 2013.05.21.11:50:42 [Debug] mm_console_master: "mm_console_master" reuses timing_adapter "submodules/uC_mm_console_master_timing_adt" 2013.05.21.11:50:42 [Debug] mm_console_master: "mm_console_master" reuses altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2013.05.21.11:50:42 [Debug] mm_console_master: "mm_console_master" reuses altera_avalon_st_bytes_to_packets "submodules/altera_avalon_st_bytes_to_packets" 2013.05.21.11:50:42 [Debug] mm_console_master: "mm_console_master" reuses altera_avalon_st_packets_to_bytes "submodules/altera_avalon_st_packets_to_bytes" 2013.05.21.11:50:42 [Debug] mm_console_master: "mm_console_master" reuses altera_avalon_packets_to_master "submodules/altera_avalon_packets_to_master" 2013.05.21.11:50:42 [Debug] mm_console_master: "mm_console_master" reuses channel_adapter "submodules/uC_mm_console_master_b2p_adapter" 2013.05.21.11:50:42 [Debug] mm_console_master: "mm_console_master" reuses channel_adapter "submodules/uC_mm_console_master_p2b_adapter" 2013.05.21.11:50:42 [Info] mm_console_master: "uC" instantiated altera_jtag_avalon_master "mm_console_master" 2013.05.21.11:50:42 [Debug] uC: queue size: 129 starting:altera_tristate_conduit_bridge "submodules/uC_tristate_bridge_0" 2013.05.21.11:50:42 [Info] tristate_bridge_0: "uC" instantiated altera_tristate_conduit_bridge "tristate_bridge_0" 2013.05.21.11:50:42 [Debug] uC: queue size: 128 starting:altera_tristate_conduit_pin_sharer "submodules/uC_tristate_pin_sharer_0" 2013.05.21.11:50:42 [Info] tristate_pin_sharer_0: Running transform AvalonTransform 2013.05.21.11:50:42 [Debug] Transform: PipelineBridgeSwap 2013.05.21.11:50:42 [Info] pipeline_bridge_swap_transform: After transform: 4 modules, 7 connections 2013.05.21.11:50:42 [Debug] Transform: ClockCrossingBridgeSwap 2013.05.21.11:50:42 [Debug] Transform: QsysBetaIPSwap 2013.05.21.11:50:42 [Debug] Transform: CustomInstructionTransform 2013.05.21.11:50:42 [Info] No custom instruction connections, skipping transform 2013.05.21.11:50:42 [Debug] Transform: TristateConduitUpgradeTransform 2013.05.21.11:50:42 [Debug] Transform: TranslatorTransform 2013.05.21.11:50:42 [Info] No Avalon connections, skipping transform 2013.05.21.11:50:42 [Debug] Transform: DomainTransform 2013.05.21.11:50:42 [Debug] Transform: RouterTransform 2013.05.21.11:50:42 [Debug] Transform: TrafficLimiterTransform 2013.05.21.11:50:43 [Debug] Transform: BurstTransform 2013.05.21.11:50:43 [Debug] Transform: ResetAdaptation 2013.05.21.11:50:43 [Debug] Transform: NetworkToSwitchTransform 2013.05.21.11:50:43 [Debug] Transform: WidthTransform 2013.05.21.11:50:43 [Debug] Transform: RouterTableTransform 2013.05.21.11:50:43 [Debug] Transform: ClockCrossingTransform 2013.05.21.11:50:43 [Debug] Transform: TrafficLimiterUpdateTransform 2013.05.21.11:50:43 [Debug] Transform: InterruptMapperTransform 2013.05.21.11:50:43 [Debug] Transform: InterruptSyncTransform 2013.05.21.11:50:43 [Debug] Transform: InterruptFanoutTransform 2013.05.21.11:50:43 [Info] tristate_pin_sharer_0: Running transform AvalonTransform took 1.051s 2013.05.21.11:50:43 [Debug] tristate_pin_sharer_0: "tristate_pin_sharer_0" reuses altera_tristate_conduit_pin_sharer_core "submodules/uC_tristate_pin_sharer_0_pin_sharer" 2013.05.21.11:50:43 [Debug] tristate_pin_sharer_0: "tristate_pin_sharer_0" reuses altera_merlin_std_arbitrator "submodules/uC_tristate_pin_sharer_0_arbiter" 2013.05.21.11:50:43 [Info] tristate_pin_sharer_0: "uC" instantiated altera_tristate_conduit_pin_sharer "tristate_pin_sharer_0" 2013.05.21.11:50:43 [Debug] uC: queue size: 129 starting:altera_generic_tristate_controller "submodules/uC_sram" 2013.05.21.11:50:43 [Info] sram: Running transform AvalonTransform 2013.05.21.11:50:43 [Debug] Transform: PipelineBridgeSwap 2013.05.21.11:50:43 [Info] pipeline_bridge_swap_transform: After transform: 5 modules, 10 connections 2013.05.21.11:50:43 [Debug] Transform: ClockCrossingBridgeSwap 2013.05.21.11:50:43 [Debug] Transform: QsysBetaIPSwap 2013.05.21.11:50:43 [Debug] Transform: CustomInstructionTransform 2013.05.21.11:50:43 [Info] No custom instruction connections, skipping transform 2013.05.21.11:50:43 [Debug] Transform: TristateConduitUpgradeTransform 2013.05.21.11:50:43 [Debug] Transform: TranslatorTransform 2013.05.21.11:50:43 [Debug] Transform merlin_translator_transform not run on matched interfaces tdt.avalon_universal_master_0 and slave_translator.avalon_universal_slave_0 2013.05.21.11:50:43 [Debug] Transform merlin_translator_transform not run on matched interfaces slave_translator.avalon_anti_slave_0 and tda.avalon_slave_0 2013.05.21.11:50:43 [Debug] Transform: DomainTransform 2013.05.21.11:50:44 [Debug] Transform merlin_domain_transform not run on matched interfaces tdt.avalon_universal_master_0 and slave_translator.avalon_universal_slave_0 2013.05.21.11:50:44 [Debug] Transform merlin_domain_transform not run on matched interfaces slave_translator.avalon_anti_slave_0 and tda.avalon_slave_0 2013.05.21.11:50:44 [Debug] Transform: RouterTransform 2013.05.21.11:50:44 [Debug] Transform: TrafficLimiterTransform 2013.05.21.11:50:44 [Debug] Transform: BurstTransform 2013.05.21.11:50:44 [Debug] Transform: ResetAdaptation 2013.05.21.11:50:44 [Debug] Transform: NetworkToSwitchTransform 2013.05.21.11:50:44 [Debug] Transform: WidthTransform 2013.05.21.11:50:44 [Debug] Transform: RouterTableTransform 2013.05.21.11:50:44 [Debug] Transform: ClockCrossingTransform 2013.05.21.11:50:44 [Debug] Transform: TrafficLimiterUpdateTransform 2013.05.21.11:50:44 [Debug] Transform: InterruptMapperTransform 2013.05.21.11:50:44 [Debug] Transform: InterruptSyncTransform 2013.05.21.11:50:44 [Debug] Transform: InterruptFanoutTransform 2013.05.21.11:50:44 [Info] sram: Running transform AvalonTransform took 1.097s 2013.05.21.11:50:44 [Debug] sram: "sram" reuses altera_tristate_controller_translator "submodules/altera_tristate_controller_translator" 2013.05.21.11:50:44 [Debug] sram: "sram" reuses altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2013.05.21.11:50:44 [Debug] sram: "sram" reuses altera_tristate_controller_aggregator "submodules/altera_tristate_controller_aggregator" 2013.05.21.11:50:44 [Info] sram: "uC" instantiated altera_generic_tristate_controller "sram" 2013.05.21.11:50:44 [Debug] uC: queue size: 131 starting:altera_avalon_pio "submodules/uC_pwr_data" 2013.05.21.11:50:44 [Info] Starting classic module elaboration. 2013.05.21.11:50:46 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0013_sopclgen --no_splash --refresh C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0013_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2013.05.21.11:50:47 [Info] Finished elaborating classic module. 2013.05.21.11:50:47 [Progress] Executing: C:/altera/11.0/quartus//sopc_builder/bin/sopc_builder --classic --generate C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0013_sopclgen/yysystem.ptf 2013.05.21.11:50:47 [Info] Running sopc_builder... 2013.05.21.11:50:49 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0013_sopclgen --generate C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0013_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2013.05.21.11:50:50 [Progress] No .sopc_builder configuration file(!) 2013.05.21.11:50:50 [Progress] . 2013.05.21.11:50:51 [Progress] # 2013.05.21 11:50:51 (*) Success: sopc_builder finished. 2013.05.21.11:50:51 [Info] pwr_data: "uC" instantiated altera_avalon_pio "pwr_data" 2013.05.21.11:50:51 [Debug] uC: queue size: 130 starting:altera_avalon_pio "submodules/uC_i2c_int" 2013.05.21.11:50:51 [Info] Starting classic module elaboration. 2013.05.21.11:50:53 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0014_sopclgen --no_splash --refresh C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0014_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2013.05.21.11:50:54 [Info] Finished elaborating classic module. 2013.05.21.11:50:54 [Progress] Executing: C:/altera/11.0/quartus//sopc_builder/bin/sopc_builder --classic --generate C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0014_sopclgen/yysystem.ptf 2013.05.21.11:50:54 [Info] Running sopc_builder... 2013.05.21.11:50:56 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0014_sopclgen --generate C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0014_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2013.05.21.11:50:57 [Progress] No .sopc_builder configuration file(!) 2013.05.21.11:50:57 [Progress] . 2013.05.21.11:50:58 [Progress] # 2013.05.21 11:50:58 (*) Success: sopc_builder finished. 2013.05.21.11:50:58 [Info] i2c_int: "uC" instantiated altera_avalon_pio "i2c_int" 2013.05.21.11:50:58 [Debug] uC: queue size: 129 starting:altera_avalon_pio "submodules/uC_pwr_en_clk" 2013.05.21.11:50:58 [Info] Starting classic module elaboration. 2013.05.21.11:51:00 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0015_sopclgen --no_splash --refresh C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0015_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2013.05.21.11:51:02 [Info] Finished elaborating classic module. 2013.05.21.11:51:02 [Progress] Executing: C:/altera/11.0/quartus//sopc_builder/bin/sopc_builder --classic --generate C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0015_sopclgen/yysystem.ptf 2013.05.21.11:51:02 [Info] Running sopc_builder... 2013.05.21.11:51:03 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0015_sopclgen --generate C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0015_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2013.05.21.11:51:04 [Progress] No .sopc_builder configuration file(!) 2013.05.21.11:51:05 [Progress] . 2013.05.21.11:51:05 [Progress] # 2013.05.21 11:51:05 (*) Success: sopc_builder finished. 2013.05.21.11:51:05 [Info] pwr_en_clk: "uC" instantiated altera_avalon_pio "pwr_en_clk" 2013.05.21.11:51:05 [Debug] uC: queue size: 128 starting:altera_avalon_timer "submodules/uC_sys_timer" 2013.05.21.11:51:06 [Info] Starting classic module elaboration. 2013.05.21.11:51:08 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0016_sopclgen --no_splash --refresh C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0016_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2013.05.21.11:51:09 [Info] Finished elaborating classic module. 2013.05.21.11:51:09 [Progress] Executing: C:/altera/11.0/quartus//sopc_builder/bin/sopc_builder --classic --generate C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0016_sopclgen/yysystem.ptf 2013.05.21.11:51:09 [Info] Running sopc_builder... 2013.05.21.11:51:11 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0016_sopclgen --generate C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0016_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2013.05.21.11:51:12 [Progress] No .sopc_builder configuration file(!) 2013.05.21.11:51:12 [Progress] . 2013.05.21.11:51:12 [Progress] # 2013.05.21 11:51:12 (*) Success: sopc_builder finished. 2013.05.21.11:51:13 [Info] sys_timer: "uC" instantiated altera_avalon_timer "sys_timer" 2013.05.21.11:51:13 [Debug] uC: queue size: 127 starting:ad7262 "submodules/AD7262_Avalon_core" 2013.05.21.11:49:25 [Debug] set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files 2013.05.21.11:49:25 [Debug] Command: C:/altera/11.0/quartus/bin/quartus_map.exe not_a_project --generate_hdl_interface=D:/Work/Altera/Draft/AD7262/Initial/ip/AD7262/hdl/AD7262_Avalon_core.v --source=D:/Work/Altera/Draft/AD7262/Initial/ip/AD7262/hdl/AD7262.v --source=D:/Work/Altera/Draft/AD7262/Initial/ip/AD7262/hdl/write_master.v --source=D:/Work/Altera/Draft/AD7262/Initial/ip/AD7262/hdl/AD7262_Avalon_core.v --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0001_sopcqmap/ 2013.05.21.11:49:25 [Debug] Command took 0.510s 2013.05.21.11:51:13 [Debug] set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files 2013.05.21.11:51:13 [Debug] Command: C:/altera/11.0/quartus/bin/quartus_map.exe "not_a_project" "--generate_hdl_interface=D:\\Work\\Altera\\Draft\\AD7262\\Initial\\ip\\AD7262\\hdl\\AD7262_Avalon_core.v" "--source=D:/Work/Altera/Draft/AD7262/Initial/ip/AD7262/hdl/AD7262.v" "--source=D:/Work/Altera/Draft/AD7262/Initial/ip/AD7262/hdl/write_master.v" "--source=D:/Work/Altera/Draft/AD7262/Initial/ip/AD7262/hdl/AD7262_Avalon_core.v" "--set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0017_sopcqmap/" "--set=HDL_INTERFACE_INSTANCE_NAME=inst" "--set=HDL_INTERFACE_INSTANCE_ENTITY=AD7262_Avalon_core" "--set=HDL_INTERFACE_INSTANCE_PARAMETERS=DATAWIDTH=D\"32\";BYTEENABLEWIDTH=D\"4\";ADDRESSWIDTH=D\"32\";FIFODEPTH=D\"32\";FIFODEPTH_LOG2=D\"5\";FIFOUSEMEMORY=D\"1\";" 2013.05.21.11:51:13 [Debug] Command took 0.466s 2013.05.21.11:51:13 [Info] ad7262_0: "uC" instantiated ad7262 "ad7262_0" 2013.05.21.11:51:13 [Debug] uC: queue size: 126 starting:altera_avalon_pio "submodules/uC_gain_select" 2013.05.21.11:51:13 [Info] Starting classic module elaboration. 2013.05.21.11:51:15 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0018_sopclgen --no_splash --refresh C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0018_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2013.05.21.11:51:16 [Info] Finished elaborating classic module. 2013.05.21.11:51:16 [Progress] Executing: C:/altera/11.0/quartus//sopc_builder/bin/sopc_builder --classic --generate C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0018_sopclgen/yysystem.ptf 2013.05.21.11:51:16 [Info] Running sopc_builder... 2013.05.21.11:51:19 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0018_sopclgen --generate C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0018_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2013.05.21.11:51:20 [Progress] No .sopc_builder configuration file(!) 2013.05.21.11:51:20 [Progress] . 2013.05.21.11:51:20 [Progress] # 2013.05.21 11:51:20 (*) Success: sopc_builder finished. 2013.05.21.11:51:21 [Info] gain_select: "uC" instantiated altera_avalon_pio "gain_select" 2013.05.21.11:51:21 [Debug] uC: queue size: 125 starting:altera_avalon_pio "submodules/uC_pwr_modes" 2013.05.21.11:51:21 [Info] Starting classic module elaboration. 2013.05.21.11:51:23 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0019_sopclgen --no_splash --refresh C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0019_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2013.05.21.11:51:24 [Info] Finished elaborating classic module. 2013.05.21.11:51:24 [Progress] Executing: C:/altera/11.0/quartus//sopc_builder/bin/sopc_builder --classic --generate C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0019_sopclgen/yysystem.ptf 2013.05.21.11:51:24 [Info] Running sopc_builder... 2013.05.21.11:51:26 [Progress] "c:/altera/11.0/quartus/bin/jre/bin/java.exe" -Xmx512M -classpath "c:/altera/11.0/quartus/sopc_builder/bin/sopc_builder.jar;c:/altera/11.0/quartus/sopc_builder/bin/PinAssigner.jar;c:/altera/11.0/quartus/sopc_builder/bin/sopc_wizard.jar;c:/altera/11.0/quartus/sopc_builder/bin/jptf.jar" sopc_builder.sopc_builder -d"c:/altera/11.0/quartus/sopc_builder" -notalkback=1 -projectnameyysystem.qpf -projectpathC:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0019_sopclgen --generate C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0019_sopclgen/yysystem.v --quartus_dir="c:/altera/11.0/quartus" --sopc_perl="c:/altera/11.0/quartus/bin/perl" --sopc_lib_path="++c:/altera/11.0/quartus/../ip/altera/sopc_builder_ip+c:/altera/11.0/quartus/../ip/altera/nios2_ip" 2013.05.21.11:51:27 [Progress] No .sopc_builder configuration file(!) 2013.05.21.11:51:27 [Progress] . 2013.05.21.11:51:27 [Progress] # 2013.05.21 11:51:27 (*) Success: sopc_builder finished. 2013.05.21.11:51:28 [Info] pwr_modes: "uC" instantiated altera_avalon_pio "pwr_modes" 2013.05.21.11:51:28 [Debug] uC: queue size: 123 starting:altpll "submodules/uC_pll" 2013.05.21.11:51:28 [Debug] set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files 2013.05.21.11:51:28 [Debug] Command: C:/altera/11.0/quartus/bin/quartus_map.exe not_a_project --generate_hdl_interface=C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0020_sopcgen/uC_pll.v --source=C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0020_sopcgen/uC_pll.v --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0021_sopcqmap/ 2013.05.21.11:51:28 [Debug] Command took 0.476s 2013.05.21.11:51:28 [Info] pll: "uC" instantiated altpll "pll" 2013.05.21.11:51:28 [Debug] uC: queue size: 122 starting:altera_merlin_master_translator "submodules/altera_merlin_master_translator" 2013.05.21.11:51:28 [Info] cpu_instruction_master_translator: "uC" instantiated altera_merlin_master_translator "cpu_instruction_master_translator" 2013.05.21.11:51:28 [Debug] uC: queue size: 118 starting:altera_merlin_slave_translator "submodules/altera_merlin_slave_translator" 2013.05.21.11:51:28 [Info] cpu_jtag_debug_module_translator: "uC" instantiated altera_merlin_slave_translator "cpu_jtag_debug_module_translator" 2013.05.21.11:51:28 [Debug] uC: queue size: 103 starting:altera_merlin_master_agent "submodules/altera_merlin_master_agent" 2013.05.21.11:51:28 [Info] cpu_instruction_master_translator_avalon_universal_master_0_agent: "uC" instantiated altera_merlin_master_agent "cpu_instruction_master_translator_avalon_universal_master_0_agent" 2013.05.21.11:51:28 [Debug] uC: queue size: 99 starting:altera_merlin_slave_agent "submodules/altera_merlin_slave_agent" 2013.05.21.11:51:28 [Info] cpu_jtag_debug_module_translator_avalon_universal_slave_0_agent: "uC" instantiated altera_merlin_slave_agent "cpu_jtag_debug_module_translator_avalon_universal_slave_0_agent" 2013.05.21.11:51:28 [Debug] uC: queue size: 98 starting:altera_avalon_sc_fifo "submodules/altera_avalon_sc_fifo" 2013.05.21.11:51:28 [Info] cpu_jtag_debug_module_translator_avalon_universal_slave_0_agent_rsp_fifo: "uC" instantiated altera_avalon_sc_fifo "cpu_jtag_debug_module_translator_avalon_universal_slave_0_agent_rsp_fifo" 2013.05.21.11:51:28 [Debug] uC: queue size: 68 starting:altera_merlin_router "submodules/uC_addr_router" 2013.05.21.11:51:28 [Info] addr_router: "uC" instantiated altera_merlin_router "addr_router" 2013.05.21.11:51:28 [Debug] uC: queue size: 67 starting:altera_merlin_router "submodules/uC_addr_router_001" 2013.05.21.11:51:28 [Info] addr_router_001: "uC" instantiated altera_merlin_router "addr_router_001" 2013.05.21.11:51:28 [Debug] uC: queue size: 66 starting:altera_merlin_router "submodules/uC_addr_router_002" 2013.05.21.11:51:28 [Info] addr_router_002: "uC" instantiated altera_merlin_router "addr_router_002" 2013.05.21.11:51:28 [Debug] uC: queue size: 65 starting:altera_merlin_router "submodules/uC_addr_router_003" 2013.05.21.11:51:29 [Info] addr_router_003: "uC" instantiated altera_merlin_router "addr_router_003" 2013.05.21.11:51:29 [Debug] uC: queue size: 64 starting:altera_merlin_router "submodules/uC_id_router" 2013.05.21.11:51:29 [Info] id_router: "uC" instantiated altera_merlin_router "id_router" 2013.05.21.11:51:29 [Debug] uC: queue size: 63 starting:altera_merlin_router "submodules/uC_id_router_001" 2013.05.21.11:51:29 [Info] id_router_001: "uC" instantiated altera_merlin_router "id_router_001" 2013.05.21.11:51:29 [Debug] uC: queue size: 62 starting:altera_merlin_router "submodules/uC_id_router_002" 2013.05.21.11:51:29 [Info] id_router_002: "uC" instantiated altera_merlin_router "id_router_002" 2013.05.21.11:51:29 [Debug] uC: queue size: 61 starting:altera_merlin_router "submodules/uC_id_router_003" 2013.05.21.11:51:29 [Info] id_router_003: "uC" instantiated altera_merlin_router "id_router_003" 2013.05.21.11:51:29 [Debug] uC: queue size: 49 starting:altera_merlin_traffic_limiter "submodules/altera_merlin_traffic_limiter" 2013.05.21.11:51:29 [Info] limiter: "uC" instantiated altera_merlin_traffic_limiter "limiter" 2013.05.21.11:51:29 [Debug] uC: queue size: 45 starting:altera_merlin_burst_adapter "submodules/altera_merlin_burst_adapter" 2013.05.21.11:51:29 [Info] burst_adapter: "uC" instantiated altera_merlin_burst_adapter "burst_adapter" 2013.05.21.11:51:29 [Debug] uC: queue size: 44 starting:altera_reset_controller "submodules/altera_reset_controller" 2013.05.21.11:51:29 [Info] rst_controller: "uC" instantiated altera_reset_controller "rst_controller" 2013.05.21.11:51:29 [Debug] uC: queue size: 42 starting:altera_merlin_demultiplexer "submodules/uC_cmd_xbar_demux" 2013.05.21.11:51:29 [Info] cmd_xbar_demux: "uC" instantiated altera_merlin_demultiplexer "cmd_xbar_demux" 2013.05.21.11:51:29 [Debug] uC: queue size: 41 starting:altera_merlin_demultiplexer "submodules/uC_cmd_xbar_demux_001" 2013.05.21.11:51:29 [Info] cmd_xbar_demux_001: "uC" instantiated altera_merlin_demultiplexer "cmd_xbar_demux_001" 2013.05.21.11:51:29 [Debug] uC: queue size: 40 starting:altera_merlin_demultiplexer "submodules/uC_cmd_xbar_demux_002" 2013.05.21.11:51:29 [Info] cmd_xbar_demux_002: "uC" instantiated altera_merlin_demultiplexer "cmd_xbar_demux_002" 2013.05.21.11:51:29 [Debug] uC: queue size: 39 starting:altera_merlin_demultiplexer "submodules/uC_cmd_xbar_demux_003" 2013.05.21.11:51:29 [Info] cmd_xbar_demux_003: "uC" instantiated altera_merlin_demultiplexer "cmd_xbar_demux_003" 2013.05.21.11:51:29 [Debug] uC: queue size: 38 starting:altera_merlin_multiplexer "submodules/uC_cmd_xbar_mux" 2013.05.21.11:51:29 [Info] cmd_xbar_mux: "uC" instantiated altera_merlin_multiplexer "cmd_xbar_mux" 2013.05.21.11:51:29 [Debug] uC: queue size: 37 starting:altera_merlin_multiplexer "submodules/uC_cmd_xbar_mux_001" 2013.05.21.11:51:30 [Info] cmd_xbar_mux_001: "uC" instantiated altera_merlin_multiplexer "cmd_xbar_mux_001" 2013.05.21.11:51:30 [Info] Reusing file D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_merlin_arbitrator.sv 2013.05.21.11:51:30 [Debug] uC: queue size: 36 starting:altera_merlin_multiplexer "submodules/uC_cmd_xbar_mux_002" 2013.05.21.11:51:30 [Info] cmd_xbar_mux_002: "uC" instantiated altera_merlin_multiplexer "cmd_xbar_mux_002" 2013.05.21.11:51:30 [Info] Reusing file D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_merlin_arbitrator.sv 2013.05.21.11:51:30 [Debug] uC: queue size: 35 starting:altera_merlin_demultiplexer "submodules/uC_rsp_xbar_demux" 2013.05.21.11:51:30 [Info] rsp_xbar_demux: "uC" instantiated altera_merlin_demultiplexer "rsp_xbar_demux" 2013.05.21.11:51:30 [Debug] uC: queue size: 34 starting:altera_merlin_demultiplexer "submodules/uC_rsp_xbar_demux_001" 2013.05.21.11:51:30 [Info] rsp_xbar_demux_001: "uC" instantiated altera_merlin_demultiplexer "rsp_xbar_demux_001" 2013.05.21.11:51:30 [Debug] uC: queue size: 33 starting:altera_merlin_demultiplexer "submodules/uC_rsp_xbar_demux_002" 2013.05.21.11:51:30 [Info] rsp_xbar_demux_002: "uC" instantiated altera_merlin_demultiplexer "rsp_xbar_demux_002" 2013.05.21.11:51:30 [Debug] uC: queue size: 32 starting:altera_merlin_demultiplexer "submodules/uC_rsp_xbar_demux_003" 2013.05.21.11:51:30 [Info] rsp_xbar_demux_003: "uC" instantiated altera_merlin_demultiplexer "rsp_xbar_demux_003" 2013.05.21.11:51:30 [Debug] uC: queue size: 20 starting:altera_merlin_multiplexer "submodules/uC_rsp_xbar_mux" 2013.05.21.11:51:30 [Info] rsp_xbar_mux: "uC" instantiated altera_merlin_multiplexer "rsp_xbar_mux" 2013.05.21.11:51:30 [Info] Reusing file D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_merlin_arbitrator.sv 2013.05.21.11:51:30 [Debug] uC: queue size: 19 starting:altera_merlin_multiplexer "submodules/uC_rsp_xbar_mux_001" 2013.05.21.11:51:30 [Info] rsp_xbar_mux_001: "uC" instantiated altera_merlin_multiplexer "rsp_xbar_mux_001" 2013.05.21.11:51:30 [Info] Reusing file D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_merlin_arbitrator.sv 2013.05.21.11:51:30 [Debug] uC: queue size: 18 starting:altera_merlin_multiplexer "submodules/uC_rsp_xbar_mux_002" 2013.05.21.11:51:30 [Info] rsp_xbar_mux_002: "uC" instantiated altera_merlin_multiplexer "rsp_xbar_mux_002" 2013.05.21.11:51:30 [Info] Reusing file D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_merlin_arbitrator.sv 2013.05.21.11:51:30 [Debug] uC: queue size: 17 starting:altera_merlin_width_adapter "submodules/altera_merlin_width_adapter" 2013.05.21.11:51:30 [Info] width_adapter: "uC" instantiated altera_merlin_width_adapter "width_adapter" 2013.05.21.11:51:30 [Info] Reusing file D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_merlin_burst_uncompressor.sv 2013.05.21.11:51:30 [Debug] uC: queue size: 15 starting:altera_avalon_st_handshake_clock_crosser "submodules/altera_avalon_st_handshake_clock_crosser" 2013.05.21.11:51:30 [Info] crosser: "uC" instantiated altera_avalon_st_handshake_clock_crosser "crosser" 2013.05.21.11:51:30 [Info] Reusing file D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_avalon_st_pipeline_base.v 2013.05.21.11:51:30 [Debug] uC: queue size: 13 starting:altera_irq_mapper "submodules/uC_irq_mapper" 2013.05.21.11:51:30 [Info] irq_mapper: "uC" instantiated altera_irq_mapper "irq_mapper" 2013.05.21.11:51:30 [Debug] uC: queue size: 12 starting:altera_jtag_dc_streaming "submodules/altera_avalon_st_jtag_interface" 2013.05.21.11:49:26 [Debug] set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files 2013.05.21.11:49:26 [Debug] Command: C:/altera/11.0/quartus/bin/quartus_sh.exe -t C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0003_sopcqmap/not_a_project_setup.tcl 2013.05.21.11:49:26 [Debug] Command: C:/altera/11.0/quartus/bin/quartus_map.exe not_a_project --generate_hdl_interface=C:/altera/11.0/ip/altera/sopc_builder_ip/altera_avalon_jtag_phy/altera_avalon_st_jtag_interface.v --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0003_sopcqmap/ 2013.05.21.11:49:26 [Debug] Command took 0.255s 2013.05.21.11:49:27 [Debug] Command took 0.405s 2013.05.21.11:51:30 [Debug] set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files 2013.05.21.11:51:30 [Debug] Command: C:/altera/11.0/quartus/bin/quartus_sh.exe -t C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0045_sopcqmap/not_a_project_setup.tcl 2013.05.21.11:51:30 [Debug] Command: C:/altera/11.0/quartus/bin/quartus_map.exe "not_a_project" "--generate_hdl_interface=C:\\altera\\11.0\\ip\\altera\\sopc_builder_ip\\altera_avalon_jtag_phy\\altera_avalon_st_jtag_interface.v" "--set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0045_sopcqmap/" "--set=HDL_INTERFACE_INSTANCE_NAME=inst" "--set=HDL_INTERFACE_INSTANCE_ENTITY=altera_avalon_st_jtag_interface" "--set=HDL_INTERFACE_INSTANCE_PARAMETERS=PURPOSE=D\"1\";UPSTREAM_FIFO_SIZE=D\"0\";DOWNSTREAM_FIFO_SIZE=D\"0\";USE_PLI=D\"0\";PLI_PORT=D\"50000\";" 2013.05.21.11:51:31 [Debug] Command took 0.275s 2013.05.21.11:51:31 [Debug] Command took 0.405s 2013.05.21.11:51:31 [Info] jtag_phy_embedded_in_jtag_master: "mm_console_master" instantiated altera_jtag_dc_streaming "jtag_phy_embedded_in_jtag_master" 2013.05.21.11:51:31 [Info] Reusing file D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_avalon_st_clock_crosser.v 2013.05.21.11:51:31 [Info] Reusing file D:/Work/Altera/Draft/AD7262/Initial/uC/synthesis/submodules/altera_avalon_st_pipeline_base.v 2013.05.21.11:51:31 [Debug] uC: queue size: 11 starting:timing_adapter "submodules/uC_mm_console_master_timing_adt" 2013.05.21.11:51:31 [Info] timing_adt: Starting generation. 2013.05.21.11:51:31 [Info] timing_adt: "mm_console_master" instantiated timing_adapter "timing_adt" 2013.05.21.11:51:31 [Debug] uC: queue size: 9 starting:altera_avalon_st_bytes_to_packets "submodules/altera_avalon_st_bytes_to_packets" 2013.05.21.11:49:27 [Debug] set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files 2013.05.21.11:49:27 [Debug] Command: C:/altera/11.0/quartus/bin/quartus_map.exe not_a_project --generate_hdl_interface=C:/altera/11.0/ip/altera/sopc_builder_ip/altera_avalon_st_bytes_to_packets/altera_avalon_st_bytes_to_packets.v --source=C:/altera/11.0/ip/altera/sopc_builder_ip/altera_avalon_st_bytes_to_packets/altera_avalon_st_bytes_to_packets.v --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0004_sopcqmap/ 2013.05.21.11:49:27 [Debug] Command took 0.466s 2013.05.21.11:51:31 [Debug] set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files 2013.05.21.11:51:31 [Debug] Command: C:/altera/11.0/quartus/bin/quartus_map.exe "not_a_project" "--generate_hdl_interface=C:\\altera\\11.0\\ip\\altera\\sopc_builder_ip\\altera_avalon_st_bytes_to_packets\\altera_avalon_st_bytes_to_packets.v" "--source=C:/altera/11.0/ip/altera/sopc_builder_ip/altera_avalon_st_bytes_to_packets/altera_avalon_st_bytes_to_packets.v" "--set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0046_sopcqmap/" "--set=HDL_INTERFACE_INSTANCE_NAME=inst" "--set=HDL_INTERFACE_INSTANCE_ENTITY=altera_avalon_st_bytes_to_packets" "--set=HDL_INTERFACE_INSTANCE_PARAMETERS=CHANNEL_WIDTH=D\"8\";ENCODING=D\"0\";" 2013.05.21.11:51:32 [Debug] Command took 0.478s 2013.05.21.11:51:32 [Info] b2p: "mm_console_master" instantiated altera_avalon_st_bytes_to_packets "b2p" 2013.05.21.11:51:32 [Debug] uC: queue size: 8 starting:altera_avalon_st_packets_to_bytes "submodules/altera_avalon_st_packets_to_bytes" 2013.05.21.11:49:27 [Debug] set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files 2013.05.21.11:49:27 [Debug] Command: C:/altera/11.0/quartus/bin/quartus_map.exe not_a_project --generate_hdl_interface=C:/altera/11.0/ip/altera/sopc_builder_ip/altera_avalon_st_packets_to_bytes/altera_avalon_st_packets_to_bytes.v --source=C:/altera/11.0/ip/altera/sopc_builder_ip/altera_avalon_st_packets_to_bytes/altera_avalon_st_packets_to_bytes.v --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0005_sopcqmap/ 2013.05.21.11:49:28 [Debug] Command took 0.465s 2013.05.21.11:51:32 [Debug] set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files 2013.05.21.11:51:32 [Debug] Command: C:/altera/11.0/quartus/bin/quartus_map.exe "not_a_project" "--generate_hdl_interface=C:\\altera\\11.0\\ip\\altera\\sopc_builder_ip\\altera_avalon_st_packets_to_bytes\\altera_avalon_st_packets_to_bytes.v" "--source=C:/altera/11.0/ip/altera/sopc_builder_ip/altera_avalon_st_packets_to_bytes/altera_avalon_st_packets_to_bytes.v" "--set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0047_sopcqmap/" "--set=HDL_INTERFACE_INSTANCE_NAME=inst" "--set=HDL_INTERFACE_INSTANCE_ENTITY=altera_avalon_st_packets_to_bytes" "--set=HDL_INTERFACE_INSTANCE_PARAMETERS=CHANNEL_WIDTH=D\"8\";ENCODING=E\"\'0\'\";" 2013.05.21.11:51:32 [Debug] Command took 0.465s 2013.05.21.11:51:32 [Info] p2b: "mm_console_master" instantiated altera_avalon_st_packets_to_bytes "p2b" 2013.05.21.11:51:32 [Debug] uC: queue size: 7 starting:altera_avalon_packets_to_master "submodules/altera_avalon_packets_to_master" 2013.05.21.11:49:28 [Debug] set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files 2013.05.21.11:49:28 [Debug] Command: C:/altera/11.0/quartus/bin/quartus_map.exe not_a_project --generate_hdl_interface=C:/altera/11.0/ip/altera/sopc_builder_ip/altera_avalon_packets_to_master/altera_avalon_packets_to_master.v --source=C:/altera/11.0/ip/altera/sopc_builder_ip/altera_avalon_packets_to_master/altera_avalon_packets_to_master.v --set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0006_sopcqmap/ 2013.05.21.11:49:28 [Debug] Command took 0.475s 2013.05.21.11:51:32 [Debug] set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files 2013.05.21.11:51:32 [Debug] Command: C:/altera/11.0/quartus/bin/quartus_map.exe "not_a_project" "--generate_hdl_interface=C:\\altera\\11.0\\ip\\altera\\sopc_builder_ip\\altera_avalon_packets_to_master\\altera_avalon_packets_to_master.v" "--source=C:/altera/11.0/ip/altera/sopc_builder_ip/altera_avalon_packets_to_master/altera_avalon_packets_to_master.v" "--set=HDL_INTERFACE_OUTPUT_PATH=C:/Users/Istvan/AppData/Local/Temp/alt5846_5288820516151877016.dir/0048_sopcqmap/" "--set=HDL_INTERFACE_INSTANCE_NAME=inst" "--set=HDL_INTERFACE_INSTANCE_ENTITY=altera_avalon_packets_to_master" "--set=HDL_INTERFACE_INSTANCE_PARAMETERS=EXPORT_MASTER_SIGNALS=D\"0\";FAST_VER=D\"0\";FIFO_DEPTHS=D\"2\";FIFO_WIDTHU=D\"1\";" 2013.05.21.11:51:33 [Debug] Command took 0.485s 2013.05.21.11:51:33 [Info] transacto: "mm_console_master" instantiated altera_avalon_packets_to_master "transacto" 2013.05.21.11:51:33 [Debug] uC: queue size: 6 starting:channel_adapter "submodules/uC_mm_console_master_b2p_adapter" 2013.05.21.11:51:33 [Info] b2p_adapter: Starting generation. 2013.05.21.11:51:33 [Info] b2p_adapter: "mm_console_master" instantiated channel_adapter "b2p_adapter" 2013.05.21.11:51:33 [Debug] uC: queue size: 5 starting:channel_adapter "submodules/uC_mm_console_master_p2b_adapter" 2013.05.21.11:51:33 [Info] p2b_adapter: Starting generation. 2013.05.21.11:51:33 [Info] p2b_adapter: "mm_console_master" instantiated channel_adapter "p2b_adapter" 2013.05.21.11:51:33 [Debug] uC: queue size: 4 starting:altera_tristate_conduit_pin_sharer_core "submodules/uC_tristate_pin_sharer_0_pin_sharer" 2013.05.21.11:51:33 [Info] pin_sharer: "tristate_pin_sharer_0" instantiated altera_tristate_conduit_pin_sharer_core "pin_sharer" 2013.05.21.11:51:33 [Debug] uC: queue size: 3 starting:altera_merlin_std_arbitrator "submodules/uC_tristate_pin_sharer_0_arbiter" 2013.05.21.11:51:33 [Info] arbiter: "tristate_pin_sharer_0" instantiated altera_merlin_std_arbitrator "arbiter" 2013.05.21.11:51:33 [Debug] uC: queue size: 2 starting:altera_tristate_controller_translator "submodules/altera_tristate_controller_translator" 2013.05.21.11:51:33 [Info] tdt: "sram" instantiated altera_tristate_controller_translator "tdt" 2013.05.21.11:51:33 [Debug] uC: queue size: 0 starting:altera_tristate_controller_aggregator "submodules/altera_tristate_controller_aggregator" 2013.05.21.11:51:33 [Info] tda: "sram" instantiated altera_tristate_controller_aggregator "tda" 2013.05.21.11:51:33 [Info] uC: Done uC" with 62 modules, 193 files, 3091599 bytes